CN112444732B - Chip aging state monitoring circuit, method, chip and server - Google Patents

Chip aging state monitoring circuit, method, chip and server Download PDF

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Publication number
CN112444732B
CN112444732B CN202011250357.7A CN202011250357A CN112444732B CN 112444732 B CN112444732 B CN 112444732B CN 202011250357 A CN202011250357 A CN 202011250357A CN 112444732 B CN112444732 B CN 112444732B
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pull
circuit
oscillator
down circuit
signal source
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CN112444732A (en
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南海卿
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Haiguang Information Technology Co Ltd
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Haiguang Information Technology Co Ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The embodiment of the invention discloses a chip aging state monitoring circuit, a method, a chip and a server, and relates to the technical field of semiconductors. The power supply comprises a switch unit, a power supply and an oscillator; the control end of the pull-up and/or pull-down circuit is connected with at least two of a dynamic signal source with highest turnover rate, a static signal source with longest holding time and a node with largest current flowing through the chip; the node which is easy to occur in various aging phenomena is monitored and reflected on the influence on the conduction performance of a typical pull-up and pull-down circuit, so that the actual power supply voltage and/or the ground voltage of the oscillator are influenced, the oscillator outputs at least two corresponding groups of oscillation frequencies based on the change of the input voltage and/or the ground voltage, and the condition that the aging state of the current chip is influenced can be determined according to the two groups of oscillation frequencies, so that the chip is conveniently monitored under the influence of different types of aging phenomena. The invention is suitable for chip aging test, monitoring and design.

Description

Chip aging state monitoring circuit, method, chip and server
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a method and an apparatus for monitoring an aging state of a chip, and a chip.
Background
Some high-performance servers are rarely shut down conventionally and are in a high-speed running state for a long time, so that a chip (also called a microcircuit, or a microchip, or an integrated circuit, or an English integrated circuit, or an IC for short) has a device aging phenomenon, and the current generating capability of the device is reduced. Thereby affecting the normal operating frequency of the chip and the performance of the server.
The inventors of the present application found in the course of implementing the inventive concept that: the device of the chip is stimulated by different inputs to cause different aging phenomena, mainly including aging phenomena caused by carrier injection (Hot-carrier injection, HCI), negative bias temperature instability (Negative bias temperature instability, NBTI), positive bias temperature instability (Positive bias temperature instability, PBTI), time-lapse breakdown (Time dependent dielectric breakdown, TDDB for short) and the like. The HCI aging is mainly influenced by the turnover frequency of the grid signal of the device, and the aging cannot recover; NBTI/PBTI aging is mainly influenced by a long-time conduction state of the device, and when the device is closed, certain recovery can be carried out by itself; whereas TDDB burn-in depends on the overall charge number, i.e., current magnitude, flowing through the device.
The chip is composed of a plurality of unit circuits with different functions, and the input signal characteristics of the different unit circuits are different. Some of the unit circuits may have their input signals flipped at high frequencies, for example, clock signal generation units, and are more susceptible to the aging of HCI. Some cell circuits may be in a static on state for a long time, such as a state machine, an address signal, etc., and are more susceptible to NBTI/PBTI degradation. Some unit circuits have a main function of generating a large amount of current, and devices inside the unit circuits are more susceptible to the aging of the TDDB. However, the existing chip aging monitoring scheme is generally only used for monitoring the influence of a specific aging phenomenon.
Disclosure of Invention
In view of this, the embodiments of the present invention provide a device, a method, a chip and a server for monitoring the aging state of a chip, which are convenient for monitoring the influence of different types of aging phenomena on the chip.
In a first aspect, an embodiment of the present invention provides a chip burn-in status monitoring circuit, including: the switching unit, the power supply and the oscillator;
the control end of the pull-up circuit is configured to be connected with at least two of a dynamic signal source with highest chip turnover rate, a static signal source with longest holding time and a node with largest flowing current, the input end of the pull-up circuit is configured to be connected with a grounding terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded and used for changing the grounding voltage of the oscillator, and the output end of the power supply is connected with the input end of the oscillator and used for supplying power to the oscillator;
The switch unit is used for controlling the on-off of the pull-up circuit and the circuit where the oscillator is located;
or, the control end of the pull-down circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest holding time and a node with the largest flowing current, the input end of the pull-down circuit is configured to be connected with the power supply, and the output end of the pull-down circuit is configured to be connected with the input end of the oscillator and used for changing the input voltage of the oscillator;
the switch unit is used for controlling the on-off of the pull-down circuit and the circuit where the oscillator is located; or alternatively, the process may be performed,
the control ends of the pull-up circuit and the pull-down circuit are respectively configured to be connected with at least two of a dynamic signal source with highest chip turnover rate, a static signal source with longest holding time and a node with largest flowing current, the input end of the pull-up circuit is configured to be connected with a grounding terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded, the power supply is configured to be connected with the input end of the oscillator, and the pull-up circuit is used for changing the grounding voltage of the oscillator; the input end of the pull-down circuit is configured to be connected with the power supply, the output end of the pull-down circuit is configured to be connected with the input end of the oscillator, and the pull-down circuit is used for changing the input voltage of the oscillator;
The switch unit is used for controlling the on-off of the pull-up circuit and the pull-down circuit and the circuit where the oscillator is positioned respectively;
the oscillator is used for outputting at least two groups of oscillation frequencies.
With reference to the first aspect, in a first implementation manner of the first aspect, when the monitoring circuit includes a pull-up circuit, the pull-up circuit includes at least a first pull-up circuit and a second pull-up circuit;
the control end of the first pull-up circuit is configured to be connected with a dynamic signal source with highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal; or alternatively, the process may be performed,
the control end of the first pull-up circuit is configured to be connected with a static signal source with the longest holding time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a node with the largest current flowing in the chip, and is used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
The oscillator comprises a first oscillator and a second oscillator, wherein the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the output end of the first pull-up circuit is grounded, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output end of the second pull-up circuit is grounded;
the switch unit is specifically used for receiving an opening signal, so that a first pull-up circuit is conducted with a circuit where the first oscillator is located, a second pull-up circuit is conducted with a circuit where the second oscillator is located, the first pull-up circuit is used for changing the voltage to ground of the first oscillator, and the second pull-up circuit is used for changing the voltage to ground of the second oscillator;
the first oscillator is used for generating an oscillating signal based on the change of the voltage to the ground and outputting a first group of oscillating frequencies;
and a second oscillator for generating an oscillation signal based on a change in the voltage to ground and outputting a second set of oscillation frequencies. With reference to the first aspect and the first implementation manner of the first aspect, in a second implementation manner of the first aspect,
when the monitoring circuit comprises a pull-down circuit, the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit;
The control end of the first pull-down circuit is configured to be connected with a dynamic signal source with highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-down circuit is configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal; or alternatively, the process may be performed,
the control end of the first pull-down circuit is configured to be connected with a static signal source with the longest holding time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-down circuit is configured to be connected with a node with the largest current flowing in the chip, and is used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
the oscillator comprises a first oscillator and a second oscillator, the first oscillator is connected with the output end of the first pull-down circuit, and the second oscillator is connected with the output end of the second pull-down circuit;
The switch unit is specifically configured to receive an on signal, make the first pull-down circuit conduct with a circuit where the first oscillator is located, make the second pull-down circuit conduct with a circuit where the second oscillator is located, and supply power to the first oscillator via the first pull-down circuit and to the second oscillator via the second pull-down circuit;
the first oscillator is used for generating an oscillating signal based on the change of the input voltage and outputting a first group of oscillating frequencies;
and a second oscillator for generating an oscillation signal based on the variation of the input voltage to generate an oscillation signal and outputting a second set of oscillation frequencies.
With reference to the first aspect, the first or the second implementation manner of the first aspect, in a third implementation manner of the first aspect,
when the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit, and the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit;
the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with highest turnover rate in the chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal; or alternatively, the process may be performed,
the control ends of the first pull-up circuit and the first pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time in the chip, and are used for receiving an electric signal output by the static signal source and determining whether to conduct or not according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a node with the largest current flowing in the chip, and are used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
the oscillator comprises a first oscillator, a second oscillator, a third oscillator and a fourth oscillator, wherein the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output ends of the first pull-up circuit and the second pull-up circuit are grounded respectively; the input end of the third oscillator is connected with the output end of the first pull-down circuit, and the input end of the fourth oscillator is connected with the output end of the second pull-down circuit;
The switch unit is specifically configured to receive an on signal, so that a first pull-up circuit is turned on with a circuit where the first oscillator is located, a first pull-down circuit is turned on with a circuit where the third oscillator is located, a second pull-up circuit is turned on with a circuit where the second oscillator is located, and a second pull-down circuit is turned on with a circuit where the fourth oscillator is located;
the first, second, third and fourth oscillators are configured to generate a set of oscillation frequencies, respectively, based on a variation of respective input voltages.
With reference to any one of the first to third embodiments of the first aspect, in a fourth embodiment of the first aspect,
when the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit and a third pull-up circuit, the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit and a third pull-down circuit, and the oscillators comprise a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator and a sixth oscillator; the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with highest turnover rate in the chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time in the chip, and are used for receiving an electric signal output by the static signal source with the longest holding time and determining whether to conduct or not according to the electric signal;
the control ends of the third pull-up circuit and the third pull-down circuit are respectively configured to be connected with a node with the largest current flowing in the chip, and are used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
the grounding end of the first oscillator is connected with the input end of the first pull-up circuit, the grounding end of the second oscillator is connected with the input end of the second pull-up circuit, the third oscillator is connected with the output end of the first pull-down circuit, the fourth oscillator is connected with the output end of the second pull-down circuit, the grounding end of the fifth oscillator is connected with the input end of the third pull-up circuit, the sixth oscillator is connected with the output end of the third pull-down circuit, and the output ends of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit are respectively grounded;
the switch unit is specifically configured to receive an on signal, so that a first pull-up circuit is conducted with a circuit where the first oscillator is located, a first pull-down circuit is conducted with a circuit where the third oscillator is located, a second pull-up circuit is conducted with a circuit where the second oscillator is located, a second pull-down circuit is conducted with a circuit where the fourth oscillator is located, a third pull-up circuit is conducted with a circuit where the fifth oscillator is located, and a third pull-down circuit is conducted with a circuit where the sixth oscillator is located;
The first, second, third, fourth, fifth and sixth oscillators are configured to generate a set of oscillation frequencies, respectively, based on a variation of respective input voltages.
With reference to any one of the first to fourth implementation manners of the first aspect, in a fifth implementation manner of the first aspect, the monitoring circuit further includes a frequency comparator, an input end of the frequency comparator is connected to an output end of the oscillator, and is configured to receive at least two sets of frequencies output by the oscillator, and compare magnitudes of oscillation frequency values at the same moment in the two sets of frequencies.
With reference to any one of the first to fifth implementation manners of the first aspect, in a sixth implementation manner of the first aspect, the monitoring circuit further includes a voltage frequency regulator, an input terminal of the voltage frequency regulator is connected to an output terminal of the frequency comparator, and the voltage frequency regulator is configured to receive a minimum frequency value, which is output by the frequency comparator and is used to characterize an aging state of the chip, and perform frequency compensation on a corresponding element based on the minimum frequency value.
In a second aspect, an embodiment of the present invention provides a method for monitoring an aging state of a chip, including:
the control end of the pull-up circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise;
The switching unit receives an opening signal, the pull-up circuit is conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, and the voltage of the oscillator to the ground changes under the voltage division effect of the pull-up circuit;
the oscillator generates an oscillation signal based on the change of the voltage to the ground and outputs at least two groups of oscillation frequencies; or alternatively, the process may be performed,
the control end of the pull-down circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-down circuit to control the on-off of the pull-down circuit, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop;
the switch unit receives an opening signal, so that the pull-down circuit is conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit;
the oscillator generates an oscillation signal based on the change of the input voltage and outputs at least two groups of oscillation frequencies; or alternatively, the process may be performed,
the control ends of the pull-up circuit and the pull-down circuit are respectively connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop;
The switching unit receives an opening signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with a circuit where the oscillator is located, a power supply supplies power to the oscillator, the voltage to the ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the input voltage of the oscillator changes;
the oscillator generates oscillation signals based on the change of the voltage to the ground and the input voltage respectively, and outputs at least two groups of oscillation frequencies.
With reference to the second aspect, in a first implementation manner of the second aspect, the oscillator includes a first oscillator and a second oscillator;
when a pull-up circuit is involved in the method, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit;
the control end of the pull-up circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the voltage rising generated by the grounding end of the oscillator comprises the following steps:
The control end of the first pull-up circuit is connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control end of the first pull-up circuit, and after the first pull-up circuit is driven to be conducted, the grounding end of the first oscillator generates voltage rise; and the control end of the second pull-up circuit is connected to a static signal source with the longest holding time or a node with the largest current flowing through the chip, so that the current at the static signal source with the longest holding time or the node with the largest current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise; or alternatively, the process may be performed,
the control end of the first pull-up circuit is connected with a static signal source with the longest holding time in the chip, so that current at the static signal source with the longest holding time flows into the control end of the first pull-up circuit, and after the first pull-up circuit is driven to be conducted, the grounding end of the first oscillator generates voltage rise; the control end of the second pull-up circuit is connected with the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise;
The switch unit receives the start signal, the pull-up circuit is conducted with the circuit where the oscillator is located, the power supply supplies power to the oscillator, and under the voltage division effect of the pull-up circuit, the change of the voltage to the ground of the oscillator comprises: the switching unit receives an opening signal, so that a circuit in which the first pull-up circuit and the first oscillator are positioned is conducted, a circuit in which the second pull-up circuit and the second oscillator are positioned is conducted, a power supply supplies power to the first oscillator and the second oscillator respectively, the ground voltage of the first oscillator changes under the action of the voltage division of the first pull-up circuit, and the ground voltage of the second oscillator changes under the action of the voltage division of the second pull-up circuit;
the oscillator generates an oscillation signal based on a change in voltage to ground, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on the change of the voltage to ground, outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on the change of the voltage to ground, outputs a second set of oscillation frequencies; or alternatively, the process may be performed,
when the pull-down circuit is involved in the method, the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit;
the control end of the pull-down circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest current flowing through the chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest current flow into the control end of the pull-down circuit, and after the pull-up circuit is conducted, the output end of the pull-down circuit generates voltage rise, wherein the voltage rise comprises:
The input end of the first pull-down circuit is connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control end of the first pull-down circuit, and after the first pull-down circuit is driven to be conducted, the output end of the first pull-down circuit generates voltage drop; the input end of the second pull-down circuit is connected with a static signal source with the longest holding time or a node with the largest current flowing through the static signal source with the longest holding time or the current flowing through the node with the largest current flowing into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; or alternatively, the process may be performed,
the input end of the first pull-down circuit is connected with a static signal source with the longest holding time, so that current at the static signal source with the longest holding time flows into the control end of the first pull-down circuit, and after the first pull-down circuit is driven to be conducted, the output end of the first pull-down circuit generates voltage drop; the input end of the second pull-down circuit is connected with a node with the largest current flowing through, so that the current flowing through the node with the largest current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop;
The switch unit receives an opening signal to enable the pull-down circuit to be conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit comprises: the switch unit receives an opening signal, so that a first pull-down circuit is conducted with a circuit where the first oscillator is located, a second pull-down circuit is conducted with a circuit where the second oscillator is located, a power supply supplies power to the first oscillator through the first pull-down circuit, and power is supplied to the second oscillator through the second pull-down circuit;
the oscillator generates an oscillation signal based on a change in an input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in the input voltage, outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in the input voltage, outputs a second set of oscillation frequencies.
With reference to the first embodiment of the second aspect, in a second embodiment of the second aspect,
when the pull-up circuit and the pull-down circuit are involved in the method, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit, the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit, and the oscillator comprises a first oscillator, a second oscillator, a third oscillator and a fourth oscillator;
The control ends of the pull-up circuit and the pull-down circuit are respectively connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop, the voltage drop comprises: the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control ends of the first pull-up circuit and the first pull-down circuit respectively, after the first pull-up circuit and the first pull-down circuit are driven to be respectively conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the control ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, so that the static signal source with the longest holding time or the current at the node with the largest flowing current respectively flow into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; or alternatively, the process may be performed,
The input ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a static signal source with the longest holding time, so that the current at the static signal source with the longest holding time respectively flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a node with the largest current, so that the current flowing through the node with the largest current flows into the control ends of the second pull-up circuit and the second pull-down circuit respectively, after the second pull-up circuit and the second pull-down circuit are driven to be conducted, the grounding end of the second oscillator generates voltage rise, and the output end of the second pull-down circuit generates voltage drop;
the switch unit receives the start signal to make the pull-up circuit and the pull-down circuit respectively conduct with the circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-up circuit and the pull-down circuit comprises: the switch unit receives an opening signal, so that a circuit where the first pull-up circuit and the first oscillator are located is conducted, a circuit where the first pull-down circuit and the third oscillator are located is conducted, a circuit where the second pull-up circuit and the second oscillator are located is conducted, a circuit where the second pull-down circuit and the fourth oscillator are located is conducted, a power supply supplies power to the first oscillator, supplies power to the second oscillator, and the voltages to the ground of the first oscillator and the second oscillator are changed under the voltage division effect of the first pull-up circuit and the second pull-up circuit respectively; the power supply also supplies power to the third oscillator through the first pull-down circuit, supplies power to the fourth oscillator through the second pull-down circuit, and changes the input voltages of the third oscillator and the fourth oscillator;
The oscillator generates an oscillation signal based on a change in a voltage to ground and an input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on the change of the voltage to the ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on the change of the voltage to the ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on the change of the input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on the change of the input voltage, and outputs a fourth set of oscillation frequencies.
With reference to any one of the first to second embodiments of the second aspect, in a third embodiment of the second aspect,
when a pull-up circuit and a pull-down circuit are involved in the method, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit and a third pull-up circuit, the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit and a third pull-down circuit, and the oscillators comprise a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator and a sixth oscillator;
the control ends of the pull-up circuit and the pull-down circuit are respectively connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop, the voltage drop comprises: the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a static signal source with the longest holding time, so that current at the static signal source with the longest holding time flows into the second pull-up circuit and the control end of the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; the input ends of the third pull-up circuit and the third pull-down circuit are respectively connected with a node with the largest current, so that the current flowing through the node with the largest current flows into the control ends of the third pull-up circuit and the third pull-down circuit, after the third pull-up circuit and the third pull-down circuit are driven to be conducted, the grounding end of the fifth oscillator generates voltage rise, and the output end of the third pull-down circuit generates voltage drop;
The switch unit receives the start signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with the circuit where the oscillator is located, the power supply supplies power to the oscillator, the ground voltage of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the change of the input voltage of the oscillator comprises the following steps: the switching unit receives a start signal, so that a circuit where the first pull-up circuit is conducted with the first oscillator, a circuit where the first pull-down circuit is conducted with the third oscillator, a circuit where the second pull-up circuit is conducted with the second oscillator, a circuit where the second pull-down circuit is conducted with the fourth oscillator, a circuit where the third pull-up circuit is conducted with the fifth oscillator, and a circuit where the third pull-down circuit is conducted with the sixth oscillator are conducted, a power supply supplies power to the first oscillator, the second oscillator and the fifth oscillator respectively, the ground voltage of the first oscillator changes under the voltage division action of the first pull-up circuit, the ground voltage of the second oscillator changes under the voltage division action of the second pull-up circuit, and the ground voltage of the fifth oscillator changes under the voltage division action of the third pull-up circuit; the power supply also supplies power to the third oscillator via the first pull-down circuit, the fourth oscillator via the second pull-down circuit, and the six oscillators via the third pull-down circuit;
The oscillator generates oscillation signals based on the change of the voltage to the ground and the input voltage respectively, and outputting at least two groups of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in an input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on a change in an input voltage, outputs a fourth set of oscillation frequencies, the fifth oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a fifth set of oscillation frequencies, and the sixth oscillator generates an oscillation signal based on a change in an input voltage, outputs a sixth set of oscillation frequencies.
With reference to any one of the first to third embodiments of the second aspect, in a fourth embodiment of the second aspect, after the oscillator generates an oscillation signal based on a change in an input voltage, the method further includes:
comparing the values of the oscillation frequencies at the same time in the two groups of frequencies;
and determining the aging state of the chip based on the oscillation frequency value with smaller comparison result.
With reference to any one of the first to fourth embodiments of the second aspect, in a fifth embodiment of the second aspect, after the oscillator generates an oscillation signal based on a change in an input voltage, the method further includes: comparing each set of oscillation frequencies with a reference frequency value respectively;
and determining the aging state of the chip according to the comparison result.
With reference to any one of the first to fifth embodiments of the second aspect, in a sixth embodiment of the second aspect, after determining the aging state of the chip, the method further includes: and (3) representing the minimum frequency value of the aging state of the chip, and performing frequency compensation on the corresponding element based on the minimum frequency value.
With reference to any one of the first to sixth embodiments of the second aspect, in a seventh embodiment of the second aspect, the pull-up circuit includes a MOS transistor, and the oscillator is a voltage-controlled oscillator.
In a third aspect, an embodiment of the present invention provides a chip, including a substrate, on which a power switch device and any one of the chip burn-in status monitoring circuits of the first aspect are disposed, where a control end of a pull-up and/or pull-down circuit of the chip burn-in status monitoring circuit is connected to at least two of a dynamic signal source device with a highest flip rate, a static signal source device with a longest retention time, and a line node with a largest current flowing through the substrate, and is configured to monitor a burn-in status of the chip.
In a fourth aspect, an embodiment of the present invention provides a server, including a chassis, in which a motherboard is disposed, and the chip of the third aspect is mounted on the motherboard.
The embodiment of the invention provides a chip aging state monitoring circuit, a method, a chip and a server, which comprise a switch unit, a power supply and an oscillator; pull-up and/or pull-down circuits are also included. Due to the high-frequency flipped unit circuits, such as clock signal generation units, are often susceptible to aging of HCI; cell circuits that are in a static on state for a long period of time, such as state machines, address signals, etc., are often susceptible to NBTI/PBTI degradation; some devices inside the circuit that generate large amounts of current cells are often susceptible to aging effects of TDDB. When the monitoring circuit is applied, the control end of the pull-up and/or pull-down circuit is connected with at least two of a dynamic signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip; the node which is easy to occur in various aging phenomena is monitored and reflected on the influence on the conduction performance of a typical pull-up and pull-down circuit, and the actual power supply voltage of an oscillator is further influenced, namely the input voltage of the oscillator is described in some places, the oscillator outputs at least two corresponding groups of oscillation frequencies based on the change of the input voltage and/or the voltage to ground, and the aging state of the current chip can be determined according to the two groups of oscillation frequencies, so that the chip is conveniently monitored under the influence of different types of aging phenomena.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a circuit diagram of an embodiment of a chip burn-in status monitor circuit according to the present invention;
FIG. 2 is a circuit diagram of another embodiment of a chip burn-in status monitor circuit according to the present invention;
FIG. 3 is a circuit diagram of a chip burn-in status monitoring method according to another embodiment of the present invention;
FIG. 4 is a circuit diagram of a chip burn-in status monitoring method according to another embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The chip aging state monitoring circuit, the method, the chip and the server provided by the embodiment of the invention are suitable for chip aging test, performance monitoring and integrated circuit design occasions; for example, chip testing before shipping, chip monitoring during use, design of chip integrated circuits during product development, and the like.
Example 1
FIG. 1 is a circuit diagram of an embodiment of a chip burn-in status monitor circuit according to the present invention; referring to fig. 1, a chip aging state monitoring circuit provided in this embodiment includes: the switching unit, power supply and oscillator.
The control end of the pull-up circuit is configured to be connected with at least two of a dynamic signal source with highest chip turnover rate, a static signal source with longest holding time and a node with largest flowing current, the input end of the pull-up circuit is configured to be connected with a grounding terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded and used for changing the grounding voltage of the oscillator, and the output end of the power supply is connected with the input end of the oscillator and used for supplying power to the oscillator.
The dynamic signal source with the highest chip turnover rate, the static signal source with the longest holding time and the node with the largest flowing current are respectively represented by an HCI compression signal source, an NBTI/PBTI compression signal source and a TDDB compression signal source in the drawing.
The dynamic signal source can be a clock signal generating unit, and the signals are turned over at high frequency, so that the dynamic signal source is more easily affected by the aging of HCI (hydrogen chloride) compared with other circuits, nodes or electronic components in a chip. Therefore, the control end of the pull-up circuit can be connected with a dynamic signal source with high turnover frequency, and according to the influence of the signal source on the pull-up circuit, the influence of the HCI type aging phenomenon on the chip can be deduced reversely.
The static signal source with the longest holding time can be a state machine, an address signal and the like, and the circuits, nodes or electronic components are more easily affected by NBTI/PBTI ageing. Therefore, the control end of the pull-up circuit can be connected with a static signal source with the longest holding time, and the influence of the NBTI/PBTI type aging phenomenon on the chip can be deduced reversely according to the influence of the signal source on the pull-up circuit.
The node through which the current flows the largest can make the output node of the unit circuit generating a large amount of current, since the devices inside this type of unit circuit are more susceptible to the aging of the TDDB. Therefore, by connecting the control terminal of the pull-up circuit to the node through which the current flows the greatest, the influence of the TDDB type aging phenomenon on the chip can be inferred reversely from the influence of the current of the node on the pull-up circuit.
The switch unit is used for controlling the on-off of the pull-up circuit and the circuit where the oscillator is located. The specific setting position of the switch unit is not limited, as long as the on-off of the circuit in which the pull-up circuit and the oscillator are located can be controlled. For example, the switch unit is arranged between the pull-up circuit and the oscillator or on a node in front of the pull-up circuit, and can control the on-off of the pull-up circuit and the circuit where the oscillator is located.
The oscillator is used for outputting at least two groups of oscillation frequencies.
It will be appreciated that different levels of aging will affect the threshold voltage (Threshold Voltage, vth) of the pull-up circuit, which will generate a voltage rise at the oscillator ground after it is turned on, and that the oscillator will change in voltage to ground, and when the power supply supplies power to the oscillator, the oscillator will generate an oscillating signal and output a corresponding oscillating frequency. Therefore, the oscillation frequency value is correlated with the aging degree, and based on this, the aging state of the chip can be reversely determined according to the oscillation frequency.
It should be noted that, the pull-up circuit is generally connected to the power supply VDD in a conventional usage for pulling up the level signal. The pull-up circuit is connected to the common ground (power ground) of the oscillator (which is also essentially the current output of the oscillator), i.e., ground. Therefore, the pull-up circuit can cause the rise of the voltage to the ground of the oscillator, the voltage rise is positively correlated with the threshold voltage Vth of the pull-up circuit, different ageing and pressing can influence the Vth of the pull-up circuit, the actual voltage to the ground of the oscillator is further changed, the oscillator generates an oscillating signal, the oscillating frequency under the corresponding type ageing and pressing is output, and the ageing state of the chip related element can be reflected or judged based on the oscillating frequency, so that the ageing state and the performance of the chip are integrally represented.
In addition, by the circuit, since at least two different signal sources or nodes are monitored, namely different kinds of aging phenomena are monitored, the influence of signals at the at least two signal sources or nodes on the oscillator can output at least two groups of oscillation frequencies so as to be used for determining the aging degree of the corresponding kind respectively.
In other embodiments, the pull-up circuit may be replaced with a pull-down circuit. Specifically, the monitoring circuit comprises a switch unit, a power supply and an oscillator, and further comprises a pull-down circuit, wherein the control end of the pull-down circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest holding time and a node with the largest flowing current, the input end of the pull-down circuit is configured to be connected with the power supply, and the output end of the pull-down circuit is configured to be connected with the input end of the oscillator and used for changing the input voltage of the oscillator; the switch unit is used for controlling the on-off of the pull-down circuit and the circuit where the oscillator is located; the oscillator is used for outputting at least two groups of oscillation frequencies.
As described above for the operation of the pull-up circuit, the conventional usage of the pull-down circuit is typically to ground the power supply ground voltage VSS (specifically, the circuit common ground voltage, i.e., the power supply negative) to pull down the output level of the device. The pull-down circuit in this application is connected to the power supply VDD, and the pull-down circuit introduces a voltage drop at the input of the oscillator (the input of the oscillator is referred to herein as the power interface of the oscillator). In this way, the pull-down circuit can cause the input voltage (or called actual power supply voltage) of the oscillator to be reduced, and the voltage drop and the threshold voltage Vth of the pull-down circuit are positively correlated, different ageing and pressing can influence the Vth of the pull-down circuit, so that the actual power supply voltage for the oscillator is changed, the oscillator generates an oscillation signal, the oscillation frequency under the ageing and pressing of the corresponding type is output, and the ageing state of the chip related element can be reflected or judged based on the oscillation frequency, so that the ageing state and the performance of the chip are integrally represented.
In still other embodiments, the monitoring circuit further includes a switch unit, a power supply, and an oscillator, and further includes a pull-up circuit and a pull-down circuit, where control ends of the pull-up circuit and the pull-down circuit are respectively configured to be connected with at least two of a dynamic signal source with a highest chip flip rate, a static signal source with a longest holding time, and a node with a largest current flowing through the node, input ends of the pull-up circuit and the pull-down circuit are respectively configured to be connected with the power supply, and output ends of the pull-up circuit and the pull-down circuit are respectively configured to be connected with an input end of the oscillator, for changing an input voltage of the oscillator; the switch unit is used for controlling the on-off of the pull-down circuit and the circuit where the oscillator is located; the oscillator is used for outputting at least two groups of oscillation frequencies.
In this embodiment, the connection method and the principle description of the pull-up and pull-down circuits are basically the same as those in the previous two embodiments, the pull-up circuit and the pull-down circuit which are different from the conventional connection method are matched to realize the voltage division function, and the oscillator is powered after the voltage division, so that the actual power supply voltage and the ground voltage of the oscillator are changed along with the influence of different aging states, and further oscillation signals are generated, and different oscillation frequencies are output to reflect the degree of different aging types.
In addition, the monitoring of the aging state of the chip is realized by adopting the pull-up circuit and the pull-down circuit, the aging state of the same type can be reflected through the actual power supply voltage of the oscillator and the oscillation frequency generated by the actual ground voltage, different monitoring values can be mutually verified, and the monitoring accuracy can be ensured to a certain extent.
Based on the above description, the chip aging state monitoring circuit provided by the embodiment of the invention comprises a switch unit, a power supply and an oscillator; pull-up and/or pull-down circuits are also included. Due to the high-frequency flipped unit circuits, such as clock signal generation units, are often susceptible to aging of HCI; cell circuits that are in a static on state for a long period of time, such as state machines, address signals, etc., are often susceptible to NBTI/PBTI degradation; some devices inside the circuit that generate large amounts of current cells are often susceptible to aging effects of TDDB. When the monitoring circuit is applied, the control end of the pull-up and/or pull-down circuit is connected with at least two of a dynamic signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip; the node which is easy to occur in various aging phenomena is monitored and reflected on the influence on the conduction performance of a typical pull-up circuit and a pull-down circuit, so that the actual power supply voltage of an oscillator is further influenced, the oscillator outputs at least two corresponding groups of oscillation frequencies based on the change of the input voltage and/or the voltage to the ground, and the aging state of the current chip can be determined according to the two groups of oscillation frequencies, so that the chip is conveniently monitored under the influence of different types of aging phenomena.
When the monitoring circuit comprises a pull-up circuit, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit;
the control end of the first pull-up circuit is configured to be connected with a dynamic signal source with highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal.
Or, in an optional implementation manner of this embodiment, the control end of the first pull-up circuit is configured to be connected to a static signal source with the longest holding time in the chip, and is configured to receive an electrical signal output by the static signal source, and determine whether to conduct according to the electrical signal;
the control end of the second pull-up circuit is configured to be connected with a node with the largest current flowing in the chip and is used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal.
The oscillator comprises a first oscillator and a second oscillator, wherein the grounding end of the first oscillator is connected with the input end of the first pull-up circuit, the output end of the first pull-up circuit is grounded, the grounding end of the second oscillator is connected with the input end of the second pull-up circuit, and the output end of the second pull-up circuit is grounded.
The switch unit is specifically configured to receive an on signal, and make the first pull-up circuit and the circuit where the first oscillator is located conductive, and make the second pull-up circuit and the circuit where the second oscillator is located conductive, where the first pull-up circuit is configured to change the voltage to ground of the first oscillator, and the second pull-up circuit is configured to change the voltage to ground of the second oscillator. The first oscillator is used for generating an oscillating signal based on the change of the voltage to the ground and outputting a first group of oscillating frequencies; and a second oscillator for generating an oscillation signal based on a change in the voltage to ground and outputting a second set of oscillation frequencies.
In this embodiment, different signal sources are collected by adopting the first pull-up circuit and the second pull-up circuit respectively, and the voltage to ground of the output end (i.e. the common ground end) of the oscillator is affected, and the oscillator correspondingly outputs two groups of oscillation frequencies respectively, so that the aging degrees of different types of aging phenomena can be intuitively obtained.
In some embodiments, when the monitoring circuit includes a pull-down circuit, the pull-down circuit includes at least a first pull-down circuit and a second pull-down circuit.
The control end of the first pull-down circuit is configured to be connected with a dynamic signal source with highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal. The control end of the second pull-down circuit is configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal.
Or in some embodiments, the control end of the first pull-down circuit is configured to be connected with a static signal source with the longest holding time in the chip, and is used for receiving an electric signal output by the static signal source and determining whether to conduct according to the electric signal.
The control end of the second pull-down circuit is configured to be connected with a node with the largest current flowing in the chip and is used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal.
The oscillators comprise a first oscillator and a second oscillator, the first oscillator is connected with the output end of the first pull-down circuit, and the second oscillator is connected with the output end of the second pull-down circuit.
The switch unit is specifically configured to receive an on signal, make the first pull-down circuit conduct with a circuit where the first oscillator is located, make the second pull-down circuit conduct with a circuit where the second oscillator is located, and supply power to the first oscillator via the first pull-down circuit and to the second oscillator via the second pull-down circuit.
The first oscillator is used for generating an oscillating signal based on the change of the input voltage and outputting a first group of oscillating frequencies;
and a second oscillator for generating an oscillation signal based on the variation of the input voltage to generate an oscillation signal and outputting a second set of oscillation frequencies.
When the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit, and the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit.
In still other embodiments, the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with the highest turnover rate in the chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal.
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal.
Or as an optional embodiment, the control ends of the first pull-up circuit and the first pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time in the chip, and are used for receiving an electric signal output by the static signal source and determining whether to conduct according to the electric signal.
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a node with the largest current flowing in the chip, and are used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal.
In the two embodiments, the oscillator includes a first oscillator, a second oscillator, a third oscillator and a fourth oscillator, a ground end of the first oscillator is connected to an input end of a first pull-up circuit, a ground end of the second oscillator is connected to an input end of a second pull-up circuit, and output ends of the first pull-up circuit and the second pull-up circuit are respectively grounded; the input end of the third oscillator is connected with the output end of the first pull-down circuit, and the input end of the fourth oscillator is connected with the output end of the second pull-down circuit.
The switch unit is specifically configured to receive an on signal, so that a first pull-up circuit is turned on with a circuit where the first oscillator is located, a first pull-down circuit is turned on with a circuit where the third oscillator is located, a second pull-up circuit is turned on with a circuit where the second oscillator is located, and a second pull-down circuit is turned on with a circuit where the fourth oscillator is located;
the first, second, third and fourth oscillators are configured to generate a set of oscillation frequencies, respectively, based on a variation of respective input voltages. I.e. four sets of oscillation frequencies are output in total in this embodiment.
Referring to fig. 2, when the monitoring circuit includes a pull-up circuit and a pull-down circuit, the pull-up circuit includes a first pull-up circuit, a second pull-up circuit, and a third pull-up circuit, the pull-down circuit includes a first pull-down circuit, a second pull-down circuit, and a third pull-down circuit, and the oscillators include a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator, and a sixth oscillator; the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with highest turnover rate in the chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to conduct or not according to the electric signal.
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with the static signal source with the longest holding time in the chip, and are used for receiving the electric signal output by the static signal source with the longest holding time and determining whether to conduct or not according to the electric signal.
The control ends of the third pull-up circuit and the third pull-down circuit are respectively configured to be connected with a node with the largest current flowing in the chip, and are used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
the ground terminal of the first oscillator is connected with the input terminal of the first pull-up circuit, the ground terminal of the second oscillator is connected with the input terminal of the second pull-up circuit, the third oscillator is connected with the output terminal of the first pull-down circuit, the fourth oscillator is connected with the output terminal of the second pull-down circuit, the ground terminal of the fifth oscillator is connected with the input terminal of the third pull-up circuit, the sixth oscillator is connected with the output terminal of the third pull-down circuit, and the output terminals of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit are respectively grounded.
The switch unit is specifically configured to receive an on signal, so that the first pull-up circuit is turned on with a circuit where the first oscillator is located, the first pull-down circuit is turned on with a circuit where the third oscillator is located, the second pull-up circuit is turned on with a circuit where the second oscillator is located, the second pull-down circuit is turned on with a circuit where the fourth oscillator is located, the third pull-up circuit is turned on with a circuit where the fifth oscillator is located, and a circuit where the sixth oscillator is located.
The first, second, third, fourth, fifth and sixth oscillators are configured to generate a set of oscillation frequencies, respectively, based on a variation of respective input voltages. I.e. six sets of oscillation frequencies are output in total in this embodiment.
The pull-up circuit and the pull-down circuit may be composed of power switching devices, such as MOS (Metal oxide semiconductor) tubes, and the oscillator is a voltage-controlled oscillator.
In one specific implementation, as shown in FIG. 3, the pull-up circuit is made of PMOS and the pull-down circuit is made of NMOS.
In order to help understand the technical scheme and technical effect of the embodiment of the present invention, taking fig. 2 as an example, the following analysis is performed: the HCI compression signal source 101 shown in fig. 2 selects the signal of the element or unit circuit with the highest flip rate in the chip. NBTI/PBTI compression signal source 102. The static signal which keeps the static signal for the longest time in the chip is selected. TDDB compresses signal 103, selecting the wire node in the chip through which the current is greatest. 104. 105 are typical pull-down and typical pull-up circuits, respectively, that are subject to HCI stress. 106. 107 are typical pull-down and typical pull-up circuits, respectively, that are subject to NBTI/PBTI compression. 108. 109 are typical pull-down and typical pull-up circuits, respectively, that are subject to TDDB stress. 110 is a switch unit, and as a test on switch, only 101 to 109 work when the switch unit 110 is closed; 110 are turned on, 111 to 122 are operated. 111 is the voltage drop affected by 104 and 112 is the voltage rise affected by 105. 113 is the voltage drop affected by 106, 114 is the voltage rise affected by 107, 115 is the voltage drop affected by 108, and 116 is the voltage rise affected by 109.
As previously described: the Vth of the pull-up and pull-down circuits is affected by different aging stresses, thereby changing the actual supply voltage vvdd and the ground voltage vvss to the 117 to 122 oscillating circuits. The method comprises the following steps: for oscillator 117: vvdd1=vdd-111, vvss1=vss; oscillator 118: vvdd2=vdd, vvss2=vss+112; oscillator 119: vvdd3=vdd-113, vvss3=vss; oscillator 120: vvdd4=vdd, vvss4=vss+114; oscillator 121: vvdd5=vdd-115, vvss5=vss; oscillator 122: vvdd6=vdd, vvss6=vss+116.
The oscillation frequency of the oscillators 117 to 122 depends on their actual supply voltage and ground voltage magnitudes, which depend on the extent to which 104 to 109 are affected by aging. Therefore, according to the action relation, different types of aging degrees can be reversely deduced or judged through the oscillation frequency of the oscillator, and further the aging state of the whole chip can be reflected.
Referring to fig. 4, it can be appreciated that the above scheme can monitor various types of burn-in conditions after the chip is burned-in. In practice, the most serious ageing type is concerned with the chip performance, and the performance compensation is carried out on the device. Thus, in some embodiments, the monitoring circuit further comprises a frequency comparator 125, an input terminal of the frequency comparator 125 is connected to an output terminal of the oscillator, and the frequency comparator is configured to receive at least two sets of frequencies output by the oscillator after the oscillator outputs at least two sets of frequencies, and compare magnitudes of oscillation frequency values at the same time in the two sets of frequencies. After the comparison result is obtained, the ageing type with the most serious influence of the chip on the chip performance can be determined based on the oscillation frequency value with smaller comparison result, so that performance compensation can be further performed. The performance compensation generally includes two modes, namely a voltage compensation mode and a frequency compensation mode.
With continued reference to fig. 4, performance compensation is performed on the corresponding device after determining the burn-in species that most severely affect chip performance. In other embodiments, the monitoring circuit further includes a voltage frequency regulator, an input terminal of the voltage frequency regulator is connected to an output terminal of the frequency comparator, and the voltage frequency regulator is configured to receive a minimum frequency value output by the frequency comparator and representing an aging state of the chip, and perform frequency compensation on the corresponding element based on the minimum frequency value. By frequency compensating the corresponding elements, the chip performance can be improved or restored to some extent.
It can be understood that the monitoring circuit provided in this embodiment may be specially manufactured into a device for monitoring the aging state of the chip, or may be integrated into a circuit or a device for monitoring the performance of the chip, or may be integrated into an integrated circuit, so as to expand the functions of the integrated circuit, for example, integrated into the integrated circuit of the chip, and may be designed into a chip with a function of self-monitoring the aging state.
Example two
The method for monitoring the aging state of the chip provided by the embodiment of the invention can be implemented by adopting the monitoring circuit described in the embodiment but not limited to the embodiment one. The method may include:
210. The control end of the pull-up circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in the chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise.
In this embodiment, the purpose of enabling the signal source with the highest turnover rate, the static signal source with the longest holding time and the current flowing through at least two of the nodes with the largest current in the chip to flow into the control end of the pull-up circuit is mainly to build a monitoring environment capable of reflecting or representing various types of aging degrees. The aging state of the components or circuits in the chip, which are easily affected by a specific aging phenomenon, can be reflected by the working state of the pull-up circuit. The working state of the pull-up circuit can be visually represented by the oscillation frequency of the oscillator. And further reversely judging the influence degree of the aging phenomenon of the corresponding type on the device.
220. The switch unit receives the starting signal, the pull-up circuit is conducted with the circuit where the oscillator is located, the power supply supplies power to the oscillator, and the voltage of the oscillator to the ground changes under the voltage division effect of the pull-up circuit.
The usage of the pull-up circuit in this application is described in the first embodiment, and will not be described here again. By connecting the pull-up circuit to the common ground of the oscillator, the effect is for example: the original oscillator has a ground voltage of 0v, after the pull-up circuit is connected, the signal source inputs a voltage signal to the control end of the pull-up circuit, and the pull-up circuit is conducted and then divided by an equivalent resistor, so that the ground voltage of the oscillator is raised although the change is small, for example, the change is 0.1v.
230. The oscillator generates an oscillation signal based on the change of the voltage to the ground, and outputs at least two sets of oscillation frequencies.
The technical solution and the effect of the present embodiment may be implemented based on the monitoring circuit described in the first embodiment, and the undescribed places may be referred to each other, which is not described herein again.
In this embodiment, as an optional embodiment, the oscillator includes a first oscillator and a second oscillator; the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit.
In step 210, the control terminal of the pull-up circuit is connected to at least two of the signal source with the highest turnover rate, the static signal source with the longest holding time and the node with the largest current flowing through the switch, so that the signal source with the highest turnover rate, the static signal source with the longest holding time and the current flowing through at least two of the nodes with the largest current flow into the control terminal of the pull-up circuit to control the on/off of the pull-up circuit, and after the pull-up circuit is turned on, the voltage rise generated by the grounding terminal of the oscillator includes:
The control end of the first pull-up circuit is connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control end of the first pull-up circuit, and after the first pull-up circuit is driven to be conducted, the grounding end of the first oscillator generates voltage rise; and the control end of the second pull-up circuit is connected to a static signal source with the longest holding time or a node with the largest current flowing through the chip, so that the static signal source with the longest holding time or the current flowing through the node with the largest current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise.
Alternatively, in another alternative embodiment, the step 210 includes: the control end of the first pull-up circuit is connected with a static signal source with the longest holding time in the chip, so that current at the static signal source with the longest holding time flows into the control end of the first pull-up circuit, and after the first pull-up circuit is driven to be conducted, the grounding end of the first oscillator generates voltage rise; and connecting the control end of the second pull-up circuit to the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise.
In the two embodiments, step 220, the switch unit receives the start signal, the pull-up circuit is turned on with the circuit where the oscillator is located, the power supply supplies power to the oscillator, and under the voltage division effect of the pull-up circuit, the change of the voltage to ground of the oscillator includes: the switch unit receives an opening signal, so that the first pull-up circuit is conducted with a circuit where the first oscillator is located, the second pull-up circuit is conducted with a circuit where the second oscillator is located, the power supply supplies power to the first oscillator and the second oscillator respectively, the ground voltage of the first oscillator changes under the action of the voltage division of the first pull-up circuit, and the ground voltage of the second oscillator changes under the action of the voltage division of the second pull-up circuit.
Step 230, the oscillator generates an oscillation signal based on the change of the voltage to ground, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in the voltage to ground, outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in the voltage to ground, outputs a second set of oscillation frequencies.
Example III
The method for monitoring the aging state of the chip provided by the embodiment of the invention can be implemented by adopting the monitoring circuit including but not limited to the first embodiment, and has basically the same technical conception as the second embodiment. The method comprises the following steps:
310. The control end of the pull-down circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in the chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-down circuit to control the on-off of the pull-down circuit, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop.
320. The switch unit receives an opening signal, so that the pull-down circuit is conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit; 330. the oscillator generates an oscillation signal based on a change in an input voltage, and outputs at least two sets of oscillation frequencies.
Wherein, in some embodiments, the oscillator comprises a first oscillator and a second oscillator; the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit.
Step 310, the control end of the pull-down circuit is connected to at least two of the signal source with the highest turnover rate, the static signal source with the longest holding time and the node with the largest current flowing through the chip, so that the signal source with the highest turnover rate, the static signal source with the longest holding time and the current flowing through at least two of the nodes with the largest current flow into the control end of the pull-down circuit, and after the pull-up circuit is turned on, the output end of the pull-down circuit generates a voltage rise, which comprises:
The input end of the first pull-down circuit is connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control end of the first pull-down circuit, and after the first pull-down circuit is driven to be conducted, the output end of the first pull-down circuit generates voltage drop; and connecting the input end of the second pull-down circuit to the static signal source with the longest holding time or the node with the largest current, so that the static signal source with the longest holding time or the current flowing through the node with the largest current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop.
Alternatively, in other embodiments, step 310 includes: the input end of the first pull-down circuit is connected with a static signal source with the longest holding time, so that current at the static signal source with the longest holding time flows into the control end of the first pull-down circuit, and after the first pull-down circuit is driven to be conducted, the output end of the first pull-down circuit generates voltage drop; and connecting the input end of the second pull-down circuit to the node with the largest current, so that the current flowing through the node with the largest current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop.
Step 320, the switch unit receives the turn-on signal, so that the pull-down circuit is turned on with a circuit where the oscillator is located, and the power supply supplies power to the oscillator via the pull-down circuit, including: the switch unit receives an opening signal, so that a first pull-down circuit is conducted with a circuit where the first oscillator is located, a second pull-down circuit is conducted with a circuit where the second oscillator is located, a power supply supplies power to the first oscillator through the first pull-down circuit, and power is supplied to the second oscillator through the second pull-down circuit;
step 330, the oscillator generates an oscillation signal based on the variation of the input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in the input voltage, outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in the input voltage, outputs a second set of oscillation frequencies.
The technical solution and the effect of the present embodiment may be implemented based on the monitoring circuit described in the first embodiment, and the undescribed places may be referred to each other, which is not described herein again.
Example IV
The method for monitoring the aging state of the chip provided by the embodiment of the invention can be implemented by adopting the monitoring circuit including but not limited to the first embodiment, and has basically the same technical conception as the second and third embodiments. The method comprises the steps of:
410. The control ends of the pull-up circuit and the pull-down circuit are respectively connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop;
420. the switching unit receives an opening signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with a circuit where the oscillator is located, a power supply supplies power to the oscillator, the voltage to the ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the input voltage of the oscillator changes;
430. the oscillator generates oscillation signals based on the change of the voltage to the ground and the input voltage respectively, and outputs at least two groups of oscillation frequencies.
In this embodiment, as an optional embodiment, the pull-up circuit includes at least a first pull-up circuit and a second pull-up circuit, the pull-down circuit includes at least a first pull-down circuit and a second pull-down circuit, and the oscillator includes a first oscillator, a second oscillator, a third oscillator, and a fourth oscillator;
In step 410, the control ends of the pull-up circuit and the pull-down circuit are respectively connected to at least two of the signal source with the highest turnover rate, the static signal source with the longest holding time and the node with the largest flowing current in the chip, so that the signal source with the highest turnover rate, the static signal source with the longest holding time and the current flowing through at least two of the nodes with the largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates a voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates a voltage drop, which includes: the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control ends of the first pull-up circuit and the first pull-down circuit respectively, after the first pull-up circuit and the first pull-down circuit are driven to be respectively conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; and the control ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, so that the static signal source with the longest holding time or the current flowing through the node with the largest flowing current respectively flow into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop.
Or, as another alternative embodiment, in step 410, the input ends of the first pull-up circuit and the first pull-down circuit are respectively connected to the static signal source with the longest holding time, so that the current at the static signal source with the longest holding time flows into the control ends of the first pull-up circuit and the first pull-down circuit respectively, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the ground end of the first oscillator generates a voltage rise, and the output end of the first pull-down circuit generates a voltage drop; and connecting the input ends of the second pull-up circuit and the second pull-down circuit to the node with the largest current, so that the current flowing through the node with the largest current flows into the control ends of the second pull-up circuit and the second pull-down circuit respectively, and after the second pull-up circuit and the second pull-down circuit are driven to be conducted, the grounding end of the second oscillator generates voltage rise, and the output end of the second pull-down circuit generates voltage drop.
In these two embodiments, the step 420, the switch unit receiving the turn-on signal to enable the pull-up circuit and the pull-down circuit to be respectively connected with the circuits where the oscillator is located, and the power supply supplying power to the oscillator via the pull-up circuit and the pull-down circuit includes:
The switch unit receives an opening signal, so that a circuit where the first pull-up circuit and the first oscillator are located is conducted, a circuit where the first pull-down circuit and the third oscillator are located is conducted, a circuit where the second pull-up circuit and the second oscillator are located is conducted, a circuit where the second pull-down circuit and the fourth oscillator are located is conducted, a power supply supplies power to the first oscillator, supplies power to the second oscillator, and the voltages to the ground of the first oscillator and the second oscillator are changed under the voltage division effect of the first pull-up circuit and the second pull-up circuit respectively; the power supply also supplies power to the third oscillator via the first pull-down circuit, supplies power to the fourth oscillator via the second pull-down circuit, and changes the input voltages of the third oscillator and the fourth oscillator.
Step 430, the oscillator generating an oscillation signal based on the voltage to ground and the variation of the input voltage, outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on the change of the voltage to the ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on the change of the voltage to the ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on the change of the input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on the change of the input voltage, and outputs a fourth set of oscillation frequencies.
In still other embodiments, the pull-up circuit includes a first pull-up circuit, a second pull-up circuit, and a third pull-up circuit, the pull-down circuit includes a first pull-down circuit, a second pull-down circuit, and a third pull-down circuit, the oscillators include a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator, and a sixth oscillator;
in step 410, the control ends of the pull-up circuit and the pull-down circuit are respectively connected to at least two of the signal source with the highest turnover rate, the static signal source with the longest holding time and the node with the largest flowing current in the chip, so that the signal source with the highest turnover rate, the static signal source with the longest holding time and the current flowing through at least two of the nodes with the largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates a voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates a voltage drop, which includes: the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a static signal source with the longest holding time, so that current at the static signal source with the longest holding time flows into the second pull-up circuit and the control end of the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; and connecting the input ends of the third pull-up circuit and the third pull-down circuit to the node with the largest current, so that the current flowing through the node with the largest current flows into the control ends of the third pull-up circuit and the third pull-down circuit, and after the third pull-up circuit and the third pull-down circuit are driven to be conducted, the grounding end of the fifth oscillator generates voltage rise, and the output end of the third pull-down circuit generates voltage drop.
Step 420, the switch unit receives the turn-on signal, so that the pull-up circuit and the pull-down circuit are respectively turned on with the circuit where the oscillator is located, the power supply supplies power to the oscillator, the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply supplies power to the oscillator through the pull-down circuit, and the input voltage of the oscillator changes including: the switching unit receives a start signal, so that a circuit where the first pull-up circuit is conducted with the first oscillator, a circuit where the first pull-down circuit is conducted with the third oscillator, a circuit where the second pull-up circuit is conducted with the second oscillator, a circuit where the second pull-down circuit is conducted with the fourth oscillator, a circuit where the third pull-up circuit is conducted with the fifth oscillator, and a circuit where the third pull-down circuit is conducted with the sixth oscillator are conducted, a power supply supplies power to the first oscillator, the second oscillator and the fifth oscillator respectively, the ground voltage of the first oscillator changes under the voltage division action of the first pull-up circuit, the ground voltage of the second oscillator changes under the voltage division action of the second pull-up circuit, and the ground voltage of the fifth oscillator changes under the voltage division action of the third pull-up circuit; the power supply also supplies power to the third oscillator via the first pull-down circuit, the fourth oscillator via the second pull-down circuit, and the six oscillators via the third pull-down circuit;
Step 420, the oscillator generates oscillation signals based on the voltage to ground and the change of the input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in an input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on a change in an input voltage, outputs a fourth set of oscillation frequencies, the fifth oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a fifth set of oscillation frequencies, and the sixth oscillator generates an oscillation signal based on a change in an input voltage, outputs a sixth set of oscillation frequencies.
Example five
The method for monitoring the aging state of the chip provided by the embodiment of the invention can be implemented by adopting the monitoring circuit including but not limited to the first embodiment, and has basically the same technical conception as the second to fourth embodiments. The difference is that after the oscillator generates an oscillation signal based on a change in input voltage, and outputs at least two sets of oscillation frequencies, the method further includes: comparing the values of the oscillation frequencies at the same time in the two groups of frequencies; and determining the aging state of the chip based on the oscillation frequency value with smaller comparison result.
In yet another embodiment, after the oscillator generates an oscillation signal based on a change in an input voltage, outputting at least two sets of oscillation frequencies, the method further comprises: comparing each set of oscillation frequencies with a reference frequency value respectively; and determining the aging state of the chip according to the comparison result.
In this embodiment, the output frequencies of all the oscillators to be received are compared with a reference frequency (also referred to as a standard frequency). The frequency comparator outputs the oscillation frequency of the oscillator with the lowest frequency at the same moment to represent the current aging degree with the greatest influence.
In yet another embodiment, after determining the burn-in status of the chip, the method further comprises: and performing frequency compensation on the corresponding element based on the minimum frequency value. The voltage frequency regulator can compensate the performance of the element or circuit with the largest aging degree.
Example six
It will be appreciated that the monitoring circuit of the first embodiment may be integrated into an integrated circuit as part of a unit circuit or a functional module of the integrated circuit. Therefore, the embodiment of the invention also provides a chip, which comprises a substrate, wherein the substrate is provided with any one of the chip aging state monitoring circuits, and the control end of the pull-up and/or pull-down circuit of the chip aging state monitoring circuit is connected with at least two of a dynamic signal source device with highest turnover rate, a static signal source device with longest holding time and a line node with largest flowing current on the substrate, so as to monitor the aging state of the chip.
On the basis of the provided chip, the embodiment of the invention also provides a server which is characterized by comprising a case, wherein a main board is arranged in the case, and the chip is arranged on the main board. By adopting the chip with the chip aging state monitoring circuit, when the problems of weakening of the chip current generating capacity and the like occur in the use process of the server, the influence of the existing aging type on the chip performance is monitored by the server, and the performance compensation can be performed based on the aging type, so that the performance of the server can be improved to a certain extent.
In this specification, each embodiment is described in a related manner, and the same or similar parts of each embodiment are referred to each other, where each embodiment mainly describes differences from other embodiments.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
For convenience of description, the above chip burn-in status monitoring device is described as being functionally divided into various functional units/circuits/modules, respectively. Of course, the functions of the various elements/modules may be implemented in the same piece or pieces of software and/or hardware when implementing the present invention.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be included in the present invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.

Claims (17)

1. A chip burn-in status monitoring circuit, comprising: the switching unit, the power supply and the oscillator;
the control end of the pull-up circuit is configured to be connected with at least two of a dynamic signal source with highest chip turnover rate, a static signal source with longest holding time and a node with largest flowing current, the input end of the pull-up circuit is configured to be connected with a grounding terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded and used for changing the grounding voltage of the oscillator, and the output end of the power supply is connected with the input end of the oscillator and used for supplying power to the oscillator;
The switch unit is used for controlling the on-off of the pull-up circuit and the circuit where the oscillator is located;
or, the control end of the pull-down circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest holding time and a node with the largest flowing current, the input end of the pull-down circuit is configured to be connected with the power supply, and the output end of the pull-down circuit is configured to be connected with the input end of the oscillator and used for changing the input voltage of the oscillator;
the switch unit is used for controlling the on-off of the pull-down circuit and the circuit where the oscillator is located;
or alternatively, the process may be performed,
the control ends of the pull-up circuit and the pull-down circuit are respectively configured to be connected with at least two of a dynamic signal source with highest chip turnover rate, a static signal source with longest holding time and a node with largest flowing current, the input end of the pull-up circuit is configured to be connected with a grounding terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded, the power supply is configured to be connected with the input end of the oscillator, and the pull-up circuit is used for changing the grounding voltage of the oscillator; the input end of the pull-down circuit is configured to be connected with the power supply, the output end of the pull-down circuit is configured to be connected with the input end of the oscillator, and the pull-down circuit is used for changing the input voltage of the oscillator;
The switch unit is used for controlling the on-off of the pull-up circuit and the pull-down circuit and the circuit where the oscillator is positioned respectively;
the oscillator is used for outputting at least two groups of oscillation frequencies.
2. The circuit of claim 1, wherein when the monitoring circuit comprises a pull-up circuit, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit;
the control end of the first pull-up circuit is configured to be connected with a dynamic signal source with highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal; or alternatively, the process may be performed,
the control end of the first pull-up circuit is configured to be connected with a static signal source with the longest holding time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a node with the largest current flowing in the chip, and is used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
The oscillator comprises a first oscillator and a second oscillator, wherein the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the output end of the first pull-up circuit is grounded, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output end of the second pull-up circuit is grounded;
the switch unit is specifically used for receiving an opening signal, so that a first pull-up circuit is conducted with a circuit where the first oscillator is located, a second pull-up circuit is conducted with a circuit where the second oscillator is located, the first pull-up circuit is used for changing the voltage to ground of the first oscillator, and the second pull-up circuit is used for changing the voltage to ground of the second oscillator;
the first oscillator is used for generating an oscillating signal based on the change of the voltage to the ground and outputting a first group of oscillating frequencies;
and a second oscillator for generating an oscillation signal based on a change in the voltage to ground and outputting a second set of oscillation frequencies.
3. The circuit of claim 1, wherein when the monitoring circuit comprises a pull-down circuit, the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit;
the control end of the first pull-down circuit is configured to be connected with a dynamic signal source with highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
The control end of the second pull-down circuit is configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal; or alternatively, the process may be performed,
the control end of the first pull-down circuit is configured to be connected with a static signal source with the longest holding time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to conduct according to the electric signal;
the control end of the second pull-down circuit is configured to be connected with a node with the largest current flowing in the chip, and is used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
the oscillator comprises a first oscillator and a second oscillator, the first oscillator is connected with the output end of the first pull-down circuit, and the second oscillator is connected with the output end of the second pull-down circuit;
the switch unit is specifically configured to receive an on signal, make the first pull-down circuit conduct with a circuit where the first oscillator is located, make the second pull-down circuit conduct with a circuit where the second oscillator is located, and supply power to the first oscillator via the first pull-down circuit and to the second oscillator via the second pull-down circuit;
The first oscillator is used for generating an oscillating signal based on the change of the input voltage and outputting a first group of oscillating frequencies;
and a second oscillator for generating an oscillation signal based on the variation of the input voltage to generate an oscillation signal and outputting a second set of oscillation frequencies.
4. The circuit of claim 1, wherein when the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit, and the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit;
the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with highest turnover rate in the chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current, and determining whether to conduct according to the electric signal; or alternatively, the process may be performed,
the control ends of the first pull-up circuit and the first pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time in the chip, and are used for receiving an electric signal output by the static signal source and determining whether to conduct or not according to the electric signal;
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a node with the largest current flowing in the chip, and are used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
the oscillator comprises a first oscillator, a second oscillator, a third oscillator and a fourth oscillator, wherein the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output ends of the first pull-up circuit and the second pull-up circuit are grounded respectively; the input end of the third oscillator is connected with the output end of the first pull-down circuit, and the input end of the fourth oscillator is connected with the output end of the second pull-down circuit;
the switch unit is specifically configured to receive an on signal, so that a first pull-up circuit is turned on with a circuit where the first oscillator is located, a first pull-down circuit is turned on with a circuit where the third oscillator is located, a second pull-up circuit is turned on with a circuit where the second oscillator is located, and a second pull-down circuit is turned on with a circuit where the fourth oscillator is located;
the first, second, third and fourth oscillators are configured to generate a set of oscillation frequencies, respectively, based on a variation of respective input voltages.
5. The circuit of claim 1, wherein when the monitor circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit, and a third pull-up circuit, the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit, and a third pull-down circuit, the oscillators comprise a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator, and a sixth oscillator; the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with highest turnover rate in the chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to conduct according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time in the chip, and are used for receiving an electric signal output by the static signal source with the longest holding time and determining whether to conduct or not according to the electric signal;
the control ends of the third pull-up circuit and the third pull-down circuit are respectively configured to be connected with a node with the largest current flowing in the chip, and are used for receiving an electric signal output by the node with the largest current flowing in the chip and determining whether to conduct or not according to the electric signal;
The grounding end of the first oscillator is connected with the input end of the first pull-up circuit, the grounding end of the second oscillator is connected with the input end of the second pull-up circuit, the third oscillator is connected with the output end of the first pull-down circuit, the fourth oscillator is connected with the output end of the second pull-down circuit, the grounding end of the fifth oscillator is connected with the input end of the third pull-up circuit, the sixth oscillator is connected with the output end of the third pull-down circuit, and the output ends of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit are respectively grounded;
the switch unit is specifically configured to receive an on signal, so that a first pull-up circuit is conducted with a circuit where the first oscillator is located, a first pull-down circuit is conducted with a circuit where the third oscillator is located, a second pull-up circuit is conducted with a circuit where the second oscillator is located, a second pull-down circuit is conducted with a circuit where the fourth oscillator is located, a third pull-up circuit is conducted with a circuit where the fifth oscillator is located, and a third pull-down circuit is conducted with a circuit where the sixth oscillator is located;
the first, second, third, fourth, fifth and sixth oscillators are configured to generate a set of oscillation frequencies, respectively, based on a variation of respective input voltages.
6. The circuit of claim 1, wherein the monitoring circuit further comprises a frequency comparator, an input of the frequency comparator is connected to an output of the oscillator, and the frequency comparator is configured to receive at least two sets of frequencies output by the oscillator, and compare values of oscillation frequencies at the same time in the two sets of frequencies.
7. The circuit according to claim 5 or 6, wherein the monitoring circuit further comprises a voltage frequency regulator, an input of the voltage frequency regulator being connected to an output of the frequency comparator for receiving a minimum frequency value output by the frequency comparator indicative of an ageing state of the chip, and frequency compensating the respective element based on the minimum frequency value.
8. The method for monitoring the aging state of the chip is characterized by comprising the following steps:
the control end of the pull-up circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise;
The switching unit receives an opening signal, the pull-up circuit is conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, and the voltage of the oscillator to the ground changes under the voltage division effect of the pull-up circuit;
the oscillator generates an oscillation signal based on the change of the voltage to the ground and outputs at least two groups of oscillation frequencies; or alternatively, the process may be performed,
the control end of the pull-down circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-down circuit to control the on-off of the pull-down circuit, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop;
the switch unit receives an opening signal, so that the pull-down circuit is conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit;
the oscillator generates an oscillation signal based on the change of the input voltage and outputs at least two groups of oscillation frequencies; or alternatively, the process may be performed,
the control ends of the pull-up circuit and the pull-down circuit are respectively connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop;
The switching unit receives an opening signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with a circuit where the oscillator is located, a power supply supplies power to the oscillator, the voltage to the ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the input voltage of the oscillator changes;
the oscillator generates oscillation signals based on the change of the voltage to the ground and the input voltage respectively, and outputs at least two groups of oscillation frequencies.
9. The method of claim 8, wherein the oscillator comprises a first oscillator and a second oscillator;
when a pull-up circuit is involved in the method, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit;
the control end of the pull-up circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the voltage rising generated by the grounding end of the oscillator comprises the following steps:
The control end of the first pull-up circuit is connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control end of the first pull-up circuit, and after the first pull-up circuit is driven to be conducted, the grounding end of the first oscillator generates voltage rise; and the control end of the second pull-up circuit is connected to a static signal source with the longest holding time or a node with the largest current flowing through the chip, so that the current at the static signal source with the longest holding time or the node with the largest current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise; or alternatively, the process may be performed,
the control end of the first pull-up circuit is connected with a static signal source with the longest holding time in the chip, so that current at the static signal source with the longest holding time flows into the control end of the first pull-up circuit, and after the first pull-up circuit is driven to be conducted, the grounding end of the first oscillator generates voltage rise; the control end of the second pull-up circuit is connected with the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise;
The switch unit receives the start signal, the pull-up circuit is conducted with the circuit where the oscillator is located, the power supply supplies power to the oscillator, and under the voltage division effect of the pull-up circuit, the change of the voltage to the ground of the oscillator comprises: the switching unit receives an opening signal, so that a circuit in which the first pull-up circuit and the first oscillator are positioned is conducted, a circuit in which the second pull-up circuit and the second oscillator are positioned is conducted, a power supply supplies power to the first oscillator and the second oscillator respectively, the ground voltage of the first oscillator changes under the action of the voltage division of the first pull-up circuit, and the ground voltage of the second oscillator changes under the action of the voltage division of the second pull-up circuit;
the oscillator generates an oscillation signal based on a change in voltage to ground, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on the change of the voltage to ground, outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on the change of the voltage to ground, outputs a second set of oscillation frequencies; or alternatively, the process may be performed,
when the pull-down circuit is involved in the method, the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit;
the control end of the pull-down circuit is connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest current flowing through the chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest current flow into the control end of the pull-down circuit, and after the pull-up circuit is conducted, the output end of the pull-down circuit generates voltage rise, wherein the voltage rise comprises:
The input end of the first pull-down circuit is connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control end of the first pull-down circuit, and after the first pull-down circuit is driven to be conducted, the output end of the first pull-down circuit generates voltage drop; the input end of the second pull-down circuit is connected with a static signal source with the longest holding time or a node with the largest current flowing through the static signal source with the longest holding time or the current flowing through the node with the largest current flowing into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; or alternatively, the process may be performed,
the input end of the first pull-down circuit is connected with a static signal source with the longest holding time, so that current at the static signal source with the longest holding time flows into the control end of the first pull-down circuit, and after the first pull-down circuit is driven to be conducted, the output end of the first pull-down circuit generates voltage drop; the input end of the second pull-down circuit is connected with a node with the largest current flowing through, so that the current flowing through the node with the largest current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop;
The switch unit receives an opening signal to enable the pull-down circuit to be conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit comprises: the switch unit receives an opening signal, so that a first pull-down circuit is conducted with a circuit where the first oscillator is located, a second pull-down circuit is conducted with a circuit where the second oscillator is located, a power supply supplies power to the first oscillator through the first pull-down circuit, and power is supplied to the second oscillator through the second pull-down circuit;
the oscillator generates an oscillation signal based on a change in an input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in the input voltage, outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in the input voltage, outputs a second set of oscillation frequencies.
10. The method of claim 8, wherein when the method involves a pull-up circuit and a pull-down circuit, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit, the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit, and the oscillator comprises a first oscillator, a second oscillator, a third oscillator and a fourth oscillator;
The control ends of the pull-up circuit and the pull-down circuit are respectively connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop, the voltage drop comprises: the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control ends of the first pull-up circuit and the first pull-down circuit respectively, after the first pull-up circuit and the first pull-down circuit are driven to be respectively conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the control ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, so that the static signal source with the longest holding time or the current at the node with the largest flowing current respectively flow into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; or alternatively, the process may be performed,
The input ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a static signal source with the longest holding time, so that the current at the static signal source with the longest holding time respectively flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a node with the largest current, so that the current flowing through the node with the largest current flows into the control ends of the second pull-up circuit and the second pull-down circuit respectively, after the second pull-up circuit and the second pull-down circuit are driven to be conducted, the grounding end of the second oscillator generates voltage rise, and the output end of the second pull-down circuit generates voltage drop;
the switch unit receives the start signal to make the pull-up circuit and the pull-down circuit respectively conduct with the circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-up circuit and the pull-down circuit comprises: the switch unit receives an opening signal, so that a circuit where the first pull-up circuit and the first oscillator are located is conducted, a circuit where the first pull-down circuit and the third oscillator are located is conducted, a circuit where the second pull-up circuit and the second oscillator are located is conducted, a circuit where the second pull-down circuit and the fourth oscillator are located is conducted, a power supply supplies power to the first oscillator, supplies power to the second oscillator, and the voltages to the ground of the first oscillator and the second oscillator are changed under the voltage division effect of the first pull-up circuit and the second pull-up circuit respectively; the power supply also supplies power to the third oscillator through the first pull-down circuit, supplies power to the fourth oscillator through the second pull-down circuit, and changes the input voltages of the third oscillator and the fourth oscillator;
The oscillator generates an oscillation signal based on a change in a voltage to ground and an input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on the change of the voltage to the ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on the change of the voltage to the ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on the change of the input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on the change of the input voltage, and outputs a fourth set of oscillation frequencies.
11. The method of claim 8, wherein when the method involves a pull-up circuit and a pull-down circuit, the pull-up circuit includes a first pull-up circuit, a second pull-up circuit, and a third pull-up circuit, the pull-down circuit includes a first pull-down circuit, a second pull-down circuit, and a third pull-down circuit, and the oscillators include a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator, and a sixth oscillator;
the control ends of the pull-up circuit and the pull-down circuit are respectively connected with at least two of a signal source with highest turnover rate, a static signal source with longest holding time and a node with largest flowing current in a chip, so that the signal source with highest turnover rate, the static signal source with longest holding time and the current flowing through at least two of the nodes with largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the output end of the pull-down circuit generates voltage drop, the voltage drop comprises: the control ends of the first pull-up circuit and the first pull-down circuit are respectively connected with a signal source with highest turnover rate in the chip, so that current at the signal source with highest turnover rate in the chip flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected with a static signal source with the longest holding time, so that current at the static signal source with the longest holding time flows into the second pull-up circuit and the control end of the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; the input ends of the third pull-up circuit and the third pull-down circuit are respectively connected with a node with the largest current, so that the current flowing through the node with the largest current flows into the control ends of the third pull-up circuit and the third pull-down circuit, after the third pull-up circuit and the third pull-down circuit are driven to be conducted, the grounding end of the fifth oscillator generates voltage rise, and the output end of the third pull-down circuit generates voltage drop;
The switch unit receives the start signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with the circuit where the oscillator is located, the power supply supplies power to the oscillator, the ground voltage of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the change of the input voltage of the oscillator comprises the following steps: the switching unit receives a start signal, so that a circuit where the first pull-up circuit is conducted with the first oscillator, a circuit where the first pull-down circuit is conducted with the third oscillator, a circuit where the second pull-up circuit is conducted with the second oscillator, a circuit where the second pull-down circuit is conducted with the fourth oscillator, a circuit where the third pull-up circuit is conducted with the fifth oscillator, and a circuit where the third pull-down circuit is conducted with the sixth oscillator are conducted, a power supply supplies power to the first oscillator, the second oscillator and the fifth oscillator respectively, the ground voltage of the first oscillator changes under the voltage division action of the first pull-up circuit, the ground voltage of the second oscillator changes under the voltage division action of the second pull-up circuit, and the ground voltage of the fifth oscillator changes under the voltage division action of the third pull-up circuit; the power supply also supplies power to the third oscillator via the first pull-down circuit, the fourth oscillator via the second pull-down circuit, and the six oscillators via the third pull-down circuit;
The oscillator generates oscillation signals based on the change of the voltage to the ground and the input voltage respectively, and outputting at least two groups of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in an input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on a change in an input voltage, outputs a fourth set of oscillation frequencies, the fifth oscillator generates an oscillation signal based on a change in a voltage to ground, outputs a fifth set of oscillation frequencies, and the sixth oscillator generates an oscillation signal based on a change in an input voltage, outputs a sixth set of oscillation frequencies.
12. The method of claim 8, wherein after the oscillator generates an oscillation signal based on a change in an input voltage, outputting at least two sets of oscillation frequencies, the method further comprises:
comparing the values of the oscillation frequencies at the same time in the two groups of frequencies;
and determining the aging state of the chip based on the oscillation frequency value with smaller comparison result.
13. The method of claim 8, wherein after the oscillator generates an oscillation signal based on a change in an input voltage, outputting at least two sets of oscillation frequencies, the method further comprises: comparing each set of oscillation frequencies with a reference frequency value respectively;
And determining the aging state of the chip according to the comparison result.
14. The method for monitoring the burn-in status of a chip according to claim 12 or 13, wherein after determining the burn-in status of the chip, the method further comprises: and (3) representing the minimum frequency value of the aging state of the chip, and performing frequency compensation on the corresponding element based on the minimum frequency value.
15. The method of claim 8, wherein the pull-up circuit comprises a MOS transistor and the oscillator is a voltage controlled oscillator.
16. The chip is characterized by comprising a substrate, wherein the substrate is provided with the chip aging state monitoring circuit according to any one of claims 1 to 7, and the control end of the pull-up and/or pull-down circuit of the chip aging state monitoring circuit is connected with at least two of a dynamic signal source device with highest turnover rate, a static signal source device with longest holding time and a line node with largest flowing current on the substrate, and is used for monitoring the aging state of the chip.
17. A server comprising a chassis, wherein a motherboard is disposed in the chassis, and wherein the chip of claim 16 is mounted on the motherboard.
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