CN112444732A - Chip aging state monitoring circuit and method, chip and server - Google Patents

Chip aging state monitoring circuit and method, chip and server Download PDF

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Publication number
CN112444732A
CN112444732A CN202011250357.7A CN202011250357A CN112444732A CN 112444732 A CN112444732 A CN 112444732A CN 202011250357 A CN202011250357 A CN 202011250357A CN 112444732 A CN112444732 A CN 112444732A
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pull
circuit
oscillator
down circuit
signal source
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CN112444732B (en
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南海卿
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Haiguang Information Technology Co Ltd
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Haiguang Information Technology Co Ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The embodiment of the invention discloses a chip aging state monitoring circuit, a method, a chip and a server, and relates to the technical field of semiconductors. Comprises a switch unit, a power supply and an oscillator; the control end of the pull-up and/or pull-down circuit is connected with at least two of a dynamic signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip; the method comprises the steps of monitoring nodes with various aging phenomena which are easy to occur, reflecting the influence on the conduction performance of a typical pull-up and pull-down circuit, further influencing the actual power supply voltage and/or the voltage to ground of an oscillator, outputting at least two groups of corresponding oscillation frequencies by the oscillator based on the change of the input voltage and/or the voltage to ground, and determining the condition that the aging state of the current chip is influenced according to the two groups of oscillation frequencies, so that the chip is conveniently monitored under the influence of the aging phenomena of different types. The invention is suitable for chip aging test, monitoring and design.

Description

Chip aging state monitoring circuit and method, chip and server
Technical Field
The invention relates to the technical field of semiconductors, in particular to a chip aging state monitoring method and device and a chip.
Background
Some high-performance servers are rarely powered off and are in a high-speed operation state for a long time, so that a chip (also called a microcircuit or an english micro chip or an integrated circuit or an english integrated circuit or an IC) has a device aging phenomenon, and the current generation capability of the device is weakened. Further affecting the normal operating frequency of the chip and affecting the performance of the server.
The inventor of the application finds out in the process of realizing the invention: the devices of the chip are stimulated by different inputs to cause different aging phenomena, mainly including carrier injection (HCI), Negative Bias Temperature Instability (NBTI), Positive Bias Temperature Instability (PBTI), and Time Dependent Dielectric Breakdown (TDDB). The HCI aging is mainly influenced by the signal switching frequency of a device grid electrode, and the aging can not recover automatically; NBTI/PBTI aging is mainly influenced by the long-time conduction state of the device, and when the device is closed, certain recovery can be carried out automatically; while TDDB aging depends on the total number of charges, i.e., the magnitude of the current, flowing through the device.
The chip is composed of a plurality of unit circuits with different functions, and the input signal characteristics of the different unit circuits are different. Among them, some unit circuits may have their input signals inverted at a high frequency, such as a clock signal generating unit, which is more susceptible to the aging of HCI. Some cell circuits may be left in a static on state for a long time, such as state machines, address signals, etc., and are more susceptible to NBTI/PBTI aging. The main function of some unit circuits is to generate a large amount of current, and devices inside the unit circuits are more susceptible to the aging effect of the TDDB. The existing chip aging monitoring scheme generally only monitors the chip aging which is affected by a specific aging phenomenon.
Disclosure of Invention
In view of this, embodiments of the present invention provide a device, a method, a chip and a server for monitoring a chip aging state, which are convenient for monitoring the chip affected by different types of aging phenomena.
In a first aspect, an embodiment of the present invention provides a chip aging state monitoring circuit, including: the power supply comprises a switch unit, a power supply and an oscillator;
the control end of the pull-up circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest holding time and a node with the largest flowing current, the input end of the pull-up circuit is configured to be connected with a ground terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded and used for changing the voltage to ground of the oscillator, and the power supply output end is connected with the input end of the oscillator and used for supplying power to the oscillator;
the switch unit is used for controlling the on-off of the pull-up circuit and the circuit where the oscillator is located;
or, the control end of the pull-down circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest retention time and a node with the largest flowing current, the input end of the pull-down circuit is configured to be connected with the power supply, and the output end of the pull-down circuit is configured to be connected with the input end of the oscillator and used for changing the input voltage of the oscillator;
the switch unit is used for controlling the on-off of a circuit where the pull-down circuit and the oscillator are located; alternatively, the first and second electrodes may be,
the control ends of the pull-up circuit and the pull-down circuit are respectively configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest retention time and a node with the largest current, the input end of the pull-up circuit is configured to be connected with a ground terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded, the power supply is configured to be connected with the input end of the oscillator, and the pull-up circuit is used for changing the voltage to ground of the oscillator; the input end of the pull-down circuit is configured to be connected with the power supply, the output end of the pull-down circuit is configured to be connected with the input end of the oscillator, and the pull-down circuit is used for changing the input voltage of the oscillator;
the switch unit is used for controlling the on-off of the pull-up circuit and the pull-down circuit and a circuit where the oscillator is located;
the oscillator is used for outputting at least two groups of oscillation frequencies.
With reference to the first aspect, in a first implementation manner of the first aspect, when the monitoring circuit includes a pull-up circuit, the pull-up circuit includes at least a first pull-up circuit and a second pull-up circuit;
the control end of the first pull-up circuit is configured to be connected with a dynamic signal source with the highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a static signal source with the longest retention time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest retention time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal; alternatively, the first and second electrodes may be,
the control end of the first pull-up circuit is configured to be connected with a static signal source with the longest retention time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the oscillator comprises a first oscillator and a second oscillator, the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the output end of the first pull-up circuit is grounded, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output end of the second pull-up circuit is grounded;
the switch unit is specifically used for receiving a start signal, enabling a first pull-up circuit and a circuit where the first oscillator is located to be conducted, and enabling a second pull-up circuit and a circuit where the second oscillator is located to be conducted, wherein the first pull-up circuit is used for changing the voltage to ground of the first oscillator, and the second pull-up circuit is used for changing the voltage to ground of the second oscillator;
the first oscillator is used for generating an oscillating signal based on the change of the voltage to ground and outputting a first group of oscillating frequencies;
and a second oscillator for generating an oscillation signal based on a change in the voltage to ground and outputting a second group of oscillation frequencies. With reference to the first aspect, the first embodiment of the first aspect, in a second embodiment of the first aspect,
when the monitoring circuit comprises a pull-down circuit, the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit;
the control end of the first pull-down circuit is configured to be connected with a dynamic signal source with the highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-down circuit is configured to be connected with a static signal source with the longest retention time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest retention time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal; alternatively, the first and second electrodes may be,
the control end of the first pull-down circuit is configured to be connected with a static signal source with the longest retention time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-down circuit is configured to be connected with a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the oscillator comprises a first oscillator and a second oscillator, the first oscillator is connected with the output end of the first pull-down circuit, and the second oscillator is connected with the output end of the second pull-down circuit;
the switch unit is specifically configured to receive a start signal, enable the first pull-down circuit to be connected with a circuit where the first oscillator is located, enable the second pull-down circuit to be connected with a circuit where the second oscillator is located, and enable the power supply to supply power to the first oscillator through the first pull-down circuit and supply power to the second oscillator through the second pull-down circuit;
the first oscillator is used for generating an oscillating signal based on the change of the input voltage and outputting a first group of oscillating frequencies;
and the second oscillator is used for generating an oscillation signal based on the change of the input voltage to generate an oscillation signal and outputting a second group of oscillation frequencies.
With reference to the first aspect, the first or second embodiments of the first aspect, in a third embodiment of the first aspect,
when the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit, and the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit;
the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with the highest turnover rate in a chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest retention time or a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the static signal source with the longest retention time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal; alternatively, the first and second electrodes may be,
the control ends of the first pull-up circuit and the first pull-down circuit are respectively configured to be connected with a static signal source with the longest retention time in a chip, and are used for receiving an electric signal output by the static signal source and determining whether to be conducted according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the oscillator comprises a first oscillator, a second oscillator, a third oscillator and a fourth oscillator, wherein the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output ends of the first pull-up circuit and the second pull-up circuit are respectively grounded; the input end of the third oscillator is connected with the output end of the first pull-down circuit, and the input end of the fourth oscillator is connected with the output end of the second pull-down circuit;
the switch unit is specifically used for receiving a starting signal to enable the first pull-up circuit to be conducted with a circuit where the first oscillator is located, the first pull-down circuit to be conducted with a circuit where the third oscillator is located, the second pull-up circuit to be conducted with a circuit where the second oscillator is located and the second pull-down circuit to be conducted with a circuit where the fourth oscillator is located;
the first oscillator, the second oscillator, the third oscillator and the fourth oscillator are used for respectively generating a group of oscillation frequencies based on the change of respective input voltages.
With reference to any one of the first to third embodiments of the first aspect, in a fourth embodiment of the first aspect,
when the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit and a third pull-up circuit, the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit and a third pull-down circuit, and the oscillator comprises a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator and a sixth oscillator; the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with the highest turnover rate in a chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with the static signal source with the longest retention time in the chip, and are used for receiving the electric signal output by the static signal source with the longest retention time and determining whether to be conducted according to the electric signal;
the control ends of the third pull-up circuit and the third pull-down circuit are respectively configured to be connected with a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the ground terminal of the first oscillator is connected with the input terminal of a first pull-up circuit, the ground terminal of the second oscillator is connected with the input terminal of a second pull-up circuit, the third oscillator is connected with the output terminal of a first pull-down circuit, the fourth oscillator is connected with the output terminal of a second pull-down circuit, the ground terminal of the fifth oscillator is connected with the input terminal of a third pull-up circuit, the sixth oscillator is connected with the output terminal of a third pull-down circuit, and the output terminals of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit are respectively grounded;
the switch unit is specifically used for receiving a starting signal to enable a first pull-up circuit to be conducted with a circuit where a first oscillator is located, a first pull-down circuit to be conducted with a circuit where a third oscillator is located, a second pull-up circuit to be conducted with a circuit where a second oscillator is located, a second pull-down circuit to be conducted with a circuit where a fourth oscillator is located, a third pull-up circuit to be conducted with a circuit where a fifth oscillator is located, and a third pull-down circuit to be conducted with a circuit where a sixth oscillator is located;
the first oscillator, the second oscillator, the third oscillator, the fourth oscillator, the fifth oscillator and the sixth oscillator are used for respectively generating a group of oscillation frequencies based on the change of respective input voltages.
With reference to any one of the first to fourth implementation manners of the first aspect, in a fifth implementation manner of the first aspect, the monitoring circuit further includes a frequency comparator, an input end of the frequency comparator is connected to the output end of the oscillator, and the frequency comparator is configured to receive at least two sets of frequencies output by the oscillator and compare magnitudes of oscillation frequency values of the two sets of frequencies at the same time.
With reference to any one of the first to fifth implementation manners of the first aspect, in a sixth implementation manner of the first aspect, the monitoring circuit further includes a voltage frequency adjuster, an input end of the voltage frequency adjuster is connected to an output end of the frequency comparator, and the voltage frequency adjuster is configured to receive a minimum frequency value, which is output by the frequency comparator and is indicative of an aging state of the chip, and perform frequency compensation on the corresponding component based on the minimum frequency value.
In a second aspect, an embodiment of the present invention provides a method for monitoring a chip aging state, including:
connecting a control end of the pull-up circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the grounding end of an oscillator generates voltage rise;
the switch unit receives the starting signal, the pull-up circuit is conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, and the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit;
the oscillator generates an oscillation signal based on the change of the voltage to ground and outputs at least two groups of oscillation frequencies; alternatively, the first and second electrodes may be,
connecting a control end of the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-down circuit to control the on-off of the pull-down circuit, and after the pull-down circuit is switched on, the output end of the pull-down circuit generates voltage drop;
the switch unit receives the starting signal to enable the pull-down circuit to be conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit;
the oscillator generates oscillation signals based on the change of the input voltage and outputs at least two groups of oscillation frequencies; alternatively, the first and second electrodes may be,
respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip, so that the currents at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit;
the switch unit receives a starting signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the input voltage of the oscillator changes;
the oscillator respectively generates oscillation signals based on the change of the voltage to ground and the input voltage and outputs at least two groups of oscillation frequencies.
With reference to the second aspect, in a first implementation manner of the second aspect, the oscillator includes a first oscillator and a second oscillator;
when a pull-up circuit is involved in the method, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit;
the step of connecting the control end of the pull-up circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, wherein after the pull-up circuit is conducted, the step of generating voltage rise by the grounding end of the oscillator comprises the following steps:
connecting the control end of the first pull-up circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control end of the first pull-up circuit, and enabling the grounding end of the first oscillator to generate voltage rise after the first pull-up circuit is driven to be conducted; connecting the control end of the second pull-up circuit to a static signal source with the longest retention time or a node with the largest flowing current in the chip, enabling the current of the static signal source with the longest retention time or the node with the largest flowing current to flow into the control end of the second pull-up circuit, and enabling the grounding end of the second oscillator to generate voltage rise after the second pull-up circuit is driven to be conducted; alternatively, the first and second electrodes may be,
connecting the control end of the first pull-up circuit to a static signal source with the longest retention time in a chip, enabling the current at the static signal source with the longest retention time to flow into the control end of the first pull-up circuit, and enabling the grounding end of the first oscillator to generate voltage rise after the first pull-up circuit is driven to be conducted; the control end of the second pull-up circuit is connected to the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise;
the switch unit receives the opening signal, and pull-up circuit and oscillator place circuit switch on, and power supply supplies power to the oscillator, and under the partial pressure effect of pull-up circuit, the earth voltage of oscillator changes and includes: the switch unit receives a starting signal, so that a circuit where a first pull-up circuit and a first oscillator are located is conducted, a circuit where a second pull-up circuit and a second oscillator are located is conducted, a power supply supplies power to the first oscillator and the second oscillator respectively, the voltage to ground of the first oscillator changes under the voltage division effect of the first pull-up circuit, and the voltage to ground of the second oscillator changes under the voltage division effect of the second pull-up circuit;
the oscillator generates an oscillation signal based on a change in a voltage to ground, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates oscillation signals based on the change of the voltage to ground and outputs a first group of oscillation frequencies, and the second oscillator generates oscillation signals based on the change of the voltage to ground and outputs a second group of oscillation frequencies; alternatively, the first and second electrodes may be,
when a pull-down circuit is involved in the method, the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit;
the step of connecting the control end of the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-down circuit, and after the pull-up circuit is conducted, the step of generating voltage rise at the output end of the pull-down circuit comprises the following steps:
connecting the input end of the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control end of the first pull-down circuit, and enabling the output end of the first pull-down circuit to generate voltage drop after the first pull-down circuit is driven to be conducted; the input end of the second pull-down circuit is connected to the static signal source with the longest holding time or the node with the largest flowing current, so that the current of the static signal source with the longest holding time or the node with the largest flowing current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; alternatively, the first and second electrodes may be,
connecting the input end of the first pull-down circuit to the static signal source with the longest holding time, enabling the current at the static signal source with the longest holding time to flow into the control end of the first pull-down circuit, and enabling the output end of the first pull-down circuit to generate voltage drop after the first pull-down circuit is driven to be conducted; the input end of the second pull-down circuit is connected to the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop;
the switch unit receives the opening signal, makes pull-down circuit and oscillator place circuit switch on, and power supply includes to the oscillator power supply through pull-down circuit: the switch unit receives the starting signal, so that the first pull-down circuit is conducted with a circuit where the first oscillator is located, the second pull-down circuit is conducted with a circuit where the second oscillator is located, the power supply supplies power to the first oscillator through the first pull-down circuit, and supplies power to the second oscillator through the second pull-down circuit;
the oscillator generates an oscillation signal based on the change of the input voltage, and the outputting at least two groups of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in the input voltage and outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in the input voltage and outputs a second set of oscillation frequencies.
With reference to the first embodiment of the second aspect, in a second embodiment of the second aspect,
when a pull-up circuit and a pull-down circuit are involved in the method, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit, the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit, and the oscillator comprises a first oscillator, a second oscillator, a third oscillator and a fourth oscillator;
the step of respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip to enable the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip to flow into the control ends of the pull-up circuit and the pull-down circuit so as to control the on-off of the pull-up circuit and the pull-down circuit, wherein after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the voltage drop generated at the output end: respectively connecting the control ends of the first pull-up circuit and the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to respectively flow into the control ends of the first pull-up circuit and the first pull-down circuit, and after driving the first pull-up circuit and the first pull-down circuit to be respectively conducted, generating voltage rise at the grounding end of the first oscillator and generating voltage drop at the output end of the first pull-down circuit; the control ends of the second pull-up circuit and the second pull-down circuit are respectively connected to a static signal source with the longest holding time or a node with the largest flowing current in a chip, so that the current of the static signal source with the longest holding time or the node with the largest flowing current respectively flows into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; alternatively, the first and second electrodes may be,
the input ends of the first pull-up circuit and the first pull-down circuit are respectively connected to the static signal source with the longest holding time, so that the current at the static signal source with the longest holding time respectively flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected to the nodes with the largest flowing current, so that the current at the nodes with the largest flowing current respectively flows into the control ends of the second pull-up circuit and the second pull-down circuit;
the switch unit receives the opening signal, makes pull-up circuit and pull-down circuit conduct with the circuit that the oscillator belongs to respectively, and power supply includes to the oscillator power supply through pull-up circuit and pull-down circuit: the switch unit receives a starting signal, so that a first pull-up circuit is conducted with a circuit where a first oscillator is located, a first pull-down circuit is conducted with a circuit where a third oscillator is located, a second pull-up circuit is conducted with a circuit where a second oscillator is located, a second pull-down circuit is conducted with a circuit where a fourth oscillator is located, a power supply supplies power to the first oscillator and the second oscillator, and the voltage to ground of the first oscillator and the voltage to ground of the second oscillator change under the voltage division effect of the first pull-up circuit and the second pull-up circuit respectively; the power supply also supplies power to the third oscillator through the first pull-down circuit and supplies power to the fourth oscillator through the second pull-down circuit, and the input voltages of the third oscillator and the fourth oscillator are changed;
the oscillator generates an oscillation signal based on changes of a voltage to ground and an input voltage, and outputting at least two sets of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in voltage to ground and outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in voltage to ground and outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in input voltage and outputs a third set of oscillation frequencies, and the fourth oscillator generates an oscillation signal based on a change in input voltage and outputs a fourth set of oscillation frequencies.
With reference to any one of the first to second embodiments of the second aspect, in a third embodiment of the second aspect,
when a pull-up circuit and a pull-down circuit are involved in the method, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit and a third pull-up circuit, the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit and a third pull-down circuit, and the oscillator comprises a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator and a sixth oscillator;
the step of respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip to enable the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip to flow into the control ends of the pull-up circuit and the pull-down circuit so as to control the on-off of the pull-up circuit and the pull-down circuit, wherein after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the voltage drop generated at the output end: respectively connecting the control ends of the first pull-up circuit and the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control ends of the first pull-up circuit and the first pull-down circuit, enabling the grounding end of the first oscillator to generate voltage rise and the output end of the first pull-down circuit to generate voltage drop after the first pull-up circuit and the first pull-down circuit are driven to be conducted; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected to the static signal source with the longest holding time, so that the current at the static signal source with the longest holding time flows into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; the input ends of the third pull-up circuit and the third pull-down circuit are respectively connected to a node with the largest flowing current, so that the current at the node with the largest flowing current flows into the control ends of the third pull-up circuit and the third pull-down circuit, after the third pull-up circuit and the third pull-down circuit are driven to be conducted, the grounding end of the fifth oscillator generates voltage rise, and the output end of the third pull-down circuit generates voltage drop;
the switch unit receives the start signal, makes pull-up circuit and pull-down circuit conduct with the circuit that the oscillator belongs to respectively, and power supply supplies power to the oscillator, and under the partial pressure effect of pull-up circuit, the voltage to ground of oscillator changes, and power supply still supplies power to the oscillator via pull-down circuit, and the input voltage of oscillator changes and includes: the switch unit receives a starting signal, so that a first pull-up circuit is conducted with a circuit where a first oscillator is located, a first pull-down circuit is conducted with a circuit where a third oscillator is located, a second pull-up circuit is conducted with a circuit where a second oscillator is located, a second pull-down circuit is conducted with a circuit where a fourth oscillator is located, a third pull-up circuit is conducted with a circuit where a fifth oscillator is located, a third pull-down circuit is conducted with a circuit where a sixth oscillator is located, a power supply supplies power to the first oscillator, the second oscillator and the fifth oscillator respectively, the voltage-to-ground voltage of the first oscillator changes under the voltage division effect of the first pull-up circuit, the voltage-to-ground voltage of the second oscillator changes under the voltage division effect of the second pull-up circuit, and the voltage-to-ground voltage of the fifth oscillator changes under the voltage division effect of the third pull-up circuit; the power supply also supplies power to the third oscillator through the first pull-down circuit, supplies power to the fourth oscillator through the second pull-down circuit, and supplies power to the sixth oscillator through the third pull-down circuit;
the oscillator respectively generates oscillation signals based on changes of a voltage to ground and an input voltage, and outputting at least two groups of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in voltage to ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in voltage to ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on a change in input voltage, outputs a fourth set of oscillation frequencies, the fifth oscillator generates an oscillation signal based on a change in voltage to ground, outputs a fifth set of oscillation frequencies, the sixth oscillator generates an oscillation signal based on a change in input voltage, and outputs a sixth set of oscillation frequencies.
With reference to any one of the first to third embodiments of the second aspect, in a fourth embodiment of the second aspect, after the oscillator generates the oscillation signal based on the change of the input voltage and outputs at least two sets of oscillation frequencies, the method further includes:
comparing the oscillation frequency values of the two groups of frequencies at the same moment;
and determining the aging state of the chip based on the oscillation frequency value with the smaller comparison result.
With reference to any one of the first to fourth embodiments of the second aspect, in a fifth embodiment of the second aspect, after the oscillator generates the oscillation signal based on the variation of the input voltage and outputs at least two sets of oscillation frequencies, the method further includes: comparing each group of oscillation frequency with a reference frequency value respectively;
and determining the aging state of the chip according to the comparison result.
With reference to any one of the first to fifth embodiments of the second aspect, in a sixth embodiment of the second aspect, after determining the aging state of the chip, the method further includes: and performing frequency compensation on the corresponding element based on the minimum frequency value.
With reference to any one of the first to sixth implementation manners of the second aspect, in a seventh implementation manner of the second aspect, the pull-up circuit includes a MOS transistor, and the oscillator is a voltage-controlled oscillator.
In a third aspect, an embodiment of the present invention provides a chip, including a substrate, where a power switch device and the chip aging state monitoring circuit described in any one of the first aspect are disposed on the substrate, and a control end of a pull-up and/or pull-down circuit of the chip aging state monitoring circuit is connected to at least two of a dynamic signal source device with a highest flip rate, a static signal source device with a longest retention time, and a line node with a largest flowing current on the substrate, and is used for monitoring an aging state of the chip.
In a fourth aspect, an embodiment of the present invention provides a server, including a chassis, where a motherboard is disposed in the chassis, and the chip of the third aspect is mounted on the motherboard.
The chip aging state monitoring circuit, the method, the chip and the server provided by the embodiment of the invention comprise a switch unit, a power supply and an oscillator; pull-up and/or pull-down circuits are also included. Unit circuits such as clock signal generation units, which are turned over at high frequency, are generally susceptible to aging effects of HCI; unit circuits which are in a static on state for a long time, such as a state machine, an address signal and the like, are generally easily influenced by NBTI/PBTI aging; some devices inside the cell circuit, which generate a large amount of current, are generally susceptible to aging of the TDDB. When the monitoring circuit is applied, the control end of the pull-up and/or pull-down circuit is connected to at least two of a dynamic signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip; the node which is easy to generate various aging phenomena is monitored, reflected on the influence on the conduction performance of a typical pull-up and pull-down circuit, and further influences the actual power supply voltage of the oscillator, namely the input voltage of the oscillator which is described in some places, the oscillator outputs at least two corresponding groups of oscillation frequencies based on the change of the input voltage and/or the voltage to ground, and the aging state affected condition of the current chip can be determined according to the two groups of oscillation frequencies, so that the influence of different types of aging phenomena on the chip can be monitored conveniently.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a circuit diagram of a chip aging status monitoring circuit according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of another embodiment of a chip aging status monitoring circuit according to the present invention;
FIG. 3 is a circuit block diagram of another embodiment of a method for monitoring a chip aging state according to the present invention;
FIG. 4 is a circuit diagram of a chip aging status monitoring method according to another embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The chip aging state monitoring circuit, the method, the chip and the server provided by the embodiment of the invention are suitable for chip aging test, performance monitoring and integrated circuit design occasions; for example, chip testing before shipment, chip monitoring during use, and chip integrated circuit design in product development.
Example one
FIG. 1 is a circuit diagram of a chip aging status monitoring circuit according to an embodiment of the present invention; referring to fig. 1, the chip aging status monitoring circuit provided in this embodiment includes: switch element, power supply and oscillator.
The control end of the pull-up circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest holding time and a node with the largest flowing current, the input end of the pull-up circuit is configured to be connected with a ground terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded and used for changing the voltage to ground of the oscillator, and the power supply output end is connected with the input end of the oscillator and used for supplying power to the oscillator.
The dynamic signal source with the highest chip turnover rate, the static signal source with the longest retention time and the node with the largest flowing current are represented by an HCI (hybrid control interface) compression signal source, an NBTI (negative band interference)/PBTI compression signal source and a TDDB (time dependent data base) compression signal source in the drawing respectively.
The dynamic signal source can be a clock signal generating unit, and because the signal is inverted at high frequency, the dynamic signal source is more easily influenced by aging of HCI compared with other circuits, nodes or electronic components in a chip. Therefore, the influence of the HCI type aging phenomenon on the chip can be reversely inferred according to the influence of the signal source on the pull-up circuit by connecting the control end of the pull-up circuit to a dynamic signal source with high turnover frequency.
The static signal source with the longest retention time can be a state machine, an address signal and the like, and the circuits, nodes or electronic components are more easily influenced by NBTI/PBTI aging. Therefore, the influence of the NBTI/PBTI type aging phenomenon on the chip can be reversely inferred according to the influence of the signal source on the pull-up circuit by connecting the control terminal of the pull-up circuit to the static signal source with the longest holding time.
The node where the current flows at the maximum may cause the output node of the unit circuit generating a large amount of current, since devices inside such unit circuit are more susceptible to the aging effect of the TDDB. Therefore, by connecting the control terminal of the pull-up circuit to the node where the current flowing through the node is the largest, it can be reversely inferred that the chip is affected by the TDDB type aging phenomenon from the effect of the current of the node on the pull-up circuit.
And the switch unit is used for controlling the on-off of the pull-up circuit and the circuit where the oscillator is located. The specific setting position of the switch unit is not limited as long as the on-off of the pull-up circuit and the circuit where the oscillator is located can be controlled. For example, whether the switch unit is arranged between the pull-up circuit and the oscillator or arranged on a node before the pull-up circuit does not influence the on-off of the circuit where the pull-up circuit and the oscillator are arranged.
The oscillator is used for outputting at least two groups of oscillation frequencies.
It can be understood that different aging degrees may affect a Threshold Voltage (vth) of the pull-up circuit, and after the pull-up circuit is turned on, a Voltage rise may be generated at a ground terminal of the oscillator, the Voltage of the oscillator to the ground may change, and when the power supply supplies power to the oscillator, the oscillator may generate an oscillation signal and output a corresponding oscillation frequency. Therefore, the oscillation frequency value is correlated with the aging degree, and the aging state of the chip can be determined reversely according to the oscillation frequency.
It should be noted that, in a conventional usage, the pull-up circuit is usually connected to a power supply VDD for pulling up a level signal. The pull-up circuit is connected to the common ground (power ground) terminal of the oscillator (also essentially the current output terminal of the oscillator), i.e. to ground. Therefore, the pull-up circuit can cause the voltage of the oscillator to rise to the ground, the voltage rise is positively correlated with the threshold voltage Vth of the pull-up circuit, different aging stresses can affect the Vth of the pull-up circuit, the actual voltage to the ground of the oscillator is further changed, the oscillator generates an oscillation signal, the oscillation frequency under the corresponding type of aging stress is output, the aging state of the related elements of the chip can be reflected or judged based on the oscillation frequency, and the aging state and the performance of the chip can be integrally represented.
In addition, through the circuit, at least two different signal sources or nodes are monitored, namely different aging phenomena are monitored, and the influence of the signals of the at least two signal sources or nodes on the oscillator at least outputs two groups of oscillation frequencies to be respectively used for determining the aging degree of the corresponding type.
In other embodiments, the pull-up circuit may be replaced with a pull-down circuit. Specifically, the monitoring circuit comprises a switch unit, a power supply, an oscillator, and a pull-down circuit, wherein a control end of the pull-down circuit is configured to be connected to at least two of a dynamic signal source with the highest chip flip rate, a static signal source with the longest retention time, and a node with the largest current, an input end of the pull-down circuit is configured to be connected to the power supply, and an output end of the pull-down circuit is configured to be connected to an input end of the oscillator, and is used for changing the input voltage of the oscillator; the switch unit is used for controlling the on-off of a circuit where the pull-down circuit and the oscillator are located; the oscillator is used for outputting at least two groups of oscillation frequencies.
As explained above for the pull-up circuit function, the conventional usage of the pull-down circuit is typically to connect the power supply ground voltage VSS (specifically the circuit common ground voltage, i.e., the power supply negative terminal) for pulling down the output terminal level of the device. The pull-down circuit in this application is connected to the power supply VDD, and the pull-down circuit will introduce a voltage drop at the input terminal of the oscillator (the input terminal of the oscillator is referred to as the power interface of the oscillator). Therefore, the input voltage (or called as actual power supply voltage) of the oscillator is reduced by the pull-down circuit, the voltage drop is positively correlated with the threshold voltage Vth of the pull-down circuit, different aging oppression can affect the Vth of the pull-down circuit, the actual power supply voltage for the oscillator is changed, the oscillator generates an oscillation signal, the oscillation frequency under the corresponding type of aging oppression is output, the aging state of related elements of the chip can be reflected or judged based on the oscillation frequency, and the aging state and the performance of the chip are integrally represented. .
In still other embodiments, the monitoring circuit further includes a pull-up circuit and a pull-down circuit, in addition to the switching unit, the power supply, and the oscillator, control terminals of the pull-up circuit and the pull-down circuit are respectively configured to connect at least two of a dynamic signal source with the highest chip flip rate, a static signal source with the longest retention time, and a node with the largest flowing current, input terminals of the pull-up circuit and the pull-down circuit are respectively configured to connect the power supply, and output terminals of the pull-up circuit and the pull-down circuit are respectively configured to connect an input terminal of the oscillator, for changing an input voltage of the oscillator; the switch unit is used for controlling the on-off of a circuit where the pull-down circuit and the oscillator are located; the oscillator is used for outputting at least two groups of oscillation frequencies.
In the embodiment, the connection and the principle description of the pull-up and pull-down circuits are basically the same as those in the first two embodiments, the pull-up circuit and the pull-down circuit which are different from the conventional connection are matched to realize the voltage division effect, and the oscillator is supplied with power after voltage division, so that the actual power supply voltage and the voltage to ground of the oscillator change along with the influence of different aging states, an oscillation signal is generated, and different oscillation frequencies are output to reflect the degrees of different aging types.
In addition, the aging state of the chip is monitored by adopting the pull-up circuit and the pull-down circuit, the same type of aging state can be reflected by the oscillation frequency generated by the actual power supply voltage and the actual ground voltage of the oscillator respectively, different monitoring values can be verified mutually, and the monitoring accuracy can be ensured to a certain extent.
Based on the above description, the chip aging state monitoring circuit provided by the embodiment of the invention includes a switch unit, a power supply and an oscillator; pull-up and/or pull-down circuits are also included. Unit circuits such as clock signal generation units, which are turned over at high frequency, are generally susceptible to aging effects of HCI; unit circuits which are in a static on state for a long time, such as a state machine, an address signal and the like, are generally easily influenced by NBTI/PBTI aging; some devices inside the cell circuit, which generate a large amount of current, are generally susceptible to aging of the TDDB. When the monitoring circuit is applied, the control end of the pull-up and/or pull-down circuit is connected to at least two of a dynamic signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip; monitoring nodes where various aging phenomena easily occur, reflecting on the influence on the conduction performance of a typical pull-up and pull-down circuit, and further influencing the actual power supply voltage of the oscillator, wherein the oscillator outputs at least two corresponding groups of oscillation frequencies based on the change of input voltage and/or voltage to ground, and the condition that the aging state of the current chip is influenced can be determined according to the two groups of oscillation frequencies, so that the chip is conveniently monitored under the influence of the aging phenomena of different types.
When the monitoring circuit comprises a pull-up circuit, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit;
the control end of the first pull-up circuit is configured to be connected with a dynamic signal source with the highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with the static signal source with the longest holding time or the node with the largest flowing current in the chip, and is used for receiving the electric signal output by the static signal source with the longest holding time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal. (ii) a
Alternatively, in an alternative embodiment of this embodiment,
the control end of the first pull-up circuit is configured to be connected with a static signal source with the longest retention time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the node with the largest flowing current and determining whether to conduct or not according to the electric signal.
The oscillator comprises a first oscillator and a second oscillator, the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the output end of the first pull-up circuit is grounded, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output end of the second pull-up circuit is grounded.
The switch unit is specifically configured to receive a start signal, to turn on a circuit where the first pull-up circuit and the first oscillator are located, and to turn on a circuit where the second pull-up circuit and the second oscillator are located, where the first pull-up circuit is configured to change a voltage to ground of the first oscillator, and the second pull-up circuit is configured to change a voltage to ground of the second oscillator. The first oscillator is used for generating an oscillating signal based on the change of the voltage to ground and outputting a first group of oscillating frequencies; and a second oscillator for generating an oscillation signal based on a change in the voltage to ground and outputting a second group of oscillation frequencies.
In this embodiment, the first pull-up circuit and the second pull-up circuit are adopted to respectively and correspondingly acquire different signal sources, the voltage to ground of the output end (namely, the common ground end) of the oscillator is influenced, the oscillator respectively and correspondingly outputs two groups of oscillation frequencies, and the aging degrees of different aging phenomena can be intuitively obtained.
In some embodiments, when the monitoring circuit comprises a pull-down circuit, the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit.
The control end of the first pull-down circuit is configured to be connected with a dynamic signal source with the highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted or not according to the electric signal. The control end of the second pull-down circuit is configured to be connected with a static signal source with the longest retention time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest retention time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal.
Or, in some embodiments, the control terminal of the first pull-down circuit is configured to be connected to a static signal source with the longest retention time in a chip, and is configured to receive an electrical signal output by the static signal source and determine whether to conduct according to the electrical signal.
The control end of the second pull-down circuit is configured to be connected with a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal.
The oscillator comprises a first oscillator and a second oscillator, the first oscillator is connected with the output end of the first pull-down circuit, and the second oscillator is connected with the output end of the second pull-down circuit.
The switch unit is specifically configured to receive a start signal, enable the first pull-down circuit to be conductive to a circuit where the first oscillator is located, enable the second pull-down circuit to be conductive to a circuit where the second oscillator is located, and enable the power supply to supply power to the first oscillator through the first pull-down circuit and to supply power to the second oscillator through the second pull-down circuit.
The first oscillator is used for generating an oscillating signal based on the change of the input voltage and outputting a first group of oscillating frequencies;
and the second oscillator is used for generating an oscillation signal based on the change of the input voltage to generate an oscillation signal and outputting a second group of oscillation frequencies.
When the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit at least comprises a first pull-up circuit and a second pull-up circuit, and the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit.
In still other embodiments, the first pull-up circuit and the first pull-down circuit are respectively connected to a dynamic signal source with the highest flip rate in a chip, and are configured to receive an electrical signal output by the dynamic signal source and determine whether to turn on according to the electrical signal.
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest holding time or a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the static signal source with the longest holding time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal.
Or, as an optional embodiment, the control ends of the first pull-up circuit and the first pull-down circuit are respectively configured to be connected to a static signal source with the longest retention time in a chip, and are configured to receive an electrical signal output by the static signal source and determine whether to be turned on according to the electrical signal.
The control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal.
In the two embodiments, the oscillator includes a first oscillator, a second oscillator, a third oscillator and a fourth oscillator, a ground terminal of the first oscillator is connected to an input terminal of a first pull-up circuit, a ground terminal of the second oscillator is connected to an input terminal of a second pull-up circuit, and output terminals of the first pull-up circuit and the second pull-up circuit are grounded, respectively; the input end of the third oscillator is connected with the output end of the first pull-down circuit, and the input end of the fourth oscillator is connected with the output end of the second pull-down circuit.
The switch unit is specifically used for receiving a starting signal to enable the first pull-up circuit to be conducted with a circuit where the first oscillator is located, the first pull-down circuit to be conducted with a circuit where the third oscillator is located, the second pull-up circuit to be conducted with a circuit where the second oscillator is located and the second pull-down circuit to be conducted with a circuit where the fourth oscillator is located;
the first oscillator, the second oscillator, the third oscillator and the fourth oscillator are used for respectively generating a group of oscillation frequencies based on the change of respective input voltages. I.e., four sets of oscillation frequencies are output in total in this embodiment.
Referring to fig. 2, when the monitoring circuit includes a pull-up circuit and a pull-down circuit, the pull-up circuit includes a first pull-up circuit, a second pull-up circuit, and a third pull-up circuit, the pull-down circuit includes a first pull-down circuit, a second pull-down circuit, and a third pull-down circuit, and the oscillators include a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator, and a sixth oscillator; the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with the highest turnover rate in a chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted or not according to the electric signal.
And the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with the static signal source with the longest retention time in the chip, and are used for receiving the electric signal output by the static signal source with the longest retention time and determining whether to be conducted according to the electric signal.
The control ends of the third pull-up circuit and the third pull-down circuit are respectively configured to be connected with a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the ground terminal of the first oscillator is connected with the input terminal of the first pull-up circuit, the ground terminal of the second oscillator is connected with the input terminal of the second pull-up circuit, the third oscillator is connected with the output terminal of the first pull-down circuit, the fourth oscillator is connected with the output terminal of the second pull-down circuit, the ground terminal of the fifth oscillator is connected with the input terminal of the third pull-up circuit, the sixth oscillator is connected with the output terminal of the third pull-down circuit, and the output terminals of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit are respectively grounded.
The switch unit is specifically configured to receive a start signal, so that the first pull-up circuit is connected to a circuit where the first oscillator is located, the first pull-down circuit is connected to a circuit where the third oscillator is located, the second pull-up circuit is connected to a circuit where the second oscillator is located, the second pull-down circuit is connected to a circuit where the fourth oscillator is located, the third pull-up circuit is connected to a circuit where the fifth oscillator is located, and the third pull-down circuit is connected to a circuit where the sixth oscillator is located.
The first oscillator, the second oscillator, the third oscillator, the fourth oscillator, the fifth oscillator and the sixth oscillator are used for respectively generating a group of oscillation frequencies based on the change of respective input voltages. Namely, in the present embodiment, six sets of oscillation frequencies are output.
The pull-up circuit and the pull-down circuit may be formed by power switching devices, such as mos (metal oxide semiconductor) transistors, and the oscillator is a voltage-controlled oscillator.
In one specific implementation, the pull-up circuit is formed of PMOS and the pull-down circuit is formed of NMOS, as shown in fig. 3.
To help understand the technical solution and the technical effect of the embodiment of the present invention, the following analysis is performed by taking fig. 2 as an example: the HCI forcing signal source 101 shown in fig. 2 selects the signal of the element or unit circuit with the highest flip rate in the chip. The NBTI/PBTI forces the signal source 102. The static signal that has been held in the chip for the longest time is selected. TDDB stress signal 103 is selected to be the wire node of the chip through which the current is the largest. 104. 105 are typical pull-down and typical pull-up circuits, respectively, forced by HCI. 106. 107 are typical pull-down and pull-up circuits, respectively, stressed by NBTI/PBTI. 108. 109 are typical pull-down and typical pull-up circuits, respectively, that are stressed by TDDB. 110 is a switch unit, which is used as a test starting switch, and when the switch unit 110 is closed, only 101 to 109 work; 110 are turned on, 111 to 122 are operated. 111 is the voltage drop affected by 104 and 112 is the voltage rise affected by 105. 113 is the voltage drop affected by 106, 114 is the voltage rise affected by 107, 115 is the voltage drop affected by 108, and 116 is the voltage rise affected by 109.
As previously mentioned: due to different aging stresses, the Vth of the pull-up and pull-down circuits is affected, thereby changing the actual supply voltage vvdd and the voltage to ground vvss to the 117 to 122 oscillating circuits. The method specifically comprises the following steps: for oscillator 117: vvdd 1-VDD-111, vvss 1-VSS; the oscillator 118: vvdd 2-VDD, vvss 2-VSS + 112; the oscillator 119: VDD-113 for Vvdd3 and VSS3 for VSS; the oscillator 120: vvdd 4-VDD, vvss 4-VSS + 114; the oscillator 121: vvdd 5-VDD-115, vvss 5-VSS; the oscillator 122: vvdd 6-VDD and vvss 6-VSS + 116.
The oscillation frequency of the oscillators 117 to 122 depends on their actual supply voltage and voltage to ground magnitude, which depend on the degree to which 104 to 109 are affected by aging. Therefore, according to the action relationship, the aging degrees of different types can be reversely deduced or judged through the oscillation frequency of the oscillator, and the aging state of the whole chip can be reflected.
Referring to fig. 4, it can be understood that the above scheme can monitor various types of aging states after the chip is aged. In practical situations, the aging species that have the most serious influence on the performance of the chip are more concerned, and the performance of the device is compensated. Therefore, in some embodiments, the monitoring circuit further includes a frequency comparator 125, an input of the frequency comparator 125 is connected to the output of the oscillator, and is configured to receive at least two sets of frequencies output by the oscillator after the oscillator outputs the at least two sets of frequencies, and compare magnitudes of oscillation frequency values of the two sets of frequencies at the same time. After the comparison result is obtained, the aging type with the most serious influence on the chip performance by the chip can be determined based on the oscillation frequency value with a smaller comparison result, and then performance compensation is carried out. The performance compensation generally includes a voltage compensation mode and a frequency compensation mode.
With continued reference to fig. 4, performance compensation is performed on the corresponding devices after determining the type of burn-in that has the most severe impact on chip performance for convenience. In other embodiments, the monitoring circuit further includes a voltage frequency adjuster, an input terminal of the voltage frequency adjuster is connected to the output terminal of the frequency comparator, and is configured to receive a minimum frequency value output by the frequency comparator and representing the aging state of the chip, and perform frequency compensation on the corresponding component based on the minimum frequency value. By performing frequency compensation on the corresponding elements, the performance of the chip can be improved or restored to a certain extent.
It can be understood that the monitoring circuit provided in this embodiment may be specially manufactured as a device for monitoring the aging state of the chip, may also be integrated in a circuit or a device for monitoring the performance of the chip, and may also be integrated in an integrated circuit to expand the functions of the integrated circuit, for example, integrated in an integrated circuit of a chip, and may be designed as a chip with a function of self-monitoring the aging state.
Example two
The method for monitoring the aging state of the chip provided by the embodiment of the invention can be implemented by adopting the monitoring circuit including but not limited to the monitoring circuit described in the first embodiment. The method may include:
210. the control end of the pull-up circuit is connected to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise.
In this embodiment, at least two of the signal source with the highest roll-over rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip are made to flow into the control end of the pull-up circuit, so as to build a monitoring environment capable of reflecting or representing various types of aging degrees. The aging state of a component or a circuit which is easily affected by a certain aging phenomenon in the chip can be reflected through the working state of the pull-up circuit. And the working state of the pull-up circuit can be more intuitively represented through the oscillation frequency of the oscillator. And further, the influence degree of the corresponding type of aging phenomenon on the device is judged in a reverse mode.
220. The switch unit receives the opening signal, the pull-up circuit is conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, and the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit.
The usage of the pull-up circuit in this application is described in the first embodiment and will not be described here. By connecting the pull-up circuit to the common ground of the oscillator, the effects are, for example: the ground terminal of the original oscillator is at ground voltage of 0v, after the pull-up circuit is connected, the signal source inputs a voltage signal to the control terminal of the pull-up circuit, and after the pull-up circuit is conducted, the voltage signal is divided by an equivalent resistor, so that the ground voltage of the oscillator is increased, although the change is small, for example, the change is 0.1 v.
230. The oscillator generates an oscillation signal based on the change of the voltage to ground and outputs at least two sets of oscillation frequencies.
The technical solution and effects of this embodiment can be implemented based on the monitoring circuit described in the first embodiment, and the undescribed parts can be referred to each other, and are not described herein again.
In this embodiment, as an optional embodiment, the oscillator includes a first oscillator and a second oscillator; the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit.
Step 210, accessing the control end of the pull-up circuit to at least two of the signal source with the highest flip rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip, so that the currents at least two of the signal source with the highest flip rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip flow into the control end of the pull-up circuit to control the on/off of the pull-up circuit, and after the pull-up circuit is turned on, the step of generating the voltage increase by the grounding end of the oscillator includes:
connecting the control end of the first pull-up circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control end of the first pull-up circuit, and enabling the grounding end of the first oscillator to generate voltage rise after the first pull-up circuit is driven to be conducted; and connecting the control end of the second pull-up circuit to the static signal source with the longest retention time or the node with the largest flowing current in the chip, enabling the current of the static signal source with the longest retention time or the node with the largest flowing current to flow into the control end of the second pull-up circuit, and generating voltage rise by the grounding end of the second oscillator after driving the second pull-up circuit to be conducted.
Alternatively, in another alternative embodiment, the step 210 includes: connecting the control end of the first pull-up circuit to a static signal source with the longest retention time in a chip, enabling the current at the static signal source with the longest retention time to flow into the control end of the first pull-up circuit, and enabling the grounding end of the first oscillator to generate voltage rise after the first pull-up circuit is driven to be conducted; and connecting the control end of the second pull-up circuit to the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise.
In the two embodiments, step 220, the switching unit receives the start signal, the pull-up circuit is connected to the circuit where the oscillator is located, the power supply supplies power to the oscillator, and the change of the voltage to ground of the oscillator under the voltage division effect of the pull-up circuit includes: the switch unit receives the starting signal, so that the first pull-up circuit and the circuit where the first oscillator is located are conducted, the second pull-up circuit and the circuit where the second oscillator is located are conducted, the power supply supplies power to the first oscillator and the second oscillator respectively, the voltage to ground of the first oscillator changes under the voltage division effect of the first pull-up circuit, and the voltage to ground of the second oscillator changes under the voltage division effect of the second pull-up circuit.
Step 230, the oscillator generates an oscillation signal based on the change of the voltage to ground, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in voltage to ground and outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in voltage to ground and outputs a second set of oscillation frequencies.
EXAMPLE III
The chip aging state monitoring method provided by the embodiment of the invention can be implemented by adopting the monitoring circuit including but not limited to the monitoring circuit described in the first embodiment, and the technical concept is basically the same as that of the second embodiment. The method comprises the following steps:
310. the control end of the pull-down circuit is connected to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-down circuit to control the on-off of the pull-down circuit, and after the pull-down circuit is switched on, the output end of the pull-down circuit generates voltage drop.
320. The switch unit receives the starting signal to enable the pull-down circuit to be conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit; 330. the oscillator generates an oscillation signal based on the change of the input voltage and outputs at least two groups of oscillation frequencies.
Wherein, in some embodiments, the oscillator comprises a first oscillator and a second oscillator; the pull-down circuit at least comprises a first pull-down circuit and a second pull-down circuit.
Step 310, accessing the control terminal of the pull-down circuit to at least two of the signal source with the highest flip rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip, so that the currents at least two of the signal source with the highest flip rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip flow into the control terminal of the pull-down circuit, and after the pull-up circuit is turned on, the step of generating voltage rise at the output terminal comprises:
connecting the input end of the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control end of the first pull-down circuit, and enabling the output end of the first pull-down circuit to generate voltage drop after the first pull-down circuit is driven to be conducted; and connecting the input end of the second pull-down circuit to the static signal source with the longest retention time or the node with the largest flowing current, enabling the current of the static signal source with the longest retention time or the node with the largest flowing current to flow into the control end of the second pull-down circuit, and generating voltage drop at the output end of the second pull-down circuit after driving the second pull-down circuit to be conducted.
Alternatively, in other embodiments, step 310 comprises: connecting the input end of the first pull-down circuit to the static signal source with the longest holding time, enabling the current at the static signal source with the longest holding time to flow into the control end of the first pull-down circuit, and enabling the output end of the first pull-down circuit to generate voltage drop after the first pull-down circuit is driven to be conducted; and connecting the input end of the second pull-down circuit to the node with the largest flowing current, so that the current at the node with the largest flowing current flows into the control end of the second pull-down circuit, and generating voltage drop at the output end of the second pull-down circuit after driving the second pull-down circuit to be conducted.
Step 320, the switching unit receives the start signal to turn on the pull-down circuit and the circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit includes: the switch unit receives the starting signal, so that the first pull-down circuit is conducted with a circuit where the first oscillator is located, the second pull-down circuit is conducted with a circuit where the second oscillator is located, the power supply supplies power to the first oscillator through the first pull-down circuit, and supplies power to the second oscillator through the second pull-down circuit;
step 330, the oscillator generates an oscillation signal based on the change of the input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in the input voltage and outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in the input voltage and outputs a second set of oscillation frequencies.
The technical solution and effects of this embodiment can be implemented based on the monitoring circuit described in the first embodiment, and the undescribed parts can be referred to each other, and are not described herein again.
Example four
The chip aging state monitoring method provided by the embodiment of the invention can be implemented by adopting the monitoring circuit including but not limited to the monitoring circuit described in the first embodiment, and is basically the same as the technical concepts of the second and third embodiments. The method comprises the following steps:
410. respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip, so that the currents at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit;
420. the switch unit receives a starting signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the input voltage of the oscillator changes;
430. the oscillator respectively generates oscillation signals based on the change of the voltage to ground and the input voltage and outputs at least two groups of oscillation frequencies.
In this embodiment, as an optional embodiment, the pull-up circuit at least includes a first pull-up circuit and a second pull-up circuit, the pull-down circuit at least includes a first pull-down circuit and a second pull-down circuit, and the oscillator includes a first oscillator, a second oscillator, a third oscillator, and a fourth oscillator;
step 410, respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip, so that the currents at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the voltage drop generated at the output end of the pull-: respectively connecting the control ends of the first pull-up circuit and the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to respectively flow into the control ends of the first pull-up circuit and the first pull-down circuit, and after driving the first pull-up circuit and the first pull-down circuit to be respectively conducted, generating voltage rise at the grounding end of the first oscillator and generating voltage drop at the output end of the first pull-down circuit; and respectively connecting the control ends of the second pull-up circuit and the second pull-down circuit to a static signal source with the longest retention time or a node with the largest flowing current in the chip, so that the current of the static signal source with the longest retention time or the node with the largest flowing current respectively flows into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop.
Or, as another optional embodiment, in step 410, the first pull-up circuit and the first pull-down circuit are respectively connected to the static signal source with the longest retention time, so that the current at the static signal source with the longest retention time respectively flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be turned on, the ground end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; and connecting the input ends of the second pull-up circuit and the second pull-down circuit to the nodes with the largest flowing current respectively, so that the current at the nodes with the largest flowing current flows into the control ends of the second pull-up circuit and the second pull-down circuit respectively, after the second pull-up circuit and the second pull-down circuit are driven to be conducted, the grounding end of the second oscillator generates voltage rise, and the output end of the second pull-down circuit generates voltage drop.
In these two embodiments, the step 420 in which the switch unit receives the turn-on signal to make the pull-up circuit and the pull-down circuit respectively conduct with the circuit where the oscillator is located, and the supplying power to the oscillator through the pull-up circuit and the pull-down circuit includes:
the switch unit receives a starting signal, so that a first pull-up circuit is conducted with a circuit where a first oscillator is located, a first pull-down circuit is conducted with a circuit where a third oscillator is located, a second pull-up circuit is conducted with a circuit where a second oscillator is located, a second pull-down circuit is conducted with a circuit where a fourth oscillator is located, a power supply supplies power to the first oscillator and the second oscillator, and the voltage to ground of the first oscillator and the voltage to ground of the second oscillator change under the voltage division effect of the first pull-up circuit and the second pull-up circuit respectively; the power supply also supplies power to the third oscillator through the first pull-down circuit and supplies power to the fourth oscillator through the second pull-down circuit, and the input voltages of the third oscillator and the fourth oscillator are changed.
In step 430, the oscillator generates an oscillation signal based on the change of the voltage to ground and the input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in voltage to ground and outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in voltage to ground and outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in input voltage and outputs a third set of oscillation frequencies, and the fourth oscillator generates an oscillation signal based on a change in input voltage and outputs a fourth set of oscillation frequencies.
In still other embodiments, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit, and a third pull-up circuit, the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit, and a third pull-down circuit, the oscillator comprises a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator, and a sixth oscillator;
step 410, respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip, so that the currents at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time, and the node with the largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit, after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the voltage drop generated at the output end of the pull-: respectively connecting the control ends of the first pull-up circuit and the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control ends of the first pull-up circuit and the first pull-down circuit, enabling the grounding end of the first oscillator to generate voltage rise and the output end of the first pull-down circuit to generate voltage drop after the first pull-up circuit and the first pull-down circuit are driven to be conducted; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected to the static signal source with the longest holding time, so that the current at the static signal source with the longest holding time flows into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; and respectively connecting the input ends of the third pull-up circuit and the third pull-down circuit to the node with the largest flowing current, so that the current at the node with the largest flowing current flows into the control ends of the third pull-up circuit and the third pull-down circuit, after the third pull-up circuit and the third pull-down circuit are driven to be conducted, the grounding end of the fifth oscillator generates voltage rise, and the output end of the third pull-down circuit generates voltage drop.
Step 420, the switching unit receives the start signal, so that the pull-up circuit and the pull-down circuit are respectively connected with the circuit where the oscillator is located, the power supply supplies power to the oscillator, the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the change of the input voltage of the oscillator includes: the switch unit receives a starting signal, so that a first pull-up circuit is conducted with a circuit where a first oscillator is located, a first pull-down circuit is conducted with a circuit where a third oscillator is located, a second pull-up circuit is conducted with a circuit where a second oscillator is located, a second pull-down circuit is conducted with a circuit where a fourth oscillator is located, a third pull-up circuit is conducted with a circuit where a fifth oscillator is located, a third pull-down circuit is conducted with a circuit where a sixth oscillator is located, a power supply supplies power to the first oscillator, the second oscillator and the fifth oscillator respectively, the voltage-to-ground voltage of the first oscillator changes under the voltage division effect of the first pull-up circuit, the voltage-to-ground voltage of the second oscillator changes under the voltage division effect of the second pull-up circuit, and the voltage-to-ground voltage of the fifth oscillator changes under the voltage division effect of the third pull-up circuit; the power supply also supplies power to the third oscillator through the first pull-down circuit, supplies power to the fourth oscillator through the second pull-down circuit, and supplies power to the sixth oscillator through the third pull-down circuit;
in step 420, the oscillator respectively generates oscillation signals based on the changes of the voltage to ground and the input voltage, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates an oscillation signal based on a change in voltage to ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in voltage to ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on a change in input voltage, outputs a fourth set of oscillation frequencies, the fifth oscillator generates an oscillation signal based on a change in voltage to ground, outputs a fifth set of oscillation frequencies, the sixth oscillator generates an oscillation signal based on a change in input voltage, and outputs a sixth set of oscillation frequencies.
EXAMPLE five
The chip aging state monitoring method provided by the embodiment of the invention can be implemented by adopting the monitoring circuit including but not limited to the monitoring circuit described in the first embodiment, and is basically the same as the technical concepts of the second to fourth embodiments. Except that after the oscillator generates an oscillation signal based on the change of the input voltage and outputs at least two sets of oscillation frequencies, the method further comprises: comparing the oscillation frequency values of the two groups of frequencies at the same moment; and determining the aging state of the chip based on the oscillation frequency value with the smaller comparison result.
In a further embodiment, after the oscillator generates the oscillation signal based on the variation of the input voltage, and outputs at least two sets of oscillation frequencies, the method further includes: comparing each group of oscillation frequency with a reference frequency value respectively; and determining the aging state of the chip according to the comparison result.
In this embodiment, the output frequencies of all the oscillators are received and compared with a reference frequency (also referred to as a standard frequency). The frequency comparator outputs the oscillation frequency of the oscillator with the lowest frequency at the same moment to represent the current aging degree with the largest influence.
In yet another embodiment, after determining the aging state of the chip, the method further comprises: and performing frequency compensation on the corresponding element based on the minimum frequency value. The voltage frequency regulator can compensate the performance of the element or the circuit with the largest aging degree.
EXAMPLE six
It is understood that the monitoring circuit of the first embodiment may be integrated in an integrated circuit, as a part of a unit circuit or a functional module of the integrated circuit. Therefore, an embodiment of the present invention further provides a chip, which includes a substrate, where the chip aging state monitoring circuit described in any one of the embodiments is disposed on the substrate, and a control end of a pull-up and/or pull-down circuit of the chip aging state monitoring circuit is connected to at least two of a dynamic signal source device with the highest flip rate, a static signal source device with the longest retention time, and a line node with the largest flowing current on the substrate, and is used for monitoring an aging state of the chip.
On the basis of the provided chip, the invention further provides a server, which is characterized by comprising a case, wherein a mainboard is arranged in the case, and the chip is installed on the mainboard. By adopting the chip with the chip aging state monitoring circuit, in the using process of the server, when the problems of weakening of the current generation capacity of the chip and the like occur, the influence of the aging type on the performance of the chip can be automatically monitored to be the largest, and performance compensation can be carried out on the basis of the influence, so that the performance of the server can be improved to a certain extent.
All the embodiments in the present specification are described in a related manner, and the same or similar parts among the embodiments may be referred to each other, and each embodiment focuses on differences from other embodiments.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The term "comprising", without further limitation, means that the element so defined is not excluded from the group consisting of additional identical elements in the process, method, article, or apparatus that comprises the element.
For convenience of description, the above chip degradation state monitoring apparatus is described separately with the function divided into various functional units/circuits/modules. Of course, the functionality of the units/modules may be implemented in one or more software and/or hardware implementations of the invention.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (17)

1. A chip aging state monitoring circuit, comprising: the power supply comprises a switch unit, a power supply and an oscillator;
the control end of the pull-up circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest holding time and a node with the largest flowing current, the input end of the pull-up circuit is configured to be connected with a ground terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded and used for changing the voltage to ground of the oscillator, and the power supply output end is connected with the input end of the oscillator and used for supplying power to the oscillator;
the switch unit is used for controlling the on-off of the pull-up circuit and the circuit where the oscillator is located;
or, the control end of the pull-down circuit is configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest retention time and a node with the largest flowing current, the input end of the pull-down circuit is configured to be connected with the power supply, and the output end of the pull-down circuit is configured to be connected with the input end of the oscillator and used for changing the input voltage of the oscillator;
the switch unit is used for controlling the on-off of a circuit where the pull-down circuit and the oscillator are located;
alternatively, the first and second electrodes may be,
the control ends of the pull-up circuit and the pull-down circuit are respectively configured to be connected with at least two of a dynamic signal source with the highest chip turnover rate, a static signal source with the longest retention time and a node with the largest current, the input end of the pull-up circuit is configured to be connected with a ground terminal of the oscillator, the output end of the pull-up circuit is configured to be grounded, the power supply is configured to be connected with the input end of the oscillator, and the pull-up circuit is used for changing the voltage to ground of the oscillator; the input end of the pull-down circuit is configured to be connected with the power supply, the output end of the pull-down circuit is configured to be connected with the input end of the oscillator, and the pull-down circuit is used for changing the input voltage of the oscillator;
the switch unit is used for controlling the on-off of the pull-up circuit and the pull-down circuit and a circuit where the oscillator is located;
the oscillator is used for outputting at least two groups of oscillation frequencies.
2. The circuit of claim 1, wherein when the monitoring circuit comprises a pull-up circuit, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit;
the control end of the first pull-up circuit is configured to be connected with a dynamic signal source with the highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a static signal source with the longest retention time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest retention time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal; alternatively, the first and second electrodes may be,
the control end of the first pull-up circuit is configured to be connected with a static signal source with the longest retention time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-up circuit is configured to be connected with a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the oscillator comprises a first oscillator and a second oscillator, the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the output end of the first pull-up circuit is grounded, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output end of the second pull-up circuit is grounded;
the switch unit is specifically used for receiving a start signal, enabling a first pull-up circuit and a circuit where the first oscillator is located to be conducted, and enabling a second pull-up circuit and a circuit where the second oscillator is located to be conducted, wherein the first pull-up circuit is used for changing the voltage to ground of the first oscillator, and the second pull-up circuit is used for changing the voltage to ground of the second oscillator;
the first oscillator is used for generating an oscillating signal based on the change of the voltage to ground and outputting a first group of oscillating frequencies;
and a second oscillator for generating an oscillation signal based on a change in the voltage to ground and outputting a second group of oscillation frequencies.
3. The circuit of claim 1, wherein when the monitoring circuit comprises a pull-down circuit, the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit;
the control end of the first pull-down circuit is configured to be connected with a dynamic signal source with the highest turnover rate in a chip, and is used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-down circuit is configured to be connected with a static signal source with the longest retention time or a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the static signal source with the longest retention time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal; alternatively, the first and second electrodes may be,
the control end of the first pull-down circuit is configured to be connected with a static signal source with the longest retention time in a chip, and is used for receiving an electric signal output by the static signal source and determining whether to be conducted or not according to the electric signal;
the control end of the second pull-down circuit is configured to be connected with a node with the largest flowing current in the chip, and is used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the oscillator comprises a first oscillator and a second oscillator, the first oscillator is connected with the output end of the first pull-down circuit, and the second oscillator is connected with the output end of the second pull-down circuit;
the switch unit is specifically configured to receive a start signal, enable the first pull-down circuit to be connected with a circuit where the first oscillator is located, enable the second pull-down circuit to be connected with a circuit where the second oscillator is located, and enable the power supply to supply power to the first oscillator through the first pull-down circuit and supply power to the second oscillator through the second pull-down circuit;
the first oscillator is used for generating an oscillating signal based on the change of the input voltage and outputting a first group of oscillating frequencies;
and the second oscillator is used for generating an oscillation signal based on the change of the input voltage to generate an oscillation signal and outputting a second group of oscillation frequencies.
4. The circuit of claim 1, wherein when the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit, and the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit;
the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with the highest turnover rate in a chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a static signal source with the longest retention time or a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the static signal source with the longest retention time or the node with the largest flowing current and determining whether to be conducted or not according to the electric signal; alternatively, the first and second electrodes may be,
the control ends of the first pull-up circuit and the first pull-down circuit are respectively configured to be connected with a static signal source with the longest retention time in a chip, and are used for receiving an electric signal output by the static signal source and determining whether to be conducted according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the oscillator comprises a first oscillator, a second oscillator, a third oscillator and a fourth oscillator, wherein the grounding end of the first oscillator is connected with the input end of a first pull-up circuit, the grounding end of the second oscillator is connected with the input end of a second pull-up circuit, and the output ends of the first pull-up circuit and the second pull-up circuit are respectively grounded; the input end of the third oscillator is connected with the output end of the first pull-down circuit, and the input end of the fourth oscillator is connected with the output end of the second pull-down circuit;
the switch unit is specifically used for receiving a starting signal to enable the first pull-up circuit to be conducted with a circuit where the first oscillator is located, the first pull-down circuit to be conducted with a circuit where the third oscillator is located, the second pull-up circuit to be conducted with a circuit where the second oscillator is located and the second pull-down circuit to be conducted with a circuit where the fourth oscillator is located;
the first oscillator, the second oscillator, the third oscillator and the fourth oscillator are used for respectively generating a group of oscillation frequencies based on the change of respective input voltages.
5. The circuit of claim 1, wherein when the monitoring circuit comprises a pull-up circuit and a pull-down circuit, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit, and a third pull-up circuit, and the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit, and a third pull-down circuit, the oscillators comprise a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator, and a sixth oscillator; the first pull-up circuit and the first pull-down circuit are respectively connected with a dynamic signal source with the highest turnover rate in a chip, and are used for receiving an electric signal output by the dynamic signal source and determining whether to be conducted according to the electric signal;
the control ends of the second pull-up circuit and the second pull-down circuit are respectively configured to be connected with the static signal source with the longest retention time in the chip, and are used for receiving the electric signal output by the static signal source with the longest retention time and determining whether to be conducted according to the electric signal;
the control ends of the third pull-up circuit and the third pull-down circuit are respectively configured to be connected with a node with the largest flowing current in the chip, and are used for receiving an electric signal output by the node with the largest flowing current and determining whether to be conducted or not according to the electric signal;
the ground terminal of the first oscillator is connected with the input terminal of a first pull-up circuit, the ground terminal of the second oscillator is connected with the input terminal of a second pull-up circuit, the third oscillator is connected with the output terminal of a first pull-down circuit, the fourth oscillator is connected with the output terminal of a second pull-down circuit, the ground terminal of the fifth oscillator is connected with the input terminal of a third pull-up circuit, the sixth oscillator is connected with the output terminal of a third pull-down circuit, and the output terminals of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit are respectively grounded;
the switch unit is specifically used for receiving a starting signal to enable a first pull-up circuit to be conducted with a circuit where a first oscillator is located, a first pull-down circuit to be conducted with a circuit where a third oscillator is located, a second pull-up circuit to be conducted with a circuit where a second oscillator is located, a second pull-down circuit to be conducted with a circuit where a fourth oscillator is located, a third pull-up circuit to be conducted with a circuit where a fifth oscillator is located, and a third pull-down circuit to be conducted with a circuit where a sixth oscillator is located;
the first oscillator, the second oscillator, the third oscillator, the fourth oscillator, the fifth oscillator and the sixth oscillator are used for respectively generating a group of oscillation frequencies based on the change of respective input voltages.
6. The circuit of claim 1, wherein the monitoring circuit further comprises a frequency comparator, an input of the frequency comparator is connected to the output of the oscillator, and the frequency comparator is configured to receive at least two sets of frequencies output from the oscillator and compare the values of the oscillation frequencies at the same time in the two sets of frequencies.
7. The circuit of claim 5 or 6, wherein the monitoring circuit further comprises a voltage frequency regulator, an input terminal of the voltage frequency regulator is connected with an output terminal of the frequency comparator, and is used for receiving a minimum frequency value which is output by the frequency comparator and is used for representing the aging state of the chip, and performing frequency compensation on the corresponding element based on the minimum frequency value.
8. A chip aging state monitoring method is characterized by comprising the following steps:
connecting a control end of the pull-up circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, and after the pull-up circuit is conducted, the grounding end of an oscillator generates voltage rise;
the switch unit receives the starting signal, the pull-up circuit is conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, and the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit;
the oscillator generates an oscillation signal based on the change of the voltage to ground and outputs at least two groups of oscillation frequencies; alternatively, the first and second electrodes may be,
connecting a control end of the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-down circuit to control the on-off of the pull-down circuit, and after the pull-down circuit is switched on, the output end of the pull-down circuit generates voltage drop;
the switch unit receives the starting signal to enable the pull-down circuit to be conducted with a circuit where the oscillator is located, and the power supply supplies power to the oscillator through the pull-down circuit;
the oscillator generates oscillation signals based on the change of the input voltage and outputs at least two groups of oscillation frequencies; alternatively, the first and second electrodes may be,
respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in a chip, so that the currents at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control ends of the pull-up circuit and the pull-down circuit to control the on-off of the pull-up circuit and the pull-down circuit;
the switch unit receives a starting signal, so that the pull-up circuit and the pull-down circuit are respectively conducted with a circuit where the oscillator is located, the power supply supplies power to the oscillator, the voltage to ground of the oscillator changes under the voltage division effect of the pull-up circuit, the power supply also supplies power to the oscillator through the pull-down circuit, and the input voltage of the oscillator changes;
the oscillator respectively generates oscillation signals based on the change of the voltage to ground and the input voltage and outputs at least two groups of oscillation frequencies.
9. The method according to claim 8, wherein the oscillator includes a first oscillator and a second oscillator;
when a pull-up circuit is involved in the method, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit;
the step of connecting the control end of the pull-up circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-up circuit to control the on-off of the pull-up circuit, wherein after the pull-up circuit is conducted, the step of generating voltage rise by the grounding end of the oscillator comprises the following steps:
connecting the control end of the first pull-up circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control end of the first pull-up circuit, and enabling the grounding end of the first oscillator to generate voltage rise after the first pull-up circuit is driven to be conducted; connecting the control end of the second pull-up circuit to a static signal source with the longest retention time or a node with the largest flowing current in the chip, enabling the current of the static signal source with the longest retention time or the node with the largest flowing current to flow into the control end of the second pull-up circuit, and enabling the grounding end of the second oscillator to generate voltage rise after the second pull-up circuit is driven to be conducted; alternatively, the first and second electrodes may be,
connecting the control end of the first pull-up circuit to a static signal source with the longest retention time in a chip, enabling the current at the static signal source with the longest retention time to flow into the control end of the first pull-up circuit, and enabling the grounding end of the first oscillator to generate voltage rise after the first pull-up circuit is driven to be conducted; the control end of the second pull-up circuit is connected to the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-up circuit, and after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise;
the switch unit receives the opening signal, and pull-up circuit and oscillator place circuit switch on, and power supply supplies power to the oscillator, and under the partial pressure effect of pull-up circuit, the earth voltage of oscillator changes and includes: the switch unit receives a starting signal, so that a circuit where a first pull-up circuit and a first oscillator are located is conducted, a circuit where a second pull-up circuit and a second oscillator are located is conducted, a power supply supplies power to the first oscillator and the second oscillator respectively, the voltage to ground of the first oscillator changes under the voltage division effect of the first pull-up circuit, and the voltage to ground of the second oscillator changes under the voltage division effect of the second pull-up circuit;
the oscillator generates an oscillation signal based on a change in a voltage to ground, and outputting at least two sets of oscillation frequencies includes: the first oscillator generates oscillation signals based on the change of the voltage to ground and outputs a first group of oscillation frequencies, and the second oscillator generates oscillation signals based on the change of the voltage to ground and outputs a second group of oscillation frequencies; alternatively, the first and second electrodes may be,
when a pull-down circuit is involved in the method, the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit;
the step of connecting the control end of the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip, so that the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip flow into the control end of the pull-down circuit, and after the pull-up circuit is conducted, the step of generating voltage rise at the output end of the pull-down circuit comprises the following steps:
connecting the input end of the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control end of the first pull-down circuit, and enabling the output end of the first pull-down circuit to generate voltage drop after the first pull-down circuit is driven to be conducted; the input end of the second pull-down circuit is connected to the static signal source with the longest holding time or the node with the largest flowing current, so that the current of the static signal source with the longest holding time or the node with the largest flowing current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; alternatively, the first and second electrodes may be,
connecting the input end of the first pull-down circuit to the static signal source with the longest holding time, enabling the current at the static signal source with the longest holding time to flow into the control end of the first pull-down circuit, and enabling the output end of the first pull-down circuit to generate voltage drop after the first pull-down circuit is driven to be conducted; the input end of the second pull-down circuit is connected to the node with the largest flowing current, so that the current flowing through the node with the largest flowing current flows into the control end of the second pull-down circuit, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop;
the switch unit receives the opening signal, makes pull-down circuit and oscillator place circuit switch on, and power supply includes to the oscillator power supply through pull-down circuit: the switch unit receives the starting signal, so that the first pull-down circuit is conducted with a circuit where the first oscillator is located, the second pull-down circuit is conducted with a circuit where the second oscillator is located, the power supply supplies power to the first oscillator through the first pull-down circuit, and supplies power to the second oscillator through the second pull-down circuit;
the oscillator generates an oscillation signal based on the change of the input voltage, and the outputting at least two groups of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in the input voltage and outputs a first set of oscillation frequencies, and the second oscillator generates an oscillation signal based on a change in the input voltage and outputs a second set of oscillation frequencies.
10. The method for monitoring the aging state of the chip according to claim 8, wherein when a pull-up circuit and a pull-down circuit are involved in the method, the pull-up circuit comprises at least a first pull-up circuit and a second pull-up circuit, the pull-down circuit comprises at least a first pull-down circuit and a second pull-down circuit, and the oscillators comprise a first oscillator, a second oscillator, a third oscillator and a fourth oscillator;
the step of respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip to enable the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip to flow into the control ends of the pull-up circuit and the pull-down circuit so as to control the on-off of the pull-up circuit and the pull-down circuit, wherein after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the voltage drop generated at the output end: respectively connecting the control ends of the first pull-up circuit and the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to respectively flow into the control ends of the first pull-up circuit and the first pull-down circuit, and after driving the first pull-up circuit and the first pull-down circuit to be respectively conducted, generating voltage rise at the grounding end of the first oscillator and generating voltage drop at the output end of the first pull-down circuit; the control ends of the second pull-up circuit and the second pull-down circuit are respectively connected to a static signal source with the longest holding time or a node with the largest flowing current in a chip, so that the current of the static signal source with the longest holding time or the node with the largest flowing current respectively flows into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; alternatively, the first and second electrodes may be,
the input ends of the first pull-up circuit and the first pull-down circuit are respectively connected to the static signal source with the longest holding time, so that the current at the static signal source with the longest holding time respectively flows into the control ends of the first pull-up circuit and the first pull-down circuit, after the first pull-up circuit and the first pull-down circuit are driven to be conducted, the grounding end of the first oscillator generates voltage rise, and the output end of the first pull-down circuit generates voltage drop; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected to the nodes with the largest flowing current, so that the current at the nodes with the largest flowing current respectively flows into the control ends of the second pull-up circuit and the second pull-down circuit;
the switch unit receives the opening signal, makes pull-up circuit and pull-down circuit conduct with the circuit that the oscillator belongs to respectively, and power supply includes to the oscillator power supply through pull-up circuit and pull-down circuit: the switch unit receives a starting signal, so that a first pull-up circuit is conducted with a circuit where a first oscillator is located, a first pull-down circuit is conducted with a circuit where a third oscillator is located, a second pull-up circuit is conducted with a circuit where a second oscillator is located, a second pull-down circuit is conducted with a circuit where a fourth oscillator is located, a power supply supplies power to the first oscillator and the second oscillator, and the voltage to ground of the first oscillator and the voltage to ground of the second oscillator change under the voltage division effect of the first pull-up circuit and the second pull-up circuit respectively; the power supply also supplies power to the third oscillator through the first pull-down circuit and supplies power to the fourth oscillator through the second pull-down circuit, and the input voltages of the third oscillator and the fourth oscillator are changed;
the oscillator generates an oscillation signal based on changes of a voltage to ground and an input voltage, and outputting at least two sets of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in voltage to ground and outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in voltage to ground and outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in input voltage and outputs a third set of oscillation frequencies, and the fourth oscillator generates an oscillation signal based on a change in input voltage and outputs a fourth set of oscillation frequencies.
11. The method for monitoring the aging state of the chip according to claim 8, wherein when a pull-up circuit and a pull-down circuit are involved in the method, the pull-up circuit comprises a first pull-up circuit, a second pull-up circuit and a third pull-up circuit, the pull-down circuit comprises a first pull-down circuit, a second pull-down circuit and a third pull-down circuit, and the oscillators comprise a first oscillator, a second oscillator, a third oscillator, a fourth oscillator, a fifth oscillator and a sixth oscillator;
the step of respectively connecting the control ends of the pull-up circuit and the pull-down circuit to at least two of a signal source with the highest turnover rate, a static signal source with the longest retention time and a node with the largest flowing current in the chip to enable the currents of at least two of the signal source with the highest turnover rate, the static signal source with the longest retention time and the node with the largest flowing current in the chip to flow into the control ends of the pull-up circuit and the pull-down circuit so as to control the on-off of the pull-up circuit and the pull-down circuit, wherein after the pull-up circuit is conducted, the grounding end of the oscillator generates voltage rise, and after the pull-down circuit is conducted, the voltage drop generated at the output end: respectively connecting the control ends of the first pull-up circuit and the first pull-down circuit to a signal source with the highest turnover rate in a chip, enabling the current at the signal source with the highest turnover rate in the chip to flow into the control ends of the first pull-up circuit and the first pull-down circuit, enabling the grounding end of the first oscillator to generate voltage rise and the output end of the first pull-down circuit to generate voltage drop after the first pull-up circuit and the first pull-down circuit are driven to be conducted; the input ends of the second pull-up circuit and the second pull-down circuit are respectively connected to the static signal source with the longest holding time, so that the current at the static signal source with the longest holding time flows into the control ends of the second pull-up circuit and the second pull-down circuit, after the second pull-up circuit is driven to be conducted, the grounding end of the second oscillator generates voltage rise, and after the second pull-down circuit is driven to be conducted, the output end of the second pull-down circuit generates voltage drop; the input ends of the third pull-up circuit and the third pull-down circuit are respectively connected to a node with the largest flowing current, so that the current at the node with the largest flowing current flows into the control ends of the third pull-up circuit and the third pull-down circuit, after the third pull-up circuit and the third pull-down circuit are driven to be conducted, the grounding end of the fifth oscillator generates voltage rise, and the output end of the third pull-down circuit generates voltage drop;
the switch unit receives the start signal, makes pull-up circuit and pull-down circuit conduct with the circuit that the oscillator belongs to respectively, and power supply supplies power to the oscillator, and under the partial pressure effect of pull-up circuit, the voltage to ground of oscillator changes, and power supply still supplies power to the oscillator via pull-down circuit, and the input voltage of oscillator changes and includes: the switch unit receives a starting signal, so that a first pull-up circuit is conducted with a circuit where a first oscillator is located, a first pull-down circuit is conducted with a circuit where a third oscillator is located, a second pull-up circuit is conducted with a circuit where a second oscillator is located, a second pull-down circuit is conducted with a circuit where a fourth oscillator is located, a third pull-up circuit is conducted with a circuit where a fifth oscillator is located, a third pull-down circuit is conducted with a circuit where a sixth oscillator is located, a power supply supplies power to the first oscillator, the second oscillator and the fifth oscillator respectively, the voltage-to-ground voltage of the first oscillator changes under the voltage division effect of the first pull-up circuit, the voltage-to-ground voltage of the second oscillator changes under the voltage division effect of the second pull-up circuit, and the voltage-to-ground voltage of the fifth oscillator changes under the voltage division effect of the third pull-up circuit; the power supply also supplies power to the third oscillator through the first pull-down circuit, supplies power to the fourth oscillator through the second pull-down circuit, and supplies power to the sixth oscillator through the third pull-down circuit;
the oscillator respectively generates oscillation signals based on changes of a voltage to ground and an input voltage, and outputting at least two groups of oscillation frequencies comprises: the first oscillator generates an oscillation signal based on a change in voltage to ground, outputs a first set of oscillation frequencies, the second oscillator generates an oscillation signal based on a change in voltage to ground, outputs a second set of oscillation frequencies, the third oscillator generates an oscillation signal based on a change in input voltage, outputs a third set of oscillation frequencies, the fourth oscillator generates an oscillation signal based on a change in input voltage, outputs a fourth set of oscillation frequencies, the fifth oscillator generates an oscillation signal based on a change in voltage to ground, outputs a fifth set of oscillation frequencies, the sixth oscillator generates an oscillation signal based on a change in input voltage, and outputs a sixth set of oscillation frequencies.
12. The method of claim 8, wherein after the oscillator generates the oscillation signal based on the variation of the input voltage and outputs at least two sets of oscillation frequencies, the method further comprises:
comparing the oscillation frequency values of the two groups of frequencies at the same moment;
and determining the aging state of the chip based on the oscillation frequency value with the smaller comparison result.
13. The method of claim 8, wherein after the oscillator generates the oscillation signal based on the variation of the input voltage and outputs at least two sets of oscillation frequencies, the method further comprises: comparing each group of oscillation frequency with a reference frequency value respectively;
and determining the aging state of the chip according to the comparison result.
14. The method of monitoring the aging state of a chip according to claim 12 or 13, wherein after determining the aging state of the chip, the method further comprises: and performing frequency compensation on the corresponding element based on the minimum frequency value.
15. The method for monitoring the aging state of a chip as claimed in claim 8, wherein the pull-up circuit comprises a MOS transistor, and the oscillator is a voltage-controlled oscillator.
16. A chip, comprising a substrate, wherein the chip aging state monitoring circuit according to any one of claims 1 to 7 is disposed on the substrate, and a control terminal of a pull-up and/or pull-down circuit of the chip aging state monitoring circuit is connected to at least two of a dynamic signal source device with the highest flip rate, a static signal source device with the longest retention time, and a line node with the largest current flowing through the dynamic signal source device, the static signal source device, and the line node, for monitoring the aging state of the chip.
17. A server comprising a chassis, a motherboard disposed in the chassis, and the chip of claim 16 mounted on the motherboard.
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