CN112444733B - A chip aging state detection method and device - Google Patents
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Abstract
Description
技术领域technical field
本发明涉及芯片检测技术领域,尤其涉及一种芯片老化状态检测方法及装置。The invention relates to the technical field of chip detection, in particular to a chip aging state detection method and device.
背景技术Background technique
芯片老化发生的因素有很多,一般认为的芯片老化主要包括载流子注入(Hot-carrier injection,HCI)、负偏压温度不稳定性(Negative bias temperatureinstability,NBTI)、正偏置温度不稳定(Positive bias temperature instability,PBTI)等导致的老化现象,该类芯片老化效应或因素直接影响器件的阈值电压(Thresholdvoltage,通常简称为Vth)来影响器件产生驱动电流的大小,进而影响整体芯片的性能。There are many factors that cause chip aging. It is generally believed that chip aging mainly includes aging phenomena caused by carrier injection (Hot-carrier injection, HCI), negative bias temperature instability (Negative bias temperature instability, NBTI), positive bias temperature instability (Positive bias temperature instability, PBTI), etc. These types of chip aging effects or factors directly affect the threshold voltage of the device. Vth) to affect the size of the drive current generated by the device, which in turn affects the performance of the overall chip.
发明人在工程实践中发现:还有一种由经时击穿(Time dependent dielectricbreakdown,英文简称TDDB)导致的芯片老化现象与上述芯片老化现象有所不同,TDDB效应老化导致器件栅极的漏电流逐渐变大,以致到最后芯片上功率器件完全失去功率开关特性。The inventor found in engineering practice that there is another chip aging phenomenon caused by time-dependent dielectric breakdown (TDDB) which is different from the above-mentioned chip aging phenomenon. The TDDB effect aging causes the leakage current of the gate of the device to gradually increase, so that the power device on the chip completely loses the power switching characteristics in the end.
而传统芯片老化监测方案不适合监测或检测TDDB效应导致的芯片老化状态。However, the traditional chip aging monitoring solution is not suitable for monitoring or detecting the chip aging state caused by the TDDB effect.
发明内容Contents of the invention
有鉴于此,本发明实施例提供一种芯片老化状态检测方法及装置,便于检测出TDDB效应导致的芯片老化状态。In view of this, an embodiment of the present invention provides a chip aging state detection method and device, which are convenient for detecting the chip aging state caused by the TDDB effect.
第一方面,本发明实施例提供一种芯片老化状态检测方法,所述方法包括步骤:In a first aspect, an embodiment of the present invention provides a method for detecting an aging state of a chip, the method comprising the steps of:
将芯片上至少一个功率开关器件的输出端接入峰值电流检波电路中;Connecting the output terminal of at least one power switching device on the chip into the peak current detection circuit;
向所述功率开关器件的控制端供电,使电流经由控制端流向所述输出端;supplying power to the control terminal of the power switching device, so that current flows to the output terminal through the control terminal;
利用所述峰值电流检波电路从所述输出端周期性地获取最大漏电流;using the peak current detection circuit to periodically obtain the maximum leakage current from the output terminal;
基于所述最大漏电流确定芯片老化状态。A chip aging state is determined based on the maximum leakage current.
结合第一方面,在第一方面的第一种实施方式中,所述基于所述最大漏电流确定芯片老化状态包括:With reference to the first aspect, in the first implementation manner of the first aspect, the determining the chip aging state based on the maximum leakage current includes:
将获取的最大漏电流由模拟量转换成数字量;Convert the obtained maximum leakage current from analog to digital;
利用得到的数字量量化表征芯片老化状态。The obtained digital quantity is used to quantify and characterize the aging state of the chip.
结合第一方面、第一方面的第一或第二种实施方式,在第一方面的第三种实施方式中,所述基于所述最大漏电流确定芯片老化状态包括:With reference to the first aspect, the first or the second implementation manner of the first aspect, in the third implementation manner of the first aspect, the determining the chip aging state based on the maximum leakage current includes:
将所述最大漏电流转换为预定脉宽的脉冲信号;converting the maximum leakage current into a pulse signal with a predetermined pulse width;
将所述脉冲信号转换成数字量;converting the pulse signal into a digital quantity;
利用得到的所述数字量量化表征芯片老化状态。The obtained digital quantity is used to quantify and characterize the aging state of the chip.
结合第一方面的第一至第三任一种实施方式,在第一方面的第四种实施方式中,所述功率开关器件控制端的供电电压与芯片的工作电压一致。With reference to any one of the first to third implementation manners of the first aspect, in a fourth implementation manner of the first aspect, the power supply voltage of the control terminal of the power switching device is consistent with the working voltage of the chip.
第二方面,本发明实施例提供一种芯片老化状态检测装置,包括:比较电路、峰值电流检波电路及供电电源;In the second aspect, an embodiment of the present invention provides a chip aging state detection device, including: a comparison circuit, a peak current detection circuit, and a power supply;
所述供电电源配置为连接功率开关器件的控制端,用于为所述功率开关器件供电;The power supply is configured to be connected to a control terminal of a power switching device, and is used to supply power to the power switching device;
所述峰值电流检波电路配置为接入芯片上至少一个功率开关器件的输出端,用于周期性地获取流过所述功率开关器件的最大漏电流;The peak current detection circuit is configured to be connected to the output terminal of at least one power switching device on the chip, and is used to periodically obtain the maximum leakage current flowing through the power switching device;
所述比较电路配置为与所述峰值电流检波电路电连接,用于接收峰值电流检波电路周期性发送的所述最大漏电流,并基于所述最大漏电流确定芯片老化状态。The comparison circuit is configured to be electrically connected to the peak current detection circuit, and is used for receiving the maximum leakage current periodically sent by the peak current detection circuit, and determining a chip aging state based on the maximum leakage current.
结合第二方面,在第二方面的第一种实施方式中,所述比较电路输入端设有模数转换模块,所述模数转换模块用于将获取的最大漏电流由模拟量转换成数字量,输出至所述比较电路;With reference to the second aspect, in the first implementation manner of the second aspect, the input end of the comparison circuit is provided with an analog-to-digital conversion module, and the analog-to-digital conversion module is used to convert the obtained maximum leakage current from analog to digital, and output it to the comparison circuit;
所述比较电路,具体用于利用得到的数字量量化表征芯片老化状态。The comparison circuit is specifically used to quantify and characterize the aging state of the chip by using the obtained digital quantity.
结合第二方面的第一或第二种实施方式,在第二方面的第三种实施方式中,还包括电流定时转换模块,所述电流定时转换模块的输入端与所述峰值电流检波电路输出端连接,所述电流定时转换模块的输出端与所述模数转换模块输入端连接;With reference to the first or second implementation manner of the second aspect, in the third implementation manner of the second aspect, a current timing conversion module is further included, the input end of the current timing conversion module is connected to the output end of the peak current detection circuit, and the output end of the current timing conversion module is connected to the input end of the analog-to-digital conversion module;
所述电流定时转换模块,用于将所述最大漏电流转换为预定脉宽的脉冲信号,输入至所述模数转换模块;The current timing conversion module is used to convert the maximum leakage current into a pulse signal with a predetermined pulse width and input it to the analog-to-digital conversion module;
所述模数转换模块,用于将所述脉冲信号转换成数字量;The analog-to-digital conversion module is used to convert the pulse signal into a digital quantity;
所述比较电路,用于利用得到的所述数字量量化表征芯片老化状态。The comparison circuit is used to quantify and characterize the chip aging state by using the obtained digital quantity.
结合第二方面的第一至第三任一种实施方式,在第二方面的第四种实施方式中,所述功率开关器件控制端的供电电压与芯片的工作电压一致。With reference to any one of the first to third implementation manners of the second aspect, in a fourth implementation manner of the second aspect, the power supply voltage at the control terminal of the power switching device is consistent with the working voltage of the chip.
本发明实施例提供的芯片老化状态检测方法及装置,通过将芯片上至少一个功率开关器件的输出端接入峰值电流检波电路中;向所述功率开关器件的控制端供电,使电流经由控制端流向所述输出端;利用所述峰值电流检波电路从所述输出端周期性地获取最大漏电流;基于所述最大漏电流确定芯片老化状态。由于功率开关器件漏电流的大小能够反映出芯片的老化状态,因此,本方案便于检测出TDDB效应导致的芯片老化状态。In the chip aging state detection method and device provided by the embodiments of the present invention, the output terminal of at least one power switching device on the chip is connected to the peak current detection circuit; the control terminal of the power switching device is supplied with power, so that the current flows to the output terminal through the control terminal; the peak current detection circuit is used to periodically obtain the maximum leakage current from the output terminal; the aging state of the chip is determined based on the maximum leakage current. Since the magnitude of the leakage current of the power switching device can reflect the aging state of the chip, this solution is convenient for detecting the aging state of the chip caused by the TDDB effect.
附图说明Description of drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其它的附图。In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the accompanying drawings that are required in the description of the embodiments or prior art. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other accompanying drawings can also be obtained based on these drawings without creative work.
图1为本发明芯片老化状态检测方法一实施例流程图;Fig. 1 is a flowchart of an embodiment of the chip aging state detection method of the present invention;
图2为本发明芯片老化状态检测方法另一实施例流程图;Fig. 2 is the flowchart of another embodiment of the chip aging state detection method of the present invention;
图3为本发明芯片老化状态检测方法又一实施例流程图Fig. 3 is the flow chart of another embodiment of the chip aging state detection method of the present invention
图4为本发明一实施例芯片老化状态检测装置电路框图;Fig. 4 is a circuit block diagram of a chip aging state detection device according to an embodiment of the present invention;
图5为图4中芯片老化状态检测装置应用示意图;Fig. 5 is a schematic diagram of the application of the chip aging state detection device in Fig. 4;
图6为本发明又一实施例芯片老化状态检测装置应用示意图;FIG. 6 is a schematic diagram of an application of a chip aging state detection device according to another embodiment of the present invention;
图7为本发明再一芯片老化状态检测装置应用示意图。FIG. 7 is an application schematic diagram of another chip aging state detection device of the present invention.
具体实施方式Detailed ways
下面结合附图对本发明实施例进行详细描述。Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.
应当明确,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。It should be clear that the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
本发明实施例提供的芯片老化状态检测方法及装置,适用于芯片老化测试及监测场合;例如,出厂前芯片测试、使用过程中芯片监测等。特别适用于TDDB效应导致的芯片老化状态的检测。The chip aging state detection method and device provided by the embodiments of the present invention are suitable for chip aging testing and monitoring occasions; for example, chip testing before leaving the factory, chip monitoring during use, and the like. It is especially suitable for the detection of chip aging state caused by TDDB effect.
实施例一Embodiment one
参看图1及图2所示,本实施例提供的芯片老化状态检测方法,包括步骤:Referring to Figure 1 and Figure 2, the chip aging state detection method provided in this embodiment includes steps:
110、将芯片上至少一个功率开关器件的输出端接入峰值电流检波电路中。110. Connect the output terminal of at least one power switching device on the chip into the peak current detection circuit.
本实施例中,芯片上集成了很多的功率开关器件,所述功率开关器件例如为MOS(Metal oxide semiconductor)管,功率开关器件的老化或好坏状态在一定程度上反映或决定了芯片的性能及状态。因此,一般通过检测功率开关器件的状态来确定芯片的老化程度。为了便于叙述及帮助读者理解,以下以功率开关器件为MOS管进行说明。In this embodiment, many power switching devices are integrated on the chip. The power switching devices are, for example, MOS (Metal oxide semiconductor) tubes. The aging or good or bad status of the power switching devices reflects or determines the performance and status of the chip to a certain extent. Therefore, the aging degree of the chip is generally determined by detecting the state of the power switching device. In order to facilitate the description and help readers understand, the power switching device is described below as a MOS tube.
MOS管具有栅极(Gate,简称G极)、源极(Source,简称S极)及漏极(drain,简称D极),其中,栅极一般为控制端,源极和漏极为输出端,流经MOS管的漏电流由栅极流向源极或漏极。在连接设备时,栅极直接或间接连接供电电源,用于为MOS管导通提供门电压,将源极和漏极与峰值电流检波电路输入端连接。The MOS tube has a gate (Gate, referred to as the G pole), a source (Source, referred to as the S pole) and a drain (drain, referred to as the D pole), wherein the gate is generally the control terminal, the source and the drain are the output terminals, and the leakage current flowing through the MOS tube flows from the gate to the source or drain. When connecting the device, the gate is directly or indirectly connected to the power supply, which is used to provide the gate voltage for the conduction of the MOS transistor, and connect the source and drain to the input terminal of the peak current detection circuit.
根据工程实践发现,PMOS管的TDDB效应发生要比NMOS管的TDDB效应发生时间高至少一个数量级。即,NMOS的状态相比而言更容易受到TDDB影响。因此,本实施例的检测方法更适合用于检测或监测NMOS的状态。According to engineering practice, it is found that the TDDB effect of the PMOS transistor occurs at least an order of magnitude longer than the TDDB effect of the NMOS transistor. That is, the state of NMOS is more easily affected by TDDB. Therefore, the detection method of this embodiment is more suitable for detecting or monitoring the state of NMOS.
所述峰值电流检波电路(Peak current detector,简称PCD)可以直接用峰值电流检波器代替,峰值电流检波器即俗称的检波器或峰值检波器,其用于周期性地获取波动信号中有用信息,并识别波、振荡或信号的存在或变化。The peak current detector (PCD for short) can be directly replaced by a peak current detector. The peak current detector is commonly known as a detector or a peak detector, which is used to periodically obtain useful information in a fluctuating signal and identify the existence or change of waves, oscillations or signals.
120、向所述功率开关器件的控制端供电,使电流经由控制端流向所述输出端。120. Supply power to the control terminal of the power switching device, so that current flows to the output terminal through the control terminal.
如前所述,向MOS管栅极提供导通所需的门电压,使MOS管中有电流流过。在测试时,可以在MOS管栅极到供电电源之间设置开关驱动控制电路,这样,每次需要检测的时候,通过开关驱动控制电路驱动MOS管导通即可,省去每次连接供电电源的操作步骤,便于简化检测工序。As mentioned above, the gate voltage required for conduction is provided to the gate of the MOS transistor, so that current flows in the MOS transistor. During the test, a switch drive control circuit can be set between the gate of the MOS tube and the power supply. In this way, each time a test is required, the MOS tube can be driven to be turned on by the switch drive control circuit, which saves the operation steps of connecting the power supply every time, and facilitates the simplification of the test process.
130、利用所述峰值电流检波电路从所述输出端周期性地获取最大漏电流。130. Use the peak current detection circuit to periodically obtain the maximum leakage current from the output terminal.
本实施例中,在功率开关器件与检测所需的装置连接好之后,开始进入测试模式,其中,Test_EN=1是测试模式,Test_EN=0是压迫模式(即未测试状态)。峰值电流检波电路用于周期性地捕获在测试期间经由功率开关器件所产生的最大漏电流,并输出。In this embodiment, after the power switching device is connected with the devices required for detection, it starts to enter the test mode, where Test_EN=1 is the test mode, and Test_EN=0 is the compression mode (ie, the untested state). The peak current detection circuit is used to periodically capture and output the maximum leakage current generated by the power switching device during the test.
140、基于所述最大漏电流确定芯片老化状态。140. Determine a chip aging state based on the maximum leakage current.
本实施例中,可以通过逻辑控制电路实现,也可以通过处理器(CentralProcessing Unit/Processor)、单片机等实现。In this embodiment, it may be implemented by a logic control circuit, or may be implemented by a processor (Central Processing Unit/Processor), a single-chip microcomputer, or the like.
具体实现方式可以为:预先设置标准电流值,将捕获的最大漏电流与所述标准电流值进行比较,以确定芯片老化程度。A specific implementation manner may be: preset a standard current value, and compare the captured maximum leakage current with the standard current value, so as to determine the aging degree of the chip.
具体地,还可以根据比较结果,将老化程度量化表示。Specifically, the degree of aging may also be expressed quantitatively according to the comparison result.
本发明实施例提供的芯片老化状态检测方法,通过将芯片上至少一个功率开关器件的输出端接入峰值电流检波电路中;向所述功率开关器件的控制端供电,使电流经由控制端流向所述输出端;利用所述峰值电流检波电路从所述输出端周期性地获取最大漏电流;基于所述最大漏电流可以确定出芯片老化状态。In the chip aging state detection method provided by the embodiment of the present invention, the output terminal of at least one power switching device on the chip is connected to the peak current detection circuit; the control terminal of the power switching device is supplied with power, so that the current flows to the output terminal through the control terminal; the peak current detection circuit is used to periodically obtain the maximum leakage current from the output terminal; the aging state of the chip can be determined based on the maximum leakage current.
由于功率开关器件漏电流的大小能够反映出芯片的老化状态,因此,本方案便于检测出TDDB效应导致的芯片老化状态。Since the magnitude of the leakage current of the power switching device can reflect the aging state of the chip, this solution is convenient for detecting the aging state of the chip caused by the TDDB effect.
参看图2所示,在一些实施例中,步骤140、基于所述最大漏电流确定芯片老化状态包括步骤:Referring to FIG. 2, in some embodiments, step 140, determining the aging state of the chip based on the maximum leakage current includes the steps of:
141A、将获取的最大漏电流由模拟量转换成数字量。141A. Convert the acquired maximum leakage current from analog to digital.
本实施例中,可以通过模数转换器实现。In this embodiment, it can be realized by an analog-to-digital converter.
142A、利用得到的数字量量化表征芯片老化状态。142A. Use the obtained digital quantity to quantify and characterize the aging state of the chip.
本实施例中,通过将最大漏电流由模拟量转换成数字量,以得到的数字量可以量化表征芯片老化程度。由于实现了量化表征芯片老化程度,工程技术人员可以根据老化程度来决定芯片的进一步处理。例如,丢弃或修复、及继续使用。In this embodiment, by converting the maximum leakage current from an analog quantity to a digital quantity, the obtained digital quantity can quantitatively represent the aging degree of the chip. Since the aging degree of the chip can be quantified and characterized, engineers and technicians can determine the further processing of the chip according to the aging degree. For example, discard or repair, and continue to use.
参看图3所示,在另一些实施例中,步骤140、基于所述最大漏电流确定芯片老化状态包括:141B将所述最大漏电流转换为预定脉宽的脉冲信号;可以通过电流定时转换器(Current to time converter,C2T)将最大漏电流转换为具有一定脉宽的脉冲信号。3, in other embodiments, step 140, determining the chip aging state based on the maximum leakage current includes: 141B converting the maximum leakage current into a pulse signal with a predetermined pulse width; the maximum leakage current can be converted into a pulse signal with a certain pulse width by a current timing converter (Current to time converter, C2T).
142B、将所述脉冲信号转换成数字量;143B、利用得到的所述数字量量化表征芯片老化状态。142B. Convert the pulse signal into a digital quantity; 143B. Use the obtained digital quantity to quantify and characterize the aging state of the chip.
脉冲信号转换成数字量可以由模数转换器实现,如果监测最大漏电流几乎为0,则转换输出的脉冲信号的脉宽几乎为0,输出0,以表征没有TDDB效应导致的老化发生。如果最大的漏电流值超过了标准电流值,则转换输出宽度大于0的脉冲信号,输出大于0的数字,以表征TDDB效应导致的老化程度。其中,漏电流越大脉冲信号宽度越大,功率开关器件老化程度越大,相应的芯片的性能受影响就越大。The conversion of the pulse signal into digital quantity can be realized by an analog-to-digital converter. If the monitored maximum leakage current is almost 0, the pulse width of the converted output pulse signal is almost 0, and the output is 0 to indicate that there is no aging caused by the TDDB effect. If the maximum leakage current value exceeds the standard current value, convert and output a pulse signal with a width greater than 0, and output a number greater than 0 to represent the degree of aging caused by the TDDB effect. Wherein, the greater the leakage current is, the greater the width of the pulse signal is, and the aging degree of the power switching device is greater, and the performance of the corresponding chip is more affected.
为了保证功率开关器件测试结果能够较为真实地表征芯片的老化状态,在测试时,所述功率开关器件控制端的供电电压与芯片的工作电压一致。In order to ensure that the test results of the power switching device can truly characterize the aging state of the chip, during the test, the power supply voltage at the control terminal of the power switching device is consistent with the working voltage of the chip.
另外,针对在背景技术中描述的载流子注入(Hot-carrier injection,HCI)、负偏压温度不稳定性(Negative bias temperature instability,NBTI)、正偏置温度不稳定(Positive bias temperature instability,PBTI)等导致的老化现象,所提出的传统老化监控电路大多基于某些振荡器的频率变化,但是TDDB效应的老化对振荡器频率的影响是非线性的,因此,传统方法不太适合监控TDDB老化现象。In addition, for the aging phenomenon caused by carrier injection (Hot-carrier injection, HCI), negative bias temperature instability (Negative bias temperature instability, NBTI), positive bias temperature instability (Positive bias temperature instability, PBTI), etc. described in the background technology, most of the proposed traditional aging monitoring circuits are based on the frequency change of some oscillators, but the aging of the TDDB effect has a nonlinear impact on the oscillator frequency, so , the traditional method is not suitable for monitoring TDDB aging phenomena.
根据前面描述,本方案提供的芯片老化状态检测方法,通过测量功率开关器件的栅极最大漏电流,然后根据最大漏电流强度与标准电流进行比较,来判断TDDB效应导致芯片老化的程度,可以较为方便且准确地检测及量化表征出芯片的老化状态。According to the above description, the chip aging state detection method provided by this solution measures the maximum leakage current of the gate of the power switching device, and then compares the maximum leakage current intensity with the standard current to judge the degree of chip aging caused by the TDDB effect, which can conveniently and accurately detect and quantitatively characterize the aging state of the chip.
实施例二Embodiment two
图4为本发明芯片老化状态检测装置一实施例电路框图;图5为本发明芯片老化状态检测装置一实施例应用示意图。参看图1、图4及图5所示,本发明实施例提供的芯片老化状态检测装置,包括比较电路、峰值电流检波电路及供电电源。Fig. 4 is a circuit block diagram of an embodiment of the chip aging state detection device of the present invention; Fig. 5 is an application schematic diagram of an embodiment of the chip aging state detection device of the present invention. Referring to FIG. 1 , FIG. 4 and FIG. 5 , the chip aging state detection device provided by the embodiment of the present invention includes a comparison circuit, a peak current detection circuit and a power supply.
所述供电电源配置为连接功率开关器件的控制端,用于为所述功率开关器件供电。The power supply is configured to be connected to the control terminal of the power switching device, and is used for supplying power to the power switching device.
其中,所述供电电源的供电电压与芯片的工作电压一致。Wherein, the power supply voltage of the power supply is consistent with the working voltage of the chip.
所述峰值电流检波电路配置为接入芯片上至少一个功率开关器件的输出端,用于周期性地获取流过所述功率开关器件的最大漏电流。The peak current detection circuit is configured to be connected to an output terminal of at least one power switching device on the chip, and is used for periodically obtaining the maximum leakage current flowing through the power switching device.
所述比较电路配置为与所述峰值电流检波电路电连接,用于接收峰值电流检波电路周期性发送的所述最大漏电流,并基于所述最大漏电流确定芯片老化状态。The comparison circuit is configured to be electrically connected to the peak current detection circuit, and is used for receiving the maximum leakage current periodically sent by the peak current detection circuit, and determining a chip aging state based on the maximum leakage current.
所述峰值电流检波电路可以直接采用峰值检波器。所述比较电路可以采用比较器,用于比较输入的一个信号是否高于某一给定值,本实施例中是用于比较最大漏电流与标准电流值。The peak current detector circuit can directly use a peak detector. The comparison circuit may use a comparator, which is used to compare whether an input signal is higher than a given value. In this embodiment, it is used to compare the maximum leakage current with the standard current value.
参看图2及图6所示,在一些实施例中,所述比较电路输入端设有模数转换模块,所述模数转换模块用于将获取的最大漏电流由模拟量转换成数字量,输出至所述比较电路。Referring to Fig. 2 and Fig. 6, in some embodiments, an analog-to-digital conversion module is provided at the input end of the comparison circuit, and the analog-to-digital conversion module is used to convert the acquired maximum leakage current from analog to digital and output to the comparison circuit.
所述比较电路,具体用于利用得到的数字量量化表征芯片老化状态。The comparison circuit is specifically used to quantify and characterize the aging state of the chip by using the obtained digital quantity.
可以理解的是,模数转换模块与比较器有时候会集成于一个装置中,形成具有比较器和模数转换模块的装置,例如具有比较器功能的模数转换器;当然也可以为具有模数转换功能的比较器。It can be understood that the analog-to-digital conversion module and the comparator are sometimes integrated into one device to form a device with a comparator and an analog-to-digital conversion module, such as an analog-to-digital converter with a comparator function; of course, it can also be a comparator with an analog-to-digital conversion function.
参看图3及图7所示,在一些实施例中,所述装置还包括电流定时转换模块,所述电流定时转换模块的输入端与所述峰值电流检波电路输出端连接,所述电流定时转换模块的输出端与所述模数转换模块输入端连接;3 and 7, in some embodiments, the device further includes a current timing conversion module, the input end of the current timing conversion module is connected to the output end of the peak current detection circuit, and the output end of the current timing conversion module is connected to the input end of the analog-to-digital conversion module;
所述电流定时转换模块,用于将所述最大漏电流转换为预定脉宽的脉冲信号,输入至所述模数转换模块;The current timing conversion module is used to convert the maximum leakage current into a pulse signal with a predetermined pulse width and input it to the analog-to-digital conversion module;
所述模数转换模块,用于将所述脉冲信号转换成数字量,输出至比较电路中。The analog-to-digital conversion module is used to convert the pulse signal into a digital quantity and output it to a comparison circuit.
所述比较电路,用于利用得到的所述数字量量化表征芯片老化状态。The comparison circuit is used to quantify and characterize the chip aging state by using the obtained digital quantity.
实施例一所述的检测方法,可以但不限于由本发明实施例提供的芯片老化状态检测装置实现,本发明实施例提供的芯片老化状态检测装置,连接于芯片上至少一个功率开关器件,通过检测流经功率开关器件的最大漏电流,基于该最大漏电流可以方便地量化确定芯片老化状态。The detection method described in Embodiment 1 can be realized by, but not limited to, the chip aging state detection device provided by the embodiment of the present invention. The chip aging state detection device provided by the embodiment of the present invention is connected to at least one power switching device on the chip, and by detecting the maximum leakage current flowing through the power switching device, the chip aging state can be quantified and determined conveniently based on the maximum leakage current.
因此,本检测装置便于检测出TDDB效应导致的芯片老化状态。Therefore, the detection device is convenient for detecting the chip aging state caused by the TDDB effect.
需要说明的是,本实施例的方案与实施例一具有相应的特定技术特征,其具体技术方案与技术效果与实施例一类似,区别在于,实施例一的检测方法可以由包括但不限于本实施例所提供的硬件实施。It should be noted that the solution of this embodiment and the first embodiment have corresponding specific technical features, and its specific technical solution and technical effect are similar to those of the first embodiment. The difference is that the detection method of the first embodiment can be implemented by including but not limited to the hardware provided in this embodiment.
对于本发明提供的各实施例而言,其技术方案与技术效果基本相同,相关之处可以相互参见。For each embodiment provided by the present invention, the technical solutions and technical effects are basically the same, and related parts can be referred to each other.
需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个......”限定的要素,并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。It should be noted that in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article or apparatus comprising a set of elements includes not only those elements but also other elements not expressly listed or which are inherent to such process, method, article or apparatus. Without further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article or apparatus comprising said element.
本说明书中的各个实施例均采用相关的方式描述,各个实施例之间相同或相似的部分互相参见即可,每个实施例重点说明的都是与其他实施例的不同之处。Each embodiment in this specification is described in a related manner, the same or similar parts of each embodiment can be referred to each other, and each embodiment focuses on the differences from other embodiments.
为了描述的方便,描述以上芯片老化状态检测装置是以功能分为各种功能单元/电路/模块分别描述。当然,在实施本发明时可以把各单元/模块的功能在同一个或多个软件和/或硬件中实现。For the convenience of description, the above chip aging state detection device is described by dividing its functions into various functional units/circuits/modules and describing them separately. Of course, when implementing the present invention, the functions of each unit/module can be implemented in one or more pieces of software and/or hardware.
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以权利要求的保护范围为准。The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention shall be covered within the scope of protection of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5471429A (en) * | 1993-11-26 | 1995-11-28 | Samsung Electronics Co., Ltd. | Burn-in circuit and method therefor of semiconductor memory device |
WO2010097986A1 (en) * | 2009-02-25 | 2010-09-02 | シャープ株式会社 | Shift register and display device |
CN102736016A (en) * | 2011-03-31 | 2012-10-17 | 英特尔移动通信有限公司 | Circuit arrangement with a plurality of on-chip monitor circuits and a control circuit and corresponding methods |
CN108363012A (en) * | 2018-01-17 | 2018-08-03 | 广州市香港科大霍英东研究院 | A kind of vehicle lithium battery startup power supply Primary Component fault detection system and method |
JP2019050087A (en) * | 2017-09-08 | 2019-03-28 | カルソニックカンセイ株式会社 | Leakage current detection device and heating apparatus |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101545945B (en) * | 2008-03-25 | 2011-08-03 | 中芯国际集成电路制造(上海)有限公司 | Method for testing leakage current of MOS device |
CN101303390B (en) * | 2008-06-23 | 2013-03-06 | 上海集成电路研发中心有限公司 | Method for judging MOS device performance degeneration |
CN102385029A (en) * | 2011-08-26 | 2012-03-21 | 上海宏力半导体制造有限公司 | Method for testing high-voltage MOS device |
CN104198907A (en) * | 2014-09-10 | 2014-12-10 | 广东美的集团芜湖制冷设备有限公司 | Power device current leakage detecting device and intelligent power module detecting equipment |
CN204905865U (en) * | 2015-09-10 | 2015-12-23 | 山东亿玛信诺电气有限公司 | Three -phase equilibrium high pressure takes accuse device |
CN105158670B (en) * | 2015-10-13 | 2018-04-17 | 中国人民解放军海军工程大学 | IGBT health status monitoring methods based on collector leakage stream |
CN106291331A (en) * | 2016-09-14 | 2017-01-04 | 电子科技大学 | Integrated circuit life detecting method based on TDDB effect and system |
CN106771477B (en) * | 2016-11-28 | 2020-09-01 | 国网福建省电力有限公司 | Large-caliber and high-sensitivity HVDC cable leakage current detection sensor |
CN108562841A (en) * | 2018-06-14 | 2018-09-21 | 山东阅芯电子科技有限公司 | leakage current detection method and device in electronic component environmental aging test |
-
2020
- 2020-11-10 CN CN202011251252.3A patent/CN112444733B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5471429A (en) * | 1993-11-26 | 1995-11-28 | Samsung Electronics Co., Ltd. | Burn-in circuit and method therefor of semiconductor memory device |
WO2010097986A1 (en) * | 2009-02-25 | 2010-09-02 | シャープ株式会社 | Shift register and display device |
CN102736016A (en) * | 2011-03-31 | 2012-10-17 | 英特尔移动通信有限公司 | Circuit arrangement with a plurality of on-chip monitor circuits and a control circuit and corresponding methods |
JP2019050087A (en) * | 2017-09-08 | 2019-03-28 | カルソニックカンセイ株式会社 | Leakage current detection device and heating apparatus |
CN108363012A (en) * | 2018-01-17 | 2018-08-03 | 广州市香港科大霍英东研究院 | A kind of vehicle lithium battery startup power supply Primary Component fault detection system and method |
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