CN113141716A - Manufacturing method of circuit board half plug hole - Google Patents
Manufacturing method of circuit board half plug hole Download PDFInfo
- Publication number
- CN113141716A CN113141716A CN202110428604.6A CN202110428604A CN113141716A CN 113141716 A CN113141716 A CN 113141716A CN 202110428604 A CN202110428604 A CN 202110428604A CN 113141716 A CN113141716 A CN 113141716A
- Authority
- CN
- China
- Prior art keywords
- hole
- circuit board
- ink
- baking
- processed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention relates to a method for manufacturing a circuit board half plug hole, which comprises the following steps: taking a circuit board to be processed, wherein the circuit board to be processed comprises a welding surface circuit layer, a non-welding surface circuit layer and a through hole which are oppositely arranged; preparing first printing ink; plugging holes for the first time, and fully plugging the through holes of the circuit board to be processed with first ink; pre-baking, namely pre-baking the circuit board to be processed after the first hole plugging so as to shrink the first ink in the through hole; blending the second printing ink; plugging the through hole for the second time, namely plugging the second ink into the gap in the through hole after the first ink shrinks so as to fully plug the through hole; baking again, and baking the circuit board to be processed after the second hole plugging; exposing, namely exposing the printing ink positioned on one side of the circuit layer on the non-welding surface in the through hole; developing, namely developing the exposed circuit board to be processed; post-baking, namely performing post-baking on the developed circuit board to be processed; and polishing, namely polishing the circuit board to be processed after the post-baking to obtain the semi-plugged circuit board.
Description
Technical Field
The invention relates to the technical field of circuit boards, in particular to a manufacturing method of a circuit board half plug hole.
Background
Printed Circuit Boards (PCBs), also called Printed Circuit Boards (PCBs), are important electronic components, which are the basic support for electronic components and the carrier for electrical interconnection of electronic components, and are also called Printed Circuit Boards (PCBs) because they are manufactured by electronic printing.
For a circuit board product with single-side hole sealing and single-side welding requirements, the circuit board product is manufactured in a mode that one side is plugged with ink and the other side is exposed out of a graphic circuit, namely, the circuit board product is sealed by the ink plug holes for the side without welding components, and the other side is manufactured by the graphic to expose a corresponding bonding pad, so that the design can effectively improve the welding quality and the welding reliability of the circuit board and can improve the appearance performance of the product; such a process is called half via hole, which generally requires that the ink via hole has a degree of fullness of 50% to 70% of the total hole space, and cannot be hollow or convex.
At present, a half plug hole process is generally manufactured in a screen printing mode, and after a circuit pattern is manufactured and before solder mask is manufactured, solder mask can be directly manufactured without cross-process manufacturing after the half plug hole process is manufactured. The preparation of half consent generally adopts the one side that need not the printing ink hole sealing, adhere to smooth ventilative material, adopt the mode preparation of control printing ink hole sealing degree of depth again, this mode is to the pressure of silk screen printing, speed, all aspects parameter control requirements such as angle are higher, even if can accurate regulation silk screen printing parameter, the oil mass reaches the requirement of plumpness under the actual silk screen printing in-process also is difficult to accurate control, and along with the increase of silk screen printing circuit board quantity, the silk screen printing parameter also receives the influence, need inspect and adjust the silk screen printing parameter according to quantity gradation, whole operation process is comparatively loaded down with trivial details, to personnel, the material, time cost requires highly, in addition, in the follow-up baking process, printing ink can shrink, evaporate, also can produce bad problem.
Disclosure of Invention
The invention aims to solve the technical problem of providing a method for manufacturing a half plug hole of a circuit board, which has simple and efficient steps and can reduce the reject ratio of the half plug hole circuit board under the conditions of saving the manufacturing cost and reducing the control difficulty.
In order to solve the technical problems, the technical scheme of the invention is as follows:
a method for manufacturing a circuit board half plug hole comprises the following steps:
taking a circuit board to be processed, wherein the circuit board to be processed comprises a welding surface circuit layer, a non-welding surface circuit layer and a through hole which are oppositely arranged;
preparing first printing ink;
plugging the through hole of the circuit board to be processed with the first ink for the first time;
pre-baking, namely pre-baking the circuit board to be processed after the first hole plugging so as to shrink the first printing ink in the through hole;
blending the second printing ink;
plugging the through hole for the second time, namely plugging the second ink into the gap in the through hole after the first ink is shrunk so as to fully plug the through hole;
baking again, and baking the circuit board to be processed after the second hole plugging;
exposing, namely exposing the printing ink positioned on one side of the circuit layer on the non-welding surface in the through hole;
developing, namely developing the exposed circuit board to be processed;
post-baking, namely performing post-baking on the developed circuit board to be processed;
and polishing, namely polishing the circuit board to be processed after the post baking to obtain the semi-plugged circuit board.
Optionally, before the first hole plugging is performed, an aluminum sheet may be placed above the non-welding surface circuit layer, an oil leakage hole is formed in a position corresponding to the through hole, and when the first hole plugging is performed, the through hole is fully plugged with the first ink from the oil leakage hole.
Optionally, before the second hole plugging, an aluminum sheet may be placed above the non-welding surface circuit layer, an oil leakage hole is formed in a position corresponding to the through hole, and when the second hole plugging is performed, the through hole is fully plugged with the second ink from the oil leakage hole.
Optionally, the thickness of the aluminum sheet is 0.2mm-0.3 mm.
Optionally, the aperture single side of the oil leakage hole is 0.1mm-0.15mm larger than the aperture of the through hole.
Optionally, the viscosity of the first ink is less than the viscosity of the second ink. The viscosity of the first ink is 180dpa.s-220dpa.s, the viscosity of the second ink is 200dpa.s-300dpa.s, and the pre-baking is to bake the circuit board to be processed after the first hole plugging at 73 ℃ for 15 min.
Optionally, the second baking is to bake the circuit board to be processed after the second hole plugging at 73 ℃ for 40 min.
Optionally, the exposure is performed by adopting a film exposure, a film is placed on one side of the non-welding surface circuit layer, the position of the film corresponding to the through hole is a light transmission area, other areas of the film are light-tight areas, and then the printing ink in the through hole on one side of the non-welding surface circuit layer is exposed.
Optionally, in the developing step, the spraying pressure adopted in the circuit layer of the welding surface is smaller than the spraying pressure of the circuit layer of the non-welding surface.
Optionally, the post-baking adopts a segmented baking mode, and the parameters of the segmented baking are 60 ℃ multiplied by 60min +80 ℃ multiplied by 30min +100 ℃ multiplied by 30min +130 ℃ multiplied by 30min +150 ℃ multiplied by 60 min.
Optionally, the grinding is grinding the non-welding surface circuit by using a ceramic grinding brush.
According to the technical scheme, the ink with different viscosities is adopted for secondary hole plugging, wherein the viscosity of the first ink used in the primary hole plugging is low, so that the first ink can be smoothly plugged into the holes, the first ink can be rapidly and preliminarily condensed and rapidly shrunk after being pre-baked, the first ink in the through holes cannot be excessively condensed at the moment to form a state similar to a colloid, the first ink still has low fluidity and adhesiveness, and a second ink guiding basis is provided for the secondary hole plugging; the viscosity of the used second ink is normal viscosity, the second ink is plugged into the gap in the through hole after the first ink is contracted by plugging the hole for the second time, so that the through hole is fully plugged, the second ink is baked again, and then the ink in the through hole can be fully exposed and fully developed through single-side exposure and development and operation of adopting different spraying pressures on the upper surface and the lower surface; in addition, the post-baking adopts a sectional baking mode to effectively prevent the ink in the through hole from exploding oil, and the ceramic grinding brush is used for grinding the non-welding surface circuit, so that the redundant hole plugging ink can be effectively cut off, and the surface of the circuit board is smooth; therefore, by the manufacturing method, the effect that the filling degree of the plug hole reaches 50-70% can be achieved under the conditions of saving the manufacturing cost and reducing the control difficulty, the reject ratio of the semi-plug hole circuit board is reduced, and the processing quality of the semi-plug hole is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a flow chart of a method for manufacturing a half via hole of a circuit board according to an embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view illustrating the first time of plugging the hole according to an embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view illustrating the pre-baking process according to an embodiment of the present invention;
FIG. 4 is a schematic cross-sectional view illustrating the second plugging of the first plug according to an embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view of a film exposure structure according to an embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a completed development in one embodiment of the invention;
FIG. 7 is a schematic cross-sectional view of a polished half-receptacle circuit board according to an embodiment of the present invention;
FIG. 8 is a schematic cross-sectional view illustrating a first plugging operation according to another embodiment of the present invention;
FIG. 9 is a cross-sectional view illustrating a second plugging operation according to another embodiment of the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 11 | Circuit layer of |
3 | |
| 12 | Non-solder |
31 | Light-transmitting |
| 13 | Through |
32 | |
| 21 | First ink | 4 | |
| 22 | |
41 | Oil leakage hole |
Detailed Description
The following further describes embodiments of the present invention with reference to the drawings. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The first embodiment:
as shown in fig. 1, an embodiment of the present invention provides a method for manufacturing a half plug hole of a circuit board, including the following steps:
s1: taking a circuit board to be processed, wherein the circuit board to be processed comprises a welding surface circuit layer, a non-welding surface circuit layer and a through hole which are oppositely arranged;
s2: preparing first printing ink;
s3: plugging the through hole of the circuit board to be processed with the first ink for the first time;
s4: pre-baking, namely pre-baking the circuit board to be processed after the first hole plugging so as to shrink the first printing ink in the through hole;
s5: blending the second printing ink;
s6: plugging the through hole for the second time, namely plugging the second ink into the gap in the through hole after the first ink is shrunk so as to fully plug the through hole;
s7: baking again, and baking the circuit board to be processed after the second hole plugging;
s8: exposing, namely exposing the printing ink positioned on one side of the circuit layer on the non-welding surface in the through hole;
s9: developing, namely developing the exposed circuit board to be processed;
s10: post-baking, namely performing post-baking on the developed circuit board to be processed;
s11: and polishing, namely polishing the circuit board to be processed after the post baking to obtain the semi-plugged circuit board.
It should be noted that the step S2 of preparing the first ink can be performed at any step before the step S3 of first plugging, i.e., the order of the step S1 and the step S2 can be interchanged. In addition, the step S5 of preparing the second ink can be performed in any step of the second plugging step S6, and the second ink is only required to be prepared before the second plugging operation is performed. The viscosity of the first ink is less than the viscosity of the second ink.
The present embodiment will be further explained with reference to the drawings.
As shown in fig. 2, a circuit board to be processed, which includes a soldering surface circuit layer 11, a non-soldering surface circuit layer 12 and a through hole 13, which are oppositely arranged, is taken to perform first hole plugging, and the through hole 13 of the circuit board to be processed is plugged with the first ink 21. Before the first hole plugging is carried out, the required first ink 21 needs to be prepared, and a proper amount of diluent is added into the first ink 21, so that the viscosity of the first ink 21 is properly reduced, and the ink is favorably plugged into the through hole. Alternatively, the viscosity of the first ink 21 may be adjusted to 180dpa.s to 220 dpa.s.
Referring to fig. 3, after the first hole plugging, the circuit board to be processed is pre-baked to shrink the first ink 21 in the through hole 13. In the embodiment, the circuit board to be processed after the first hole plugging can be baked for 15min at 73 ℃, and when the low-temperature quick pre-baking is performed, the diluent can be quickly volatilized, so that the first ink 21 is quickly and preliminarily condensed, the first ink 21 in the through hole cannot be excessively solidified, the fluidity and the adhesiveness are still low, and a second ink guiding basis is provided for the second hole plugging.
Referring to fig. 4, after pre-baking, performing second hole plugging on the circuit board to be processed, plugging the second ink 22 into the gap of the through hole 13 after the first ink 21 shrinks, so that the through hole 13 is fully plugged, specifically, the second ink 22 can be plugged from one side of the non-welding surface circuit layer 12, and the first ink 21 originally in the through hole 13 is extruded downwards until the through hole 13 is fully plugged with the ink. Before the second hole plugging is carried out, the required second ink 22 needs to be prepared, the viscosity of the second ink 22 is larger than that of the first ink 21, and optionally, the viscosity of the second ink 22 is 200dpa.s-300 dpa.s; and after the second hole plugging is finished, baking the circuit board to be processed again, wherein the circuit board to be processed after the second hole plugging can be baked for 40min at 73 ℃.
And after baking again, exposing the printing ink on one side of the non-welding surface circuit layer 12 in the through hole 13. In this embodiment, a film exposure is adopted, as shown in fig. 5, a film 3 is placed on one side of the non-welding surface circuit layer 12, the position of the film 3 corresponding to the through hole 13 is a light-transmitting area 31, other areas of the film 3 are light-tight areas 32, and then the printing ink in the through hole 13 on one side of the non-welding surface circuit layer 12 is exposed. The exposure is carried out by adopting 12-14 levels of exposure ruler energy, the exposure is carried out for 30-50 min after exposure, the exposure energy is properly increased, the exposure light can effectively penetrate the printing ink, the printing ink after exposure can form a buffer period of photocuring reaction by standing, and the insufficient or unstable photocuring of the printing ink is prevented.
And developing the exposed circuit board to be processed. As shown in fig. 6, the development time is prolonged, the different spraying pressures at the upper and lower sides are used for developing, the development time is prolonged properly, so that the developer can more sufficiently wash/react the hole plugging ink in the hole, and the development of the exposed surface and the unexposed surface can be balanced through the different spraying pressures at the upper and lower sides, so that the ink in the through hole 13 can be more sufficiently developed. The spraying pressure adopted by the welding surface circuit layer 11 is smaller than that of the non-welding surface circuit layer 12, and optionally, the spraying pressure adopted by the welding surface circuit layer 11 is 1.5kg/cm2The spraying pressure adopted by the non-welding surface circuit layer 12 is 2.0kg/cm2The developing time is controlled to be 20s-30 s.
After the development is completed, the circuit board to be processed is post-baked and polished to obtain the half-plugged circuit board shown in fig. 7. The post-baking is carried out in a sectional baking mode, for example, baking with the following parameters is carried out in sequence: baking at 60 deg.C for 60min, baking at 80 deg.C for 30min, baking at 100 deg.C for 30min, baking at 130 deg.C for 30min, and baking at 150 deg.C for 60 min.
The mode that can adopt ceramic brush polish to polish goes on, utilizes the cutting force of ceramic brush polish, cuts away the convex unnecessary printing ink of face, makes the face level and smooth, and the parameter of polishing is: the width of the grinding crack is 8mm-12mm, the current value of the grinding brush is 2.0A-3.0A, the speed of the grinding plate is 1.5-2.5m/min, and the length of the ceramic brush column is more than 10 mm. It is worth mentioning that in the invention, the polishing is not carried out by using a traditional nylon needle brush or a non-woven fabric brush, because the nylon needle brush is used for brushing and polishing on the board surface by using dense nylon needles during polishing, the brushing and polishing easily causes the problems of ink fracture and depression in the through hole 13, or causes the problems of excessive polishing of the ink in the through hole 13 along the advancing direction of the circuit board and oblique ink in the through hole; the grinding force of the non-woven fabric brush is limited, so that the surface of the plate is difficult to grind and level, and the non-woven fabric grinding easily causes the problems of sundries hole plugging and the like.
Second embodiment:
referring to fig. 8 and 9, the main difference between the manufacturing method of the present embodiment and the first embodiment is to perform the first plugging and the second plugging.
Specifically, as shown in fig. 8, before the first hole plugging, an aluminum sheet 4 may be placed on the non-soldering surface circuit layer 12, and oil leakage holes 41 are opened at positions corresponding to the through holes 13, so that the through holes 13 are plugged with the first ink 21 from the oil leakage holes 41 when the first hole plugging is performed. As shown in FIG. 9, before the second hole plugging, an aluminum sheet 4 is placed on the non-soldering surface circuit layer 12, and oil leakage holes 41 are opened at positions corresponding to the through holes 13, and when the second hole plugging is performed, the through holes 13 are plugged with the second ink 22 from the oil leakage holes 41. Optionally, the thickness of the aluminum sheet 4 is 0.2mm-0.3mm, the aperture of the oil leakage hole 41 is 0.1mm-0.15mm larger than that of the through hole 13 on one side, so that the flow rate of the ink can be increased, the ink can be smoothly stuffed, and the stuffing is full. The operation methods of other steps in this embodiment are the same as those in the first embodiment, and are not described herein again.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. It will be apparent to those skilled in the art that various changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, and the scope of protection is still within the scope of the invention.
In the description of the present patent, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", "row", "column", and the like, indicate orientations and positional relationships based on the orientations and positional relationships shown in the drawings, and are used only for convenience in describing and simplifying the description, but do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the present patent.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present patent application, "plurality" means at least two, e.g., two, three, etc., unless explicitly specified otherwise.
In the patent of the invention, unless otherwise explicitly specified or limited, the terms "mounted", "connected", "fixed", and the like are to be understood in a broad sense, and for example, may be fixedly connected, detachably connected, or integrated; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present patent can be understood by those skilled in the art according to specific situations.
In the patent of the invention, unless otherwise explicitly specified or limited, a first feature "on" or "under" a second feature may be directly contacted with the first and second features or indirectly contacted with the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
Claims (10)
1. A method for manufacturing a circuit board half plug hole is characterized by comprising the following steps:
taking a circuit board to be processed, wherein the circuit board to be processed comprises a welding surface circuit layer, a non-welding surface circuit layer and a through hole which are oppositely arranged;
preparing first printing ink;
plugging the through hole of the circuit board to be processed with the first ink for the first time;
pre-baking, namely pre-baking the circuit board to be processed after the first hole plugging so as to shrink the first printing ink in the through hole;
blending the second printing ink;
plugging the through hole for the second time, namely plugging the second ink into the gap in the through hole after the first ink is shrunk so as to fully plug the through hole;
baking again, and baking the circuit board to be processed after the second hole plugging;
exposing, namely exposing the printing ink positioned on one side of the circuit layer on the non-welding surface in the through hole;
developing, namely developing the exposed circuit board to be processed;
post-baking, namely performing post-baking on the developed circuit board to be processed;
and polishing, namely polishing the circuit board to be processed after the post baking to obtain the semi-plugged circuit board.
2. The method as claimed in claim 1, wherein an aluminum sheet is placed on the non-solder surface circuit layer before the first hole plugging, and oil leaking holes are formed at positions corresponding to the through holes, and the first ink is used to fill the through holes from the oil leaking holes when the first hole plugging is performed.
3. The method as claimed in claim 1, wherein an aluminum sheet is placed over the non-solder surface circuit layer before the second hole plugging, and oil leaking holes are formed at positions corresponding to the through holes, and the second ink is used to fill the through holes from the oil leaking holes during the second hole plugging.
4. The method for manufacturing the half plug hole of the circuit board according to claim 2 or 3, wherein the thickness of the aluminum sheet is 0.2mm-0.3 mm; the aperture single side of the oil leakage hole is 0.1mm-0.15mm larger than the aperture of the through hole.
5. The method of claim 1, wherein the viscosity of said first ink is less than the viscosity of said second ink, said first ink has a viscosity of 180dpa.s to 220dpa.s, and said second ink has a viscosity of 200dpa.s to 300 dpa.s.
6. The method for manufacturing the half plug hole of the circuit board according to claim 1, wherein the pre-baking is to bake the circuit board to be processed after the first plug hole at 73 ℃ for 15 min; and the second baking is to bake the circuit board to be processed after the second hole plugging for 40min at 73 ℃.
7. The method as claimed in claim 1, wherein the exposing is performed by a film exposing, a film is placed on one side of the non-soldering surface circuit layer, the position of the film corresponding to the through hole is a light-transmitting area, and other areas of the film are light-opaque areas, and then the ink on one side of the non-soldering surface circuit layer in the through hole is exposed.
8. The method as claimed in claim 1, wherein in the developing step, the spraying pressure applied to the circuit layer on the soldering surface is lower than the spraying pressure applied to the circuit layer on the non-soldering surface.
9. The method as claimed in claim 1, wherein the post-baking is performed by a step baking method, and the step baking parameters are 60℃ × 60min +80℃ × 30min +100℃ × 30min +130℃ × 30min +150℃ × 60 min.
10. The method as claimed in claim 1, wherein the grinding is performed by grinding the non-soldering surface circuit with a ceramic brush.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110428604.6A CN113141716B (en) | 2021-04-21 | 2021-04-21 | Manufacturing method of circuit board half plug hole |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110428604.6A CN113141716B (en) | 2021-04-21 | 2021-04-21 | Manufacturing method of circuit board half plug hole |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113141716A true CN113141716A (en) | 2021-07-20 |
| CN113141716B CN113141716B (en) | 2022-05-24 |
Family
ID=76813196
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110428604.6A Active CN113141716B (en) | 2021-04-21 | 2021-04-21 | Manufacturing method of circuit board half plug hole |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113141716B (en) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005340712A (en) * | 2004-05-31 | 2005-12-08 | Victor Co Of Japan Ltd | Method and device for manufacturing printed wiring board |
| CN102413645A (en) * | 2011-10-31 | 2012-04-11 | 景旺电子（深圳）有限公司 | Manufacturing method of PCB (printed circuit board) semi-plugged hole |
| CN103313531A (en) * | 2012-03-12 | 2013-09-18 | 宏恒胜电子科技（淮安）有限公司 | Hole tamping method of circuit board |
| CN105228353A (en) * | 2015-10-12 | 2016-01-06 | 深圳崇达多层线路板有限公司 | A kind of printed circuit board solder mask jack process |
| US20160286659A1 (en) * | 2015-03-25 | 2016-09-29 | Camtek Ltd. | Selective solder mask printing on a printed circuit board (pcb) |
| CN106304671A (en) * | 2016-08-30 | 2017-01-04 | 江门崇达电路技术有限公司 | A kind of method for circuit board making soldering-resistance layer |
| CN108055775A (en) * | 2017-11-09 | 2018-05-18 | 建业科技电子（惠州）有限公司 | A kind of half consent production method of thin PCB circuit board |
| CN110785024A (en) * | 2019-10-31 | 2020-02-11 | 珠海精毅电路有限公司 | Circuit board resin hole plugging process |
| CN110831332A (en) * | 2019-10-18 | 2020-02-21 | 江苏博敏电子有限公司 | Method for processing solder mask half plug hole |
-
2021
- 2021-04-21 CN CN202110428604.6A patent/CN113141716B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005340712A (en) * | 2004-05-31 | 2005-12-08 | Victor Co Of Japan Ltd | Method and device for manufacturing printed wiring board |
| CN102413645A (en) * | 2011-10-31 | 2012-04-11 | 景旺电子（深圳）有限公司 | Manufacturing method of PCB (printed circuit board) semi-plugged hole |
| CN103313531A (en) * | 2012-03-12 | 2013-09-18 | 宏恒胜电子科技（淮安）有限公司 | Hole tamping method of circuit board |
| US20160286659A1 (en) * | 2015-03-25 | 2016-09-29 | Camtek Ltd. | Selective solder mask printing on a printed circuit board (pcb) |
| CN105228353A (en) * | 2015-10-12 | 2016-01-06 | 深圳崇达多层线路板有限公司 | A kind of printed circuit board solder mask jack process |
| CN106304671A (en) * | 2016-08-30 | 2017-01-04 | 江门崇达电路技术有限公司 | A kind of method for circuit board making soldering-resistance layer |
| CN108055775A (en) * | 2017-11-09 | 2018-05-18 | 建业科技电子（惠州）有限公司 | A kind of half consent production method of thin PCB circuit board |
| CN110831332A (en) * | 2019-10-18 | 2020-02-21 | 江苏博敏电子有限公司 | Method for processing solder mask half plug hole |
| CN110785024A (en) * | 2019-10-31 | 2020-02-11 | 珠海精毅电路有限公司 | Circuit board resin hole plugging process |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113141716B (en) | 2022-05-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102802357B (en) | Method for preventing solder mask of singleside-windowed PCB (Printed Circuit Board) from oil leakage | |
| KR100843183B1 (en) | Screen mask | |
| CN102378499B (en) | Method for manufacturing window plug holes at two sides during PCB (Printed Circuit Board) resistance welding | |
| CN105101661A (en) | Manufacturing method of printed circuit board ink plug hole | |
| CN111050487A (en) | Solder mask layer manufacturing method, printed circuit board manufacturing method and printed circuit board | |
| CN110366324A (en) | A kind of Gao Houtong pcb board welding resistance green oil silk screen printing process of improvement | |
| CN106982512A (en) | A kind of bad reworking method of circuit board finished product welding resistance consent | |
| CN105527800B (en) | A kind of exposure method, exposure device and color membrane substrates | |
| CN113141716B (en) | Manufacturing method of circuit board half plug hole | |
| CN108055775A (en) | A kind of half consent production method of thin PCB circuit board | |
| CN108668440A (en) | A kind of bad reworking method of circuit board finished product welding resistance consent | |
| CN112087884A (en) | Solder mask manufacturing method of thick copper circuit board | |
| JP6007048B2 (en) | Combination metal mask plate and manufacturing method thereof | |
| CN109714904A (en) | Directly paste dry film process in hollow-out flexible wiring board vacancy section | |
| CN105491805A (en) | Method for fabricating characters on thick copper board of PCB | |
| CN113163604A (en) | Method for manufacturing circuit board solder mask plug hole | |
| CN112739015B (en) | Manufacturing method of circuit board resistance welding half plug hole | |
| CN113260166A (en) | Method for improving insufficient ink in holes of rigid-flexible printed circuit board | |
| JP3076215B2 (en) | Ceramic multilayer substrate and method of manufacturing the same | |
| JP3735023B2 (en) | Pin stand type printed circuit board | |
| CN109618504B (en) | Jointed board structure of single-sided board and manufacturing method | |
| JP5990775B2 (en) | Electronic component mounting system, electronic component mounting apparatus, and electronic component mounting method | |
| CN113543483B (en) | Solder resist hole plugging method for printed circuit board | |
| CN206564727U (en) | Two face path flexible PCBs | |
| JP5308689B2 (en) | Local solder amount increasing type metal mask and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |