CN113113391A - 用于双面功率模块的引线框间隔件 - Google Patents

用于双面功率模块的引线框间隔件 Download PDF

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CN113113391A
CN113113391A CN202011558752.1A CN202011558752A CN113113391A CN 113113391 A CN113113391 A CN 113113391A CN 202011558752 A CN202011558752 A CN 202011558752A CN 113113391 A CN113113391 A CN 113113391A
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leadframe
spacer
semiconductor device
substrate
depression
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程子轩
刘勇
陈良彪
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Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Abstract

本发明题为“用于双面功率模块的引线框间隔件”。一种半导体器件模块可包括引线框间隔件，该引线框间隔件提供引线框和间隔件两者的功能，同时实现双面冷却配置。此类引线框间隔件可包括引线框表面，该引线框表面提供由至少两个半导体器件共用的管芯附接焊盘(DAP)。该引线框间隔件可包括至少一个下陷部，其中半导体器件可附接在由该至少一个下陷部限定的凹槽内。第一衬底可连接到该引线框的第一侧。第二衬底可连接到该至少一个下陷部的下陷部表面，并且被定位成进一步连接到双面组件中的半导体器件。

Description

用于双面功率模块的引线框间隔件
技术领域
本说明书涉及用于功率模块的半导体封装技术。
背景技术
已开发出用于与电源和功率管理相关联的各种应用中的半导体器件，诸如用于变速驱动器的功率转换器。例如，功率模块可使用绝缘栅双极晶体管(IGBT)和二极管(诸如快速恢复二极管(FRD))的组合以用于切换应用。
封装此类半导体器件以实现与其他电路的连接，并且以节省空间且可靠的方式部署半导体器件。具体地讲，封装在功率模块内的半导体器件可在电可靠性、机械可靠性和热可靠性方面具有高要求。
发明内容
根据一个一般方面，半导体器件模块包括第一衬底和引线框间隔件，该引线框间隔件具有电连接到该第一衬底的第一侧并且包括至少一个下陷部(downset)，该至少一个下陷部限定在该引线框间隔件的与该第一侧相对的第二侧上提供管芯附接焊盘(DAP)的凹槽。该半导体器件模块包括设置在该凹槽内并电连接到该DAP的第一半导体器件、设置在该凹槽内并电连接到该DAP的第二半导体器件，以及第二衬底，该第二衬底在引线框间隔件的第二侧安装在至少一个下陷部的至少一个下陷部表面上，并且至少部分地包封该凹槽内的该第一半导体器件和该第二半导体器件。
根据另一个一般方面，半导体器件模块包括：引线框间隔件，该引线框间隔件具有第一侧和第二侧，该第二侧具有带有至少一个下陷部表面的至少一个下陷部；第一衬底，该第一衬底安装到引线框间隔件的第一侧；以及第二衬底，该第二衬底安装到至少一个下陷部表面。半导体器件模块包括：第一半导体器件，该第一半导体器件电连接到该引线框间隔件的第二侧并且电连接到该第二衬底；以及第二半导体器件，该第二半导体器件电连接到该引线框间隔件的第二侧并且电连接到该第二衬底。
根据另一个一般方面，制造半导体器件模块的方法包括将第一衬底安装到引线框间隔件的第一侧，该引线框间隔件包括至少一个下陷部，该至少一个下陷部限定在该引线框间隔件的与第一侧相对的第二侧上提供管芯附接焊盘(DAP)的凹槽。该方法还包括将第一半导体器件和第二半导体器件安装到DAP上，以及将第二衬底在该引线框间隔件的第二侧安装在该至少一个下陷部的至少一个下陷部表面上，并且至少部分地包封该凹槽内的该第一半导体器件和该第二半导体器件。
一个或多个实施方式的细节在附图和以下描述中阐明。其他特征将从说明书和附图中以及从权利要求书中显而易见。
附图说明
图1是用于双面冷却功率模块的引线框间隔件的简化局部分解图。
图2是使用图1的引线框间隔件的双面冷却功率模块的示例性实施方式的横截面。
图3是用于形成图2的示例性实施方式的第一示例性工艺步骤的横截面。
图4是用于形成图2的示例性实施方式的第二示例性工艺步骤的横截面。
图5是用于形成图2的示例性实施方式的第三示例性工艺步骤的横截面。
图6是用于形成图2的示例性实施方式的第四示例性工艺步骤的横截面。
图7是示出对应于图3至图6的示例的示例性工艺步骤的流程图。
图8是对应于图1的示例的具有引线框间隔件的双面功率模块的更详细的示例性实施方式的分解图。
图9是图8的引线框间隔件的顶视图。
图10是图8的引线框间隔件的侧面角视图。
图11是模制之前的图8的示例的组装版本的顶视图。
图12是模制完成后的图8的示例的组装版本的顶视图。
图13是图12的示例的透明顶视图。
图14是沿线A-A截取的图13的横截面。
图15是沿线B-B截取的图13的横截面。
图16是示出示例性实施方案中的信号焊盘的焊点处的剥离应变水平的曲线图。
图17是示出示例性实施方案中的热阻水平的曲线图。
具体实施方式
如上所述，功率模块封装件应以成本有效且空间有效的方式提供高水平的电可靠性、机械可靠性和热可靠性。在本说明书中，引线框间隔件提供常规功率模块的引线框和间隔件两者的功能，同时还实现双面冷却配置。
例如，如下文更详细地描述，此类引线框间隔件可包括引线框表面，该引线框表面提供由至少两个半导体器件(诸如IGBT和二极管)共享(并且电连接到其)的管芯附接焊盘(DAP)。引线框间隔件可包括至少一个下陷部，该下陷部提供一个或多个下陷部表面并限定凹槽，并且其中半导体器件附接在凹槽内。
这样，第一衬底可连接到引线框的第一侧(与半导体器件相对)，并且第二衬底可连接到下陷部表面，从而被定位成进一步连接到双面、双侧或倒装芯片组件中的半导体器件。
在常规功率模块中，可使用单独的间隔件和引线框，其中引线框可用于提供功率模块外部的电连接，并且间隔件可用于为每个半导体器件提供相对于第一衬底(例如，直接键合铜(DBC)衬底)的机械支撑和期望定位。例如，单独的间隔件可用于IGBT和二极管中的每一者。
虽然此类设计提供了许多有益的特征，诸如良好的电隔离和热性能，但是这些和类似的设计可能遭受在功率模块的不同部分的热膨胀系数(CTE)中可能发生的不匹配。例如，在常规间隔件与双面功率模块的第二DBC衬底之间可能存在CTE不匹配。间隔件与周围注塑模塑件(例如，环氧模塑料(EMC))之间也可能存在CTE不匹配。此类CTE不匹配和相关联的应力可导致破裂、分层或剥离，特别是在功率模块的信号焊盘的焊点处。
相比之下，本文所述的设计用单个低成本引线框间隔件替换常规分立间隔件。例如，引线框间隔件可由单件金属制成，该单件金属在组装过程期间可易于处理和使用。
所述引线框间隔件提供改善的机械可靠性，包括减少(例如，共享)热应力/应变的影响，以及减少剥离(例如，在信号焊盘的焊点处)。所述引线框间隔件包括凹槽内的表面，该凹槽提供由至少两个半导体器件共用的DAP，并且该共用DAP还提供改善的热阻、降低的电寄生、低热/电阻、和低电感，从而导致较高的功率能力。
凹槽由至少一个下陷部(例如，至少两个下陷部)形成，这进一步有助于上述剥离的减少以及热应力/应变和机械应力/应变的其他负面影响。另外，下陷部提供下陷部表面，使得引线框间隔件可电连接和机械连接到双面功率模块的两个衬底，并且包封在凹槽内的半导体器件可以所需方式容易且可靠地连接到外部电路元件。
图1是用于双面功率模块的引线框间隔件102的简化局部分解图。在图1中，引线框间隔件102用于安装第一半导体器件104(例如，IGBT)和第二半导体器件106(例如，二极管)。第一衬底108被定位成安装到引线框间隔件102的第一侧，并且第二衬底110被定位成安装到引线框间隔件102的第二相对侧。
更详细地讲，第一衬底108被定位成在引线框间隔件102的第一侧安装到引线框间隔件102的平坦表面112。引线框间隔件102包括至少两个下陷部114，其限定管芯附接焊盘(DAP)表面115，半导体器件104、106可安装在该表面上。
引线框102包括下陷部表面116，使得在下陷部表面116和DAP 115之间形成凹槽117。如下文更详细地示出和描述，第二衬底110因此可在平面中安装到下陷部表面116，该平面实现第二衬底110与半导体器件104、106的所需连接。
示例性下陷部114可包括引线框间隔件102的任何部分，该部分限定DAP表面115与下陷部表面116之间的空间偏移，该空间偏移足以将半导体器件104、106定位在DAP表面115上，同时使用下陷部表面116安装第二衬底110。换句话讲，下陷部114限定垂直于DAP表面115的方向上的位移。下陷部114可垂直于DAP表面115，或可相对于DAP表面115成角度，或它们的组合。如下文更详细地所示，例如在图8至图15的示例中，下陷部114可至少部分地围绕引线框间隔件102的周边或其他部分延伸。
在图1的示例中，下陷部表面116可在平行于DAP表面115并且垂直于下陷部114的方向上延伸。成角部分118可连接到下陷部表面116和引线120，从而提供额外的力吸收和机械应变消除。
在各种实施方式中，如所提及的，下陷部114可相对于DAP表面115成角度，只要凹槽117的深度足以将半导体器件104、106包括在凹槽117内。因此，可通过将第二衬底110附接到下陷部表面116而将半导体器件104、106至少部分地包封在凹槽117内。
图2是使用图1的引线框间隔件的双面功率模块的示例性实施方式的横截面。图2示出了图1的组装版本，包括更具体的示例性实施方式细节，包括焊料连接件。
在图2中，引线框间隔件202用于将IGBT 204和二极管206安装在引线框间隔件202的下陷部限定的凹槽内，并且以上文相对于图1所述的方式安装。同样如图1所示，第一衬底208安装到引线框间隔件202的第一侧(与IGBT 204和二极管206相对)。使用引线框间隔件202的下陷部表面将第二衬底210安装在引线框间隔件202的第二相对(器件侧)侧上。
在图2中，第一衬底208是DBC衬底，其包括第一铜层212、介电层214(例如，陶瓷层，诸如Al2O3)和第二铜层216。类似地，第二衬底210是DBC衬底，该DBC衬底包括第一铜层218、介电层220(例如，陶瓷层，诸如Al2O3)，以及包括第一部分222和第二部分223的第二铜层222/223，如下文更详细地描述和示出。
焊料连接件在图2中示出，包括将第一衬底208连接到引线框间隔件202的焊料层224、将IGBT 204连接到引线框间隔件202的焊料层226、以及将二极管206连接到引线框间隔件202的焊料层228。
类似地，第二衬底210具有通过焊料层230连接到引线框间隔件202的下陷部表面的部分222，以及通过焊料层232连接到引线框间隔件202的下陷部表面的部分223。部分223进一步通过焊料层234连接到IGBT 204，并且通过焊料层236连接到二极管206。部分222进一步通过焊料层238连接到IGBT(例如，连接到IGBT的栅极)。
最后，在图2中，可提供模塑件240。例如，可使用EMC或其他合适的封装件，诸如其他环氧模塑料。
图3至图6是用于形成图2的示例性实施方式的示例性过程的横截面。图7是示出对应于图3至图6的示例的示例性工艺步骤的流程图。
在图3中，提供引线框间隔件302，该引线框间隔件对应于图1和图2的引线框间隔件102、202。IGBT 304和二极管306可分别使用焊料层326和328安装到引线框间隔件302的DAP。
更具体地，如图7所示，IGBT 304和二极管306可使用具有高熔融温度的焊料326、328附接到引线框间隔件302(702)。例如，由于引线框间隔件302的DAP的相对大的表面积，可使用Pb8Sn2Ag在300℃或更高的温度下执行银烧结。
在图4中，可附接装置侧衬底410，该装置侧衬底包括铜层418、介电层420和具有部分422、423的铜层。类似于图2的图示，焊料层430、432可分别用于将部分422、423附接到引线框间隔件302的下陷部表面。焊料层434和436可分别将IGBT 304和二极管306连接到衬底部分423，而焊料层438将铜衬底部分422连接到IGBT栅极。
如图7所示，可使用中温焊料将器件侧衬底410附接到引线框间隔件302和器件304、306(704)。例如，SnSb5可在约240℃-260℃范围内的温度下使用。
如图5所示，衬底508可在引线框间隔件的与器件侧相对的侧上安装到引线框间隔件302。衬底508可包括铜层512、介电层514和铜层516，并且可使用焊料层524来安装。
如图7所示，可在低熔融温度安装工艺中使用焊料层524来安装衬底508(706)。例如，可在约200℃-220℃范围内的温度下使用Sn3.5Ag0.5。使用所述的不同焊料熔融温度范围或类似范围来执行多个焊料操作，在每个过程步骤处产生可靠的电连接，而不会不利地影响在前述过程步骤中进行的电连接。
图6示出了注塑模塑件640的加入(708)。如可以观察到的，在常规系统中发生的模塑件640和离散间隔件之间的热膨胀系数(CTE)的不匹配减少了。例如，可减小界面的在其间可发生此类CTE不匹配的面积。
图8是对应于图1的示例的具有引线框间隔件的双面功率模块的更详细的示例性实施方式的分解图。在图8中，第一衬底802具有设置在其上的焊盘804。
引线框间隔件806示出了上述引线框间隔件102、202、302的示例性实施方式。图9是图8的引线框间隔件的顶视图，并且图10是图8的引线框间隔件的侧面角视图。
在图8中，引线框间隔件806可包括下陷部808和对应的下陷部表面。如图所示，下陷部808可以多种配置实现，只要引线框806最终具有凹槽，其中包括DAP以接收焊料层810和半导体管芯(器件)812。引线框806还可包含连接器809(例如，电源/接地/栅极连接器)和用于例如以期望的方式安装最终模块的其他特征结构。
此外，在图8中，示出了焊料层814，其包括信号焊盘焊点816。如本文所述，并且如下文参考图13至图15更详细地示出，信号焊盘连接件可对应于到安装在引线框806上的IGBT的栅极的电连接件。由于具有相对较小的尺寸，通常已知此类信号焊盘提供机械故障或电故障点。然而，如本文所示和所述，引线框间隔件806实现了信号焊盘焊点816的可靠形成和使用。
最后，在图8中示出了第二衬底818。当组装时，结果在图11中示出为模制之前的顶视图1102。图12是模制1204完成后的图8的示例的组装版本1202的顶视图。
图13是图12的示例的透明顶视图，其中图14是沿线A-A截取的图13的横截面，并且图15是沿线B-B截取的图13的横截面。
如图14所示，引线框间隔件1402具有通过焊料1406附接到衬底1408的第一侧。衬底1410通过焊料1412和1414附接到引线框间隔件1402的第二相对侧。具体地讲，衬底1410分别使用焊料连接件1416和1418附接到引线框间隔件1402的下陷部1412和1414。该组件被封装在模塑件1420中。
如图15所示，半导体器件1502(例如，二极管)可通过焊料1506连接到引线框间隔件1402，并且通过焊料1508连接到衬底1410。半导体器件1504(例如，IGBT)可通过焊料1510连接到引线框间隔件1402，并且通过焊料1512连接到衬底1410。焊料1514对应于图8的信号焊盘焊点816的示例。
更详细地关于焊料1514，图16是示出示例性实施方案中的信号焊盘的焊点处的剥离应变水平的曲线图。如图所示，与示例性常规设计相比，信号焊盘的焊点处的应变水平可例如降低两倍或更多倍。
图17是示出示例性实施方案中的热阻水平的曲线图。图17示出了结壳间的热阻，并且再次示出了与常规示例相比，使用本文所述的示例性技术获得的显著减小。
在各种示例性实施方式中，半导体器件模块包括第一衬底和引线框间隔件，该引线框间隔件具有电连接到该第一衬底的第一侧并且包括至少一个下陷部，该至少一个下陷部限定在该引线框间隔件的与该第一侧相对的第二侧上提供管芯附接焊盘(DAP)的凹槽。该半导体器件模块包括设置在该凹槽内并电连接到该DAP的第一半导体器件、设置在该凹槽内并电连接到该DAP的第二半导体器件，以及第二衬底，该第二衬底在引线框间隔件的第二侧安装在至少一个下陷部的至少一个下陷部表面上，并且至少部分地包封该凹槽内的该第一半导体器件和该第二半导体器件。
第二衬底可具有连接到第一半导体器件的第一部分，以及连接到第一半导体器件和第二半导体器件两者的第二部分。第一部分可具有到半导体器件模块的信号焊盘的焊料连接件。第一衬底和第二衬底可以是直接键合铜(DBC)衬底。该至少一个下陷部可基本上垂直于DAP和该至少一个下陷部表面。引线框间隔件可包括从至少一个下陷部表面成一角度延伸的成角部分。第一半导体器件可具有到第一衬底和到第二衬底的至少一个焊料连接件，并且第二半导体器件可具有到第一衬底和到第二衬底的至少一个焊料连接件。引线框间隔件可包括铜。第一半导体器件可包括绝缘栅双极晶体管(IGBT)，并且第二半导体器件可包括二极管。
根据各种示例性实施方式，半导体器件模块可包括：引线框间隔件，该引线框间隔件具有第一侧和第二侧，该第二侧具有带有至少一个下陷部表面的至少一个下陷部；第一衬底，该第一衬底安装到引线框间隔件的第一侧；以及第二衬底，该第二衬底安装到至少一个下陷部表面。半导体器件模块包括：第一半导体器件，该第一半导体器件电连接到该引线框间隔件的第二侧并且电连接到该第二衬底；以及第二半导体器件，该第二半导体器件电连接到该引线框间隔件的第二侧并且电连接到该第二衬底。
该至少一个下陷部可限定凹槽，并且该第一半导体器件和该第二半导体器件可安装在该凹槽内并且至少部分地被该第二衬底包封。第一半导体器件可具有到第一衬底和到第二衬底的至少一个焊料连接件，并且第二半导体器件可具有到第一衬底和到第二衬底的至少一个焊料连接件。该至少一个下陷部可基本上垂直于该引线框间隔件的第二侧上的表面，该第一半导体器件和该第二半导体器件安装在该引线框间隔件的第二侧上。引线框间隔件可使用单个金属件形成。第一半导体器件可包括绝缘栅双极晶体管(IGBT)，并且第二半导体器件可包括二极管。
根据各种示例性实施方式，制造半导体器件模块的方法可包括将第一衬底安装到引线框间隔件的第一侧，该引线框间隔件包括至少一个下陷部，该至少一个下陷部限定在引线框间隔件的与第一侧相对的第二侧上提供管芯附接焊盘(DAP)的凹槽。该方法还包括将第一半导体器件和第二半导体器件安装到DAP上，以及将第二衬底在该引线框间隔件的第二侧安装在该至少一个下陷部的至少一个下陷部表面上，并且至少部分地包封该凹槽内的该第一半导体器件和该第二半导体器件。
安装第一半导体器件和第二半导体器件可包括将第二衬底的第一部分焊接到第一半导体器件，以及将第二衬底的第二部分焊接到第一半导体器件和第二半导体器件两者。安装第一衬底可包括在第一焊接温度下将第一衬底焊接到引线框间隔件的第一侧。安装第一半导体器件和第二半导体器件可包括在低于第一焊接温度的第二焊接温度下焊接第一半导体器件和第二半导体器件。安装第二衬底可包括在低于第二焊接温度的第三焊接温度下将第二衬底焊接到该至少一个下陷部表面。
应当理解，在前述描述中，当元件诸如层、区域、衬底或部件被提及为在另一个元件上，连接到另一个元件，电连接到另一个元件，耦接到另一个元件，或电耦接到另一个元件时，元件可以直接地在另一个元件上，连接到或耦接到另一个元件上，或者可以存在一个或多个中间元件。相反，当元件被提及直接在另一个元件或层上、直接连接到另一个元件或层、或直接耦接到另一个元件或层时，不存在中间元件或层。虽然在整个具体实施方式中可能不会使用术语直接在…上、直接连接到…、或直接耦接到…，但是被示为直接在元件上、直接连接或直接耦接的元件能以此类方式提及。本申请的权利要求书(如果存在的话)可被修订以叙述在说明书中描述或者在附图中示出的示例性关系。
如在本说明书和权利要求书中所使用的，除非根据上下文明确地指出特定情况，否则单数形式可包括复数形式。除了附图中所示的取向之外，空间相对术语(例如，在…上方、在…上面、在…之上、在…下方、在…下面、在…之下、在…之以下等)旨在涵盖器件在使用或操作中的不同取向。在一些实施方式中，在…上面和在…下面的相对术语可分别包括竖直地在…上面和竖直地在…下面。在一些实施方式中，术语邻近能包括横向邻近或水平邻近。
一些实施方式可使用各种半导体处理和/或封装技术来实现。一些实施方式可使用与半导体衬底相关联的各种类型的半导体处理技术来实现，该半导体衬底包含但不限于，例如硅(Si)、砷化镓(GaAs)、氮化镓(GaN)、碳化硅(SiC)等。
虽然所描述的实施方式的某些特征已经如本文所述进行了说明，但是本领域技术人员现在将想到许多修改形式、替代形式、变化形式和等同形式。因此，应当理解，所附权利要求书旨在涵盖落入实施方式的范围内的所有此类修改形式和变化形式。应当理解，这些修改形式和变化形式仅仅以举例而非限制的方式呈现，并且可以进行形式和细节上的各种变化。除了相互排斥的组合以外，本文所述的装置和/或方法的任何部分可以任意组合进行组合。本文所述的实施方式可包括所描述的不同实施方式的功能、部件和/或特征的各种组合和/或子组合。

Claims (10)

1.一种半导体器件模块，包括：
第一衬底；
引线框间隔件，所述引线框间隔件具有电连接到所述第一衬底的第一侧并且包括在所述引线框间隔件的与所述第一侧相对的第二侧上的至少一个下陷部，所述至少一个下陷部限定提供管芯附接焊盘(DAP)的凹槽；
第一半导体器件，所述第一半导体器件设置在所述凹槽内并且电连接到所述管芯附接焊盘；
第二半导体器件，所述第二半导体器件设置在所述凹槽内并且电连接到所述管芯附接焊盘；和
第二衬底，所述第二衬底在所述引线框间隔件的所述第二侧上安装在所述至少一个下陷部的至少一个下陷部表面上，并且至少部分地包封所述凹槽内的所述第一半导体器件和所述第二半导体器件。
2.根据权利要求1所述的半导体器件模块，其中所述第一衬底和所述第二衬底是直接键合铜(DBC)衬底。
3.根据权利要求1所述的半导体器件模块，其中所述至少一个下陷部基本上垂直于所述管芯附接焊盘和所述至少一个下陷部表面，并且进一步地，其中所述引线框间隔件包括从所述至少一个下陷部表面成一角度地延伸的成角部分。
4.根据权利要求1所述的半导体器件模块，其中所述第一半导体器件包括绝缘栅双极晶体管(IGBT)，并且所述第二半导体器件包括二极管。
5.一种半导体器件模块，包括：
引线框间隔件，所述引线框间隔件具有第一侧和第二侧，所述第二侧具有至少一个下陷部，所述至少一个下陷部具有至少一个下陷部表面；
第一衬底，所述第一衬底安装到所述引线框间隔件的所述第一侧；
第二衬底，所述第二衬底安装到所述至少一个下陷部表面；
第一半导体器件，所述第一半导体器件电连接到所述引线框间隔件的所述第二侧并且电连接到所述第二衬底；和
第二半导体器件，所述第二半导体器件电连接到所述引线框间隔件的所述第二侧并且电连接到所述第二衬底。
6.根据权利要求5所述的半导体器件模块，其中所述至少一个下陷部限定凹槽，并且所述第一半导体器件和所述第二半导体器件安装在所述凹槽内并且至少部分地被所述第二衬底包封。
7.根据权利要求5所述的半导体器件模块，其中所述至少一个下陷部基本上垂直于其上安装有所述第一半导体器件和所述第二半导体器件的所述引线框间隔件的所述第二侧上的表面。
8.一种制造半导体器件模块的方法，包括：
将第一衬底安装到引线框间隔件的第一侧，所述引线框间隔件包括在所述引线框间隔件的与所述第一侧相对的第二侧上的至少一个下陷部，所述至少一个下陷部限定提供管芯附接焊盘(DAP)的凹槽；
将第一半导体器件和第二半导体器件安装到所述管芯附接焊盘上；以及
将第二衬底在所述引线框间隔件的所述第二侧上安装在所述至少一个下陷部的至少一个下陷部表面上，并且至少部分地包封所述凹槽内的所述第一半导体器件和所述第二半导体器件。
9.根据权利要求8所述的方法，其中安装所述第一半导体器件和所述第二半导体器件包括：
将所述第二衬底的第一部分焊接到所述第一半导体器件；以及
将所述第二衬底的第二部分焊接到所述第一半导体器件和所述第二半导体器件两者。
10.根据权利要求8所述的方法，其中安装所述第一衬底包括：
在第一焊接温度下将所述第一衬底焊接到所述引线框间隔件的所述第一侧；
在低于所述第一焊接温度的第二焊接温度下焊接所述第一半导体器件和所述第二半导体器件；以及
在低于所述第二焊接温度的第三焊接温度下将所述第二衬底焊接到所述至少一个下陷部表面。
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