CN113066917B - Chip die bonding method and terminal - Google Patents

Chip die bonding method and terminal Download PDF

Info

Publication number
CN113066917B
CN113066917B CN202110300638.7A CN202110300638A CN113066917B CN 113066917 B CN113066917 B CN 113066917B CN 202110300638 A CN202110300638 A CN 202110300638A CN 113066917 B CN113066917 B CN 113066917B
Authority
CN
China
Prior art keywords
chip
type
wafer
die bonding
lightened
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110300638.7A
Other languages
Chinese (zh)
Other versions
CN113066917A (en
Inventor
张跃春
罗元明
顾伟
胡伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Youguang Technology Co ltd
Original Assignee
ADVANCED OPTOELECTRONIC EQUIPMENT (SHENZHEN) CO LTD
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ADVANCED OPTOELECTRONIC EQUIPMENT (SHENZHEN) CO LTD filed Critical ADVANCED OPTOELECTRONIC EQUIPMENT (SHENZHEN) CO LTD
Priority to CN202110300638.7A priority Critical patent/CN113066917B/en
Publication of CN113066917A publication Critical patent/CN113066917A/en
Application granted granted Critical
Publication of CN113066917B publication Critical patent/CN113066917B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67271Sorting devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67276Production flow monitoring, e.g. for increasing throughput
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67288Monitoring of warpage, curvature, damage, defects or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/14Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Die Bonding (AREA)

Abstract

The invention discloses a chip die bonding method and a terminal, wherein a chip wafer to be die bonded is received, a corresponding lighting method is selected according to the type of chips in the chip wafer to light the chips, and the chip lighting method is adaptively matched according to the type of the chips; the method comprises the steps of carrying out electrical property detection on a lightened chip, judging whether the chip is a good product or not, if not, not carrying out die bonding, if so, judging the type of the chip, further judging whether the type of the chip belongs to a die bonding type or not, if so, sucking the chip for die bonding, and if not, establishing a mapping file of a chip wafer based on the type of the chip.

Description

Chip die bonding method and terminal
Technical Field
The invention relates to the technical field of die bonding, in particular to a die bonding method and a die bonding terminal for a chip.
Background
The traditional method for fixing the crystal on the chip wafer comprises the following specific steps: firstly, carrying out optical test and electrical property test on the LED chips to generate a file with coordinates of each chip and a reference point, various optical measurement results and various electrical measurement results;
and step two, importing the data measured in the step one into a selecting machine, setting a selecting rule, and aligning the reference points on the wafer on the selecting machine. Selecting chips of types A, B, C and the like according to the classification types of the electrical and optical data, selecting one type of chips to a first empty film, and selecting the next type of chips to a second empty film, and only leaving unusable bad chips until the good chips on the wafer are selected according to the classification types;
the third step: the classified chips are used wherever, the chips of the same category are released according to the requirement, and are fixed to the position required by the product by crystal fixing, crystal discharging or batch transfer equipment.
The problems of the traditional crystal fixing method are as follows: a large amount of test cost is consumed for performing photoelectric test on each chip; the chips are classified into different films according to types, the corresponding films are selected according to the types of the required chips, a large amount of classification cost and sheet selecting cost are needed, and the die bonding cost is high and the efficiency is low.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the chip die bonding method and the chip die bonding terminal are provided, so that the die bonding cost can be reduced, and the die bonding efficiency can be improved.
In order to solve the technical problems, the invention adopts the technical scheme that:
a chip die bonding method comprises the following steps:
receiving a chip wafer to be subjected to die bonding, and lighting the chip by using a lighting method corresponding to the type of the chip in the chip wafer;
carrying out electrical property detection on the lightened chip to obtain electrical property parameters of the lightened chip;
detecting whether the lightened chip is good, if so, determining the type of the chip according to the electrical performance parameters of the lightened chip, judging whether the type of the chip belongs to a die bonding type, if so, sucking the chip to perform die bonding, if not, establishing a mapping file of a chip wafer based on the type of the chip, and if not, performing die bonding.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
a chip die bonding terminal comprises a memory, a processor and a computer program which is stored on the memory and can run on the processor, wherein the processor executes the computer program to realize the following steps:
receiving a chip wafer to be subjected to die bonding, and lighting the chip by using a lighting method corresponding to the type of the chip in the chip wafer;
carrying out electrical property detection on the lightened chip to obtain electrical property parameters of the lightened chip;
detecting whether the lightened chip is good, if so, determining the type of the chip according to the electrical performance parameters of the lightened chip, judging whether the type of the chip belongs to a die bonding type, if so, sucking the chip to perform die bonding, if not, establishing a mapping file of a chip wafer based on the type of the chip, and if not, performing die bonding.
The invention has the beneficial effects that: receiving a chip wafer to be die-bonded, selecting a corresponding lighting method according to the type of chips in the chip wafer to light the chips, and realizing the adaptive matching of the chip lighting method according to the type of the chips; the method comprises the steps of carrying out electrical property detection on a lightened chip, judging whether the chip is a good product or not, if not, not carrying out die bonding, if so, judging the type of the chip, further judging whether the type of the chip belongs to a die bonding type or not, if so, sucking the chip for die bonding, and if not, establishing a mapping file of a chip wafer based on the type of the chip.
Drawings
FIG. 1 is a flowchart of a method for die attach according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a die attach terminal according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a nozzle of a chip die bonding method according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a thimble of a chip die attach method according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another die bonding terminal of the die bonding method according to the embodiment of the present invention;
fig. 6 is a schematic diagram of a chip wafer and a mapping file according to a chip die bonding method in an embodiment of the present invention;
fig. 7 is a schematic diagram of a mapping file of a chip die attach method according to an embodiment of the present invention.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, an embodiment of the invention provides a die bonding method, including the steps of:
receiving a chip wafer to be subjected to die bonding, and lighting the chip by using a lighting method corresponding to the type of the chip in the chip wafer;
carrying out electrical property detection on the lightened chip to obtain electrical property parameters of the lightened chip;
detecting whether the lightened chip is good, if so, determining the type of the chip according to the electrical performance parameters of the lightened chip, judging whether the type of the chip belongs to a die bonding type, if so, sucking the chip to perform die bonding, if not, establishing a mapping file of a chip wafer based on the type of the chip, and if not, performing die bonding.
From the above description, the beneficial effects of the present invention are: receiving a chip wafer to be die-bonded, selecting a corresponding lighting method according to the type of chips in the chip wafer to light the chips, and realizing the adaptive matching of the chip lighting method according to the type of the chips; the method comprises the steps of carrying out electrical property detection on a lightened chip, judging whether the chip is a good product or not, if not, not carrying out die bonding, if so, judging the type of the chip, further judging whether the type of the chip belongs to a die bonding type or not, if so, sucking the chip for die bonding, and if not, establishing a mapping file of a chip wafer based on the type of the chip.
Further, the lighting the chip by using a lighting method corresponding to a chip type of the chip in the chip wafer includes:
the chip types comprise a front-mounted blue-green light chip, a front-mounted red light chip and a flip chip;
if the chip type is a normally-installed blue-green light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm to align with the electrode of the normally-installed blue-green light chip;
if the chip type is a positively-mounted red light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm and an electrode on the ejector pin to align to the electrode of the positively-mounted red light chip;
and if the chip type is the flip chip, controlling the electrode on the thimble in the crystal absorption swing arm to align to the electrode of the flip chip.
According to the above description, the electrodes are additionally arranged in the suction nozzle and the ejector pin, the suction nozzle electrode is used for lighting the normally-installed blue-green light chip, the suction nozzle electrode and the ejector pin electrode are used for lighting the normally-installed red light chip, and the ejector pin electrode is used for lighting the flip chip, so that different lighting methods can be provided according to different chip types in the crystal suction process, the chip does not need to be optically tested in the early stage, the lighting effect of the chip can be more accurately obtained by adaptively adjusting the lighting methods by using the electrodes of the suction nozzle and the ejector pin, the detection efficiency is improved, and the subsequent chip can be further detected conveniently.
Further, the electrical performance detection of the lighted chip, and obtaining the electrical performance parameters of the lighted chip, includes:
carrying out electrical property detection on the lightened chip, and sending chip parameters obtained in the electrical property detection process to a detection chip;
receiving a detection result obtained after the detection chip detects the chip parameters;
and generating an electrical property parameter according to the detection result.
According to the above description, the lighted chip is detected, and the electrical performance parameter is generated according to the detection result, so that the photoelectric performance of the chip does not need to be detected in advance, but the electrical performance parameter of the chip is obtained in real time by detecting the chip, the detection time is saved, and the detection is easy to realize.
Further, the creating of the mapping file of the chip wafer based on the chip type includes:
obtaining a chip of the chip type in the wafer of the chip to be bonded, and generating a mapping file according to the chip of the chip type;
the reference point positions in the mapping file correspond to the actual chip positions on the chip wafer one by one.
As can be seen from the above description, for a chip type that does not belong to a die bonding type, a chip of the chip type in a wafer of a chip to be die bonded is obtained, a mapping file is generated, the mapping file may include a plurality of chips of the chip type that does not belong to the die bonding type, and reference point positions in the mapping file correspond to actual chip positions on the wafer of the chip one to one, and the mapping file can search for the corresponding chip according to the chip type, thereby saving the die bonding cost.
Further, creating a mapping file for the chip wafer based on the chip type includes:
and receiving the type of the chip to be die bonded, automatically selecting the chip corresponding to the type of the chip to be die bonded based on the mapping file, and carrying out die bonding.
According to the description, the chip corresponding to the type of the chip to be die-bonded is automatically selected according to the mapping file and die-bonded, so that the chip can be conveniently searched in the secondary die-bonding process, the die-bonding of the chip which is not die-bonded is realized, the time for picking the chip in the traditional die-bonding process is saved, and the die-bonding efficiency is improved.
Referring to fig. 2, another embodiment of the present invention provides a die attach terminal, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor executes the computer program to implement the following steps:
receiving a chip wafer to be subjected to die bonding, and lighting the chip by using a lighting method corresponding to the type of the chip in the chip wafer;
carrying out electrical property detection on the lightened chip to obtain electrical property parameters of the lightened chip;
detecting whether the lightened chip is good, if so, determining the type of the chip according to the electrical performance parameters of the lightened chip, judging whether the type of the chip belongs to a die bonding type, if so, sucking the chip to perform die bonding, if not, establishing a mapping file of a chip wafer based on the type of the chip, and if not, performing die bonding.
As can be seen from the above description, the chip wafer to be die-bonded is received, the corresponding lighting method is selected according to the type of the chip in the chip wafer to light the chip, and the chip lighting method is adaptively matched according to the type of the chip; the method comprises the steps of carrying out electrical property detection on a lightened chip, judging whether the chip is a good product or not, if not, not carrying out die bonding, if so, judging the type of the chip, further judging whether the type of the chip belongs to a die bonding type or not, if so, sucking the chip for die bonding, and if not, establishing a mapping file of a chip wafer based on the type of the chip.
Further, the crystal sucking swing arm comprises a suction nozzle and a thimble;
electrodes are arranged on the suction nozzle and the thimble;
the lighting method for lighting the chips in the chip wafer by using the chip types corresponding to the chips in the chip wafer when the processor executes the computer program comprises the following steps:
the chip types comprise a front-mounted blue-green light chip, a front-mounted red light chip and a flip chip;
if the chip type is a normally-installed blue-green light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm to align with an electrode of the normally-installed blue-green light chip;
if the chip type is a positively-mounted red light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm and an electrode on the ejector pin to align with an electrode of the positively-mounted red light chip;
and if the type of the chip is the flip chip, controlling the electrode on the thimble in the crystal absorption swing arm to align to the electrode of the flip chip.
According to the above description, the electrodes are additionally arranged in the suction nozzle and the ejector pin, the suction nozzle electrode is used for lighting the normally-installed blue-green light chip, the suction nozzle electrode and the ejector pin electrode are used for lighting the normally-installed red light chip, and the ejector pin electrode is used for lighting the flip chip, so that different lighting methods can be provided according to different chip types in the crystal suction process, the chip does not need to be optically tested in the early stage, the lighting effect of the chip can be more accurately obtained by adaptively adjusting the lighting methods by using the electrodes of the suction nozzle and the ejector pin, the detection efficiency is improved, and the subsequent chip can be further detected conveniently.
Further, the method further includes a detection chip, and the processor implements electrical performance detection on the lighted chip when executing the computer program, and obtaining electrical performance parameters of the lighted chip includes:
carrying out electrical property detection on the lightened chip, and sending chip parameters obtained in the electrical property detection process to a detection chip;
receiving a detection result obtained after the detection chip detects the chip parameters;
and generating an electrical property parameter according to the detection result.
According to the above description, the lighted chip is detected, and the electrical performance parameter is generated according to the detection result, so that the photoelectric performance of the chip does not need to be detected in advance, but the electrical performance parameter of the chip is obtained in real time by detecting the chip, the detection time is saved, and the detection is easy to realize.
Further, the creating of the mapping file of the chip wafer based on the chip type includes:
obtaining a chip of the chip type in the wafer of the chip to be bonded, and generating a mapping file according to the chip of the chip type;
the reference point positions in the mapping file correspond to the actual chip positions on the chip wafer one by one.
As can be seen from the above description, for a chip type that does not belong to a die bonding type, a chip of the chip type in a wafer of a chip to be die bonded is obtained, a mapping file is generated, the mapping file may include a plurality of chips of the chip type that does not belong to the die bonding type, and reference point positions in the mapping file correspond to actual chip positions on the wafer of the chip one to one, and the mapping file can search for the corresponding chip according to the chip type, thereby saving the die bonding cost.
Further, creating a mapping file for the chip wafer based on the chip type includes:
and receiving the type of the chip to be die bonded, automatically selecting the chip corresponding to the type of the chip to be die bonded based on the mapping file, and carrying out die bonding.
According to the description, the chip corresponding to the type of the chip to be die-bonded is automatically selected according to the mapping file and die-bonded, so that the chip can be conveniently searched in the secondary die-bonding process, the die-bonding of the chip which is not die-bonded is realized, the time for picking the chip in the traditional die-bonding process is saved, and the die-bonding efficiency is improved.
The chip die bonding method and the terminal are suitable for die bonding of various LED chips, particularly for chips such as an LED, a mini LED and a Micro LED, and are described in the following by specific embodiments:
example one
Referring to fig. 1, a die bonding method includes the steps of:
s1, receiving a chip wafer to be subjected to die bonding, and lighting the chip by using a lighting method corresponding to the type of the chip in the chip wafer;
the chip types comprise a front-mounted blue-green light chip, a front-mounted red light chip and a flip chip;
if the chip type is a normally-installed blue-green light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm to align with the electrode of the normally-installed blue-green light chip;
if the chip type is a positively-mounted red light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm and an electrode on the ejector pin to align to the electrode of the positively-mounted red light chip;
if the chip type is a flip chip, controlling an electrode on a thimble in the crystal absorption swing arm to align to the electrode of the flip chip;
specifically, in the present embodiment, referring to fig. 3 and 4, the conventional die-sucking swing arm and the used suction nozzle do not have any electrode, and the lighting test cannot be performed on the chip. In this embodiment, a test circuit is designed on the die bonder, a suction nozzle with two electrodes and a thimble with two electrodes are mounted on the die suction swing arm, and the wafer is lifted up by controlling the thimble and sucked by the suction nozzle, so that the wafer can be separated from the die by using the suction nozzle and the thimble;
for the normally-installed blue-green light chip, two electrodes are arranged above the chip, so that the two electrodes on a suction nozzle in the crystal suction swing arm are controlled to be aligned to the two electrodes of the normally-installed blue-green light chip from the upper part, voltage is applied to the suction nozzle, and the normally-installed blue-green light chip is lightened;
for the positively-installed red light chip, two electrodes are respectively arranged on the upper surface and the lower surface of the chip, one electrode on a suction nozzle and one electrode on an ejector pin in the crystal absorption swing arm are controlled to respectively align with the electrode of the positively-installed red light chip from the upper part and the lower part, voltage is applied to the suction nozzle and the ejector pin, and the positively-installed red light chip is lightened;
for the flip chip, two electrodes are arranged below the chip, the two electrodes on the ejector pin in the crystal absorption swing arm are controlled to align to the two electrodes of the flip chip from the lower part, voltage is applied to the ejector pin, and the flip chip is lightened;
s2, carrying out electrical property detection on the lightened chip to obtain electrical property parameters of the lightened chip;
performing electrical property detection on the lightened chip, and sending chip parameters obtained in the electrical property detection process to a detection chip;
receiving a detection result obtained after the detection chip detects the chip parameters;
generating an electrical property parameter according to the detection result;
specifically, referring to fig. 5, in this embodiment, electrical performance detection is performed on the lighted chip, ends a1 and a2 in the detection chip obtain data information transmitted by the nozzle electrode, ends a3 and a4 obtain data information transmitted by the thimble electrode, the detection chip detects the received data information to obtain a detection result, and generates an electrical performance parameter according to the detection result, so that the electrical performance parameter of the chip can be detected while the crystal swing arm is used to light the chip, and no extra time is required for electrical performance detection;
s3, detecting whether the lightened chip is a good product, if so, determining the type of the chip according to the electrical performance parameters of the lightened chip, judging whether the type of the chip belongs to a die bonding type, if so, sucking the chip to perform die bonding, if not, establishing a mapping file of a chip wafer based on the type of the chip, and if not, performing die bonding;
specifically, in this embodiment, a CCD (charge coupled device) camera on the device is used to photograph the chip, and whether the chip is good is determined according to the photographing result, and if the chip is good, the type of the chip is determined according to the electrical performance parameters of the lighted chip;
judging whether the chip type of the lightened chip belongs to a die bonding type, if so, directly sucking the chip by using a suction nozzle and carrying out die bonding; if not, establishing a mapping file of the chip wafer based on the chip type of the lightened chip;
wherein, the establishing of the mapping file of the chip wafer based on the chip type comprises the following steps:
obtaining a chip of the chip type in the wafer of the chip to be bonded, and generating a mapping file according to the chip of the chip type;
the reference point positions in the mapping file correspond to the actual chip positions on the chip wafer one by one;
specifically, referring to fig. 6 and 7, in the present embodiment, a Mapping document Mapping map is locally created, corresponding symbols are marked in the Mapping map according to different chip types, chips that are not die-bonded are marked in the Mapping map according to the chip types, and the marked positions of each chip in the Mapping map correspond to the actual chip positions on the chip wafer one to one, so that the positions of any type of chip can be directly obtained through the Mapping map without performing the picking operation in the conventional die bonding.
Example two
The difference between the present embodiment and the first embodiment is that how to perform secondary die bonding on the die that is not die bonded is specifically defined:
wherein, after establishing the mapping file of the chip wafer based on the chip type, the method comprises the following steps:
receiving the type of a chip to be die bonded, automatically selecting a chip corresponding to the type of the chip to be die bonded based on the mapping file, and carrying out die bonding;
specifically, the type of the chip to be die-bonded is received, the Mapping chart automatically selects the corresponding chip according to the type of the chip to be die-bonded, die bonding, chip arrangement or batch transfer of the chips are carried out according to the type of the chip, so that the remaining chips which are not die-bonded can be die-bonded by only selecting the type of the chip during secondary die bonding, the die bonding of the chip can be rapidly completed, a chip picking link in the die bonding process is omitted, the die bonding efficiency is improved, and the die bonding cost is reduced.
EXAMPLE III
Referring to fig. 2, a chip die attach terminal includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor executes the computer program to implement the steps of the chip die attach method according to the first embodiment or the second embodiment.
In summary, the chip die attach method and the terminal provided by the invention receive a chip wafer to be die attached, and select a corresponding lighting method to light the chip according to the type of the chip in the chip wafer, wherein electrodes are added in a suction nozzle and a thimble of a die suction swing arm, and different chip lighting methods are used for different structures of a normally installed chip and a flip chip, so that the chip lighting method is adaptively matched according to the type of the chip; the suction nozzle and the ejector pin are used for acquiring the data information of the lightened chip and detecting according to the data information to obtain the electrical performance parameters of the chip, so that the electrical performance parameters can be acquired only by acquiring the data information of the chip when the chip is lightened without performing early-stage photoelectric performance detection on the chip, and the die bonding efficiency is improved; the method comprises the steps of using a CCD camera to shoot a chip and judge whether the chip is good, if not, not carrying out die bonding, if so, judging the type of the chip, further judging whether the type of the chip belongs to the die bonding type, if so, absorbing the chip to carry out die bonding, and if not, establishing a mapping file of a chip wafer based on the type of the chip.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.

Claims (4)

1. A chip die bonding method is characterized by comprising the following steps:
receiving a chip wafer to be subjected to die bonding, and lighting the chip by using a lighting method corresponding to the type of the chip in the chip wafer;
carrying out electrical property detection on the lightened chip to obtain electrical property parameters of the lightened chip;
detecting whether the lightened chip is a good product or not, if so, determining the type of the chip according to the electrical performance parameters of the lightened chip, judging whether the type of the chip belongs to a die bonding type or not, if so, absorbing the chip to perform die bonding, if not, establishing a mapping file of a chip wafer based on the type of the chip, and if not, respectively placing the chip in different films, and if not, performing die bonding;
performing electrical property detection on the lightened chip, and obtaining electrical property parameters of the lightened chip comprises the following steps:
carrying out electrical property detection on the lightened chip, and sending chip parameters obtained in the electrical property detection process to a detection chip;
receiving a detection result obtained after the detection chip detects the chip parameters;
generating electrical performance parameters according to the detection result;
establishing a mapping file of the chip wafer based on the chip type comprises the following steps:
obtaining a chip of the chip type in the wafer of the chip to be bonded, and generating a mapping file according to the chip of the chip type;
the reference point positions in the mapping file correspond to the actual chip positions on the chip wafer one by one;
the lighting the chip by using the lighting method corresponding to the chip type of the chip in the chip wafer comprises the following steps:
the chip types comprise a front-mounted blue-green light chip, a front-mounted red light chip and a flip chip;
if the chip type is a normally-installed blue-green light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm to align with the electrode of the normally-installed blue-green light chip;
if the chip type is a positively-mounted red light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm and an electrode on the ejector pin to align to the electrode of the positively-mounted red light chip;
and if the chip type is the flip chip, controlling the electrode on the thimble in the crystal absorption swing arm to align to the electrode of the flip chip.
2. The method of claim 1, wherein the step of creating the mapping file of the chip wafer based on the chip type comprises:
and receiving the type of the chip to be die bonded, automatically selecting the chip corresponding to the type of the chip to be die bonded based on the mapping file, and carrying out die bonding.
3. A die attach terminal comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program:
receiving a chip wafer to be subjected to die bonding, and lighting the chip by using a lighting method corresponding to the type of the chip in the chip wafer;
carrying out electrical property detection on the lightened chip to obtain electrical property parameters of the lightened chip;
detecting whether the lightened chip is a good product or not, if so, determining the type of the chip according to the electrical performance parameters of the lightened chip, judging whether the type of the chip belongs to a die bonding type or not, if so, absorbing the chip to perform die bonding, if not, establishing a mapping file of a chip wafer based on the type of the chip, and if not, respectively placing the chip in different films, and if not, performing die bonding;
the processor executes the computer program to realize electrical performance detection of the lightened chip, and the obtaining of the electrical performance parameters of the lightened chip comprises the following steps:
carrying out electrical property detection on the lightened chip, and sending chip parameters obtained in the electrical property detection process to a detection chip;
receiving a detection result obtained after the detection chip detects the chip parameters;
generating electrical performance parameters according to the detection result;
establishing a mapping file of the chip wafer based on the chip type comprises the following steps:
obtaining a chip of the chip type in the wafer of the chip to be bonded, and generating a mapping file according to the chip of the chip type;
the reference point positions in the mapping file correspond to the actual chip positions on the chip wafer one by one;
the crystal sucking swing arm comprises a suction nozzle and a thimble;
electrodes are arranged on the suction nozzle and the thimble;
the lighting method for lighting the chips in the chip wafer by using the chip types corresponding to the chips in the chip wafer when the processor executes the computer program comprises the following steps:
the chip types comprise a front-mounted blue-green light chip, a front-mounted red light chip and a flip chip;
if the chip type is a normally-installed blue-green light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm to align with an electrode of the normally-installed blue-green light chip;
if the chip type is a positively-mounted red light chip, controlling an electrode on a suction nozzle in the crystal suction swing arm and an electrode on the ejector pin to align with an electrode of the positively-mounted red light chip;
and if the type of the chip is the flip chip, controlling the electrode on the thimble in the crystal absorption swing arm to align to the electrode of the flip chip.
4. The die attach terminal of claim 3, wherein the creating a mapping file for a die wafer based on the die type comprises:
and receiving the type of the chip to be die bonded, automatically selecting the chip corresponding to the type of the chip to be die bonded based on the mapping file, and carrying out die bonding.
CN202110300638.7A 2021-03-22 2021-03-22 Chip die bonding method and terminal Active CN113066917B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110300638.7A CN113066917B (en) 2021-03-22 2021-03-22 Chip die bonding method and terminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110300638.7A CN113066917B (en) 2021-03-22 2021-03-22 Chip die bonding method and terminal

Publications (2)

Publication Number Publication Date
CN113066917A CN113066917A (en) 2021-07-02
CN113066917B true CN113066917B (en) 2022-03-25

Family

ID=76562745

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110300638.7A Active CN113066917B (en) 2021-03-22 2021-03-22 Chip die bonding method and terminal

Country Status (1)

Country Link
CN (1) CN113066917B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113782558A (en) * 2021-09-14 2021-12-10 深圳市兆驰晶显技术有限公司 Method for transferring Mini or Micro LED chip to PCB

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101499425A (en) * 2008-01-31 2009-08-05 力成科技股份有限公司 Take-and-measure wafer bonding method
CN103117240A (en) * 2011-11-16 2013-05-22 扬州扬杰电子科技股份有限公司 Chip picking device
EP2674769B1 (en) * 2012-06-13 2014-08-20 Multitest elektronische Systeme GmbH Device and method for removing tested semiconductor elements
JP2014060249A (en) * 2012-09-18 2014-04-03 Hitachi High-Tech Instruments Co Ltd Die bonder and die position recognition method
CN104520981B (en) * 2013-04-03 2017-11-17 山东晶泰星光电科技有限公司 A kind of suction nozzle, method and mechanism for testing for testing flip LED chips
CN103681401A (en) * 2013-10-25 2014-03-26 深圳市恒睿智达科技有限公司 Die bonder detection mechanism and continuous detection method
JP5614825B1 (en) * 2013-11-29 2014-10-29 上野精機株式会社 Classification device, classification method, and classification program
CN204760432U (en) * 2015-06-02 2015-11-11 中山市利光电子有限公司 Solid brilliant machine of encapsulation LED
CN104934355A (en) * 2015-06-15 2015-09-23 桂林斯壮微电子有限责任公司 Crystal-leakage detection device and detection method thereof
CN207486733U (en) * 2017-11-21 2018-06-12 中山市欧磊光电科技有限公司 LED lamp bead die bond structure
CN108155127A (en) * 2017-12-27 2018-06-12 昆山思雷电子科技有限公司 A kind of die bond ancillary equipment and bonder
CN109411390B (en) * 2018-09-11 2020-12-01 深圳赛意法微电子有限公司 Automatic grading packaging method and system for semiconductor device
CN110379732A (en) * 2019-05-28 2019-10-25 广东工业大学 A kind of detection die bond integration bull chip mounter

Also Published As

Publication number Publication date
CN113066917A (en) 2021-07-02

Similar Documents

Publication Publication Date Title
CN108735872B (en) Semiconductor chip repairing method and semiconductor chip repairing device
JP5064375B2 (en) Electronic element testing apparatus, system, and method.
CN104600009B (en) Chip measuring sorting system and method
CN105717439A (en) Chip test method and system
CN113066917B (en) Chip die bonding method and terminal
CN102735982A (en) Inspection apparatus and method of light emitting device
CN110164789A (en) Crystal round test approach and wafer tester
CN103776841A (en) Automatic detection device and method of synthetic leather defect
CN108807212A (en) Crystal round test approach and wafer tester
CN102101112B (en) Light emitting diode wafer sorting method
TWI805564B (en) Chip transferring method and the apparatus thereof
CN106158689A (en) Diode photoelectric test methods based on many group test probes
CN111007149B (en) Internal detection method for TSOP (time delay locked loop) laminated chip
CN110361644A (en) A kind of detection device and method of LED chip electric property
CN109719056A (en) A kind of camera module focusing assembly line and its method based on machine vision
CN103606529A (en) Method and device for improving defect classification accuracy
CN112927192A (en) Method for marking ink dots on wafer
TWI421962B (en) Light emitting diode wafer sorting method
TWI360854B (en) Carrier wafer position device and examination meth
KR20040086439A (en) Probe area setting method and probe device
CN106057696B (en) Diode photoelectric test method based on photodetachment
CN112648990B (en) On-chip testing device and method for quartz tuning fork sensitive structure
CN106910694A (en) A kind of method and device of the integrated circuit devcie angularity of automatic detection
CN106024655A (en) Classification method for defects of polycrystalline silicon wafer
CN217638759U (en) Chip production automatic detection system based on optics CCD module

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20221123

Address after: 224000 phase II of Yanlong Street intelligent terminal entrepreneurship Park, Yandu District, Yancheng City, Jiangsu Province

Patentee after: Jiangsu Youguang Technology Co.,Ltd.

Address before: No.144-3, Hengping Road, Yuanshan street, Longgang District, Shenzhen, Guangdong 518000

Patentee before: ADVANCED OPTOELECTRONIC EQUIPMENT (SHENZHEN) Co.,Ltd.