CN112927192A - Method for marking ink dots on wafer - Google Patents
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- CN112927192A CN112927192A CN202110128685.8A CN202110128685A CN112927192A CN 112927192 A CN112927192 A CN 112927192A CN 202110128685 A CN202110128685 A CN 202110128685A CN 112927192 A CN112927192 A CN 112927192A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
- G06T7/001—Industrial image inspection using an image reference approach
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
- G06T7/0008—Industrial image inspection checking presence/absence
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30148—Semiconductor; IC; Wafer
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Abstract
The invention provides a method for marking ink dots on a wafer, which comprises the steps of placing a transparent standard template on the back surface of the wafer, marking ink dots on defective crystal grains in a grid pattern of the transparent standard template, then photographing the transparent standard template to store the grid pattern, then carrying out mirror image processing on the grid pattern to obtain a mirror image, and merging the mirror image with an electrical test pattern of the wafer to obtain the distribution condition of the defective crystal grains of the wafer. The invention realizes point-to-point ink dot identification on the defective crystal grains on the wafer, avoids misjudgment caused by manual recording of the defective crystal grains and reduces the labor cost. Furthermore, the invention performs mirror image processing on the grid graph with the coordinate information of the defective crystal grains through the data processing software to obtain the mirror image corresponding to the distribution condition of the defective crystal grains of the wafer, reduces errors caused by manual mirror image processing, realizes mass production of the ink dot marks of the wafer, improves the accuracy of the ink dot marks of the wafer and reduces the rejection of the crystal grains.
Description
Technical Field
The invention relates to the field of integrated circuit manufacturing, in particular to a method for marking ink dots on a wafer.
Background
In semiconductor manufacturing, as the size of a wafer increases and the size of a device decreases, a wafer may be divided into thousands of identical or different chips as necessary. Due to the process design or the characteristics of the material itself, the final wafer has defective dies (defective Die) and qualified dies (goodd Die). Each die on the wafer is typically tested by a test machine and a Probe Card (Probe Card) to ensure that the electrical characteristics and performance of the die meet the design specifications. In the testing process, if a defective crystal grain is found, marking is needed, and Ink dot marking (Ink) can be performed on the defective crystal grain by applying Ink dots to facilitate subsequent scribing and packaging.
For the NTO (New Tape-out), the number of defective chips needs to be manually recorded, the defective chips are manually marked on the back surface of the wafer, and the mirror image processing is manually performed to mark Ink dots (Ink) on the defective chips on the front surface of the wafer. This kind of method of ink dot sign relies on artifical record of engineer and ink dot sign completely, and is inefficient and take time for a long time, can't be applied to the ink dot sign of the wafer of volume production, and the manual work carries out the mirror image processing, makes mistakes very easily, easily causes the defect chip to leak the mark and flow out, causes bad chip to flow out, forms the low yield and then leads to customer's quality claim.
Disclosure of Invention
The invention aims to provide a method for marking a wafer ink dot, which avoids misjudgment caused by manually recording defective crystal grains, realizes mass production of the wafer ink dot mark, improves the accuracy of the wafer ink dot mark and reduces the rejection of the crystal grains.
The invention provides a method for marking ink dots on a wafer, which comprises the following steps:
providing a transparent standard template, wherein a grid pattern corresponding to the crystal grain distribution of the wafer is arranged on the transparent standard template
Correspondingly placing the transparent standard template on the back of the wafer, and performing ink dot identification at the position of the grid pattern corresponding to the defect crystal grains;
photographing the transparent standard template and storing the grid diagram; and
and carrying out mirror image processing on the grid image to obtain a mirror image, and combining the mirror image with the electrical property test image of the wafer to obtain the distribution condition of the defect crystal grains of the wafer.
Optionally, the transparent standard template is fixed on the back surface of the wafer through a clamp.
Optionally, the wafer is fixed in an iron ring, and the clamp is customized according to the iron ring.
Optionally, the grid distribution of the grid map is customized according to the type of the wafer, and the grid map at least covers the wafer to correspond to the grain distribution of the wafer.
Optionally, coordinates are set on the grid map.
Optionally, after the transparent standard template is photographed, the ink dot marks are removed by using a cleaning agent, so that the transparent standard template can be recycled.
Optionally, the transparent standard template is photographed by a camera, and after photographing, the grid map with the coordinate information of the defective crystal grain is automatically stored in a network disk.
Optionally, the coordinate information is processed by a data processing software to obtain a mirror image of the grid map.
Optionally, the data processing software includes an image recognition unit for converting the photograph of the grid map into data information.
Optionally, the data processing software further includes a data processing unit, configured to process the data information to obtain the data information of the mirror image.
In summary, the present invention provides a method for marking ink dots on a wafer, which includes placing a transparent standard template on a back surface of the wafer, marking defective dies in a grid pattern of the transparent standard template with ink dots, photographing the transparent standard template to store the grid pattern, mirroring the grid pattern to obtain a mirror image, and merging the mirror image with an electrical test pattern of the wafer to obtain a distribution status of the defective dies of the wafer. The invention realizes point-to-point ink dot identification on the defective crystal grains on the wafer, avoids misjudgment caused by manual recording of the defective crystal grains and reduces the labor cost. Furthermore, the invention performs mirror image processing on the grid graph with the coordinate information of the defective crystal grains through the data processing software to obtain the mirror image corresponding to the distribution condition of the crystal grains on the front side of the wafer, reduces errors caused by manual mirror image processing, realizes mass production of the ink dot marks of the wafer, improves the accuracy of the ink dot marks of the wafer, and reduces the rejection of the crystal grains.
Drawings
FIG. 1 is a flowchart of a method for identifying ink dots on a wafer according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram illustrating steps of a method for marking ink dots on a wafer according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of the structure of the fixture for fixing the wafer and the transparent standard template.
Wherein, the reference numbers:
100-a wafer; 110-normal grains; 120-defective grains; 200-transparent standard template; 210-grid graph; 220-dot identification; 300-a clamp; 400-iron ring.
Detailed Description
The method for marking ink dots on a wafer according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description and drawings, it being understood, however, that the concepts of the present invention may be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. The drawings are in simplified form and are not to scale, but are provided for convenience and clarity in describing embodiments of the invention.
The terms "first," "second," and the like in the description are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other sequences than described or illustrated herein. Similarly, if the method described herein comprises a series of steps, the order in which these steps are presented herein is not necessarily the only order in which these steps may be performed, and some of the described steps may be omitted and/or some other steps not described herein may be added to the method. Although elements in one drawing may be readily identified as such in other drawings, the present disclosure does not identify each element as being identical to each other in every drawing for clarity of description.
Fig. 1 is a flowchart of a method for marking a wafer ink dot provided in this embodiment, and referring to fig. 1, the method for marking a wafer ink dot provided in this embodiment includes:
s01: providing a transparent standard template, wherein a grid pattern corresponding to the crystal grain distribution of the wafer is arranged on the transparent standard template;
s02: correspondingly placing the transparent standard template on the back of the wafer, and carrying out ink dot identification on the position of the grid pattern corresponding to the defective crystal grain;
s03: photographing the transparent standard template and storing the grid diagram; and
s04: and carrying out mirror image processing on the grid image to obtain a mirror image, and combining the mirror image with the electrical property test image of the wafer to obtain the distribution condition of the defect crystal grains of the wafer.
Fig. 2 is a structural diagram corresponding to each step of the method for marking ink dots on a wafer according to this embodiment, and fig. 3 is a structural diagram illustrating a fixture for fixing a wafer and a transparent standard template. The method for marking the ink dots on the wafer according to the present embodiment will be described in detail with reference to fig. 1, fig. 2, and fig. 3.
First, step S01 is executed to provide a transparent standard template (Golden map)200, on which a grid pattern 210 corresponding to the grain distribution of the wafer 100 is disposed.
The dies on the wafer 100 include Good dies (Good Die) and defective dies (defective Die), for example, each Die on the wafer may be tested by a testing machine and a Probe Card (Probe Card) to detect a failed Die, but the detected failed Die may be only a part of the defective Die on the wafer 100, some defective dies on the wafer 100 need to be determined by manually detecting the back side of the wafer, for example, a Die at a certain position on the back side of the wafer is damaged, and the defective dies 120 determined by detecting the back side of the wafer also need to be correspondingly marked to prevent the defective dies 120 from missing. As shown in fig. 2, the present embodiment provides a transparent standard template (Golden map)200 disposed on the back side of the wafer 100, wherein a grid pattern 210 corresponding to the die distribution of the wafer 100 is disposed on the transparent standard template 200, so as to mark the normal die 110 and the defective die 120 detected on the back side of the wafer on the transparent standard template 200.
The grid distribution of the grid map 210 is customized according to the type of the wafer, and different wafers correspond to different grain distribution situations, that is, one wafer adopts a grid map 210 with grid distribution. The grid map 210 at least covers the wafer 100 to ensure that the grid distribution corresponds to the die distribution of the wafer 100. The grid distribution of the grid pattern herein corresponds to the distribution of the back-side crystal grains of the wafer.
The transparent template 200 may be made of a transparent material such as resin or glass, and the grid pattern 210 has coordinates (not shown in fig. 2) set thereon so as to precisely locate the coordinate positions of the defective dies 120 on the wafer 100.
Next, step S02 is executed to correspondingly place the transparent standard template 200 on the back side of the wafer 100, and perform dot identification at the position of the grid pattern 210 corresponding to the defective die 120.
As shown in fig. 3, the transparent reticle may be correspondingly fixed to the back surface of the wafer 100 by a Jig (Jig) 300. As shown in fig. 2, the wafer 100 is fixed in an iron ring 400, and preferably, the transparent standard template 200 can be fixed in the same size iron ring 400 to match the wafer 100. Accordingly, the transparent standard template 200 does not adopt a fixed structure, and is directly inserted into the Jig (Jig)300, as long as the distribution of the grains distributed on the wafer 100 in the grid pattern 210 on the transparent standard template 200 is ensured to correspond.
In this embodiment, the dot mark 220 is performed at a position on the grid map 210 corresponding to the defective die 120 to mark the coordinate position of the defective die 120. The ink dot marks 220 can be removed by a cleaning agent after the subsequent photographing of the transparent standard template 200, so that the transparent standard template can be recycled.
Next, step S03 is executed to take a picture of the transparent standard template 200 and store the grid map 210. For example, the transparent standard template 200 is photographed by a camera, and the grid map 210 with the dot markers 220 is automatically stored in a screen tray after photographing. In this embodiment, the transparent standard template 200 is fixed on the back surface of the wafer 100 through the fixture 300, and when the transparent standard template 200 is photographed, the transparent standard template 200 is located on the wafer 100, and in other embodiments of the present invention, the transparent standard template 200 with the ink dot marks completed may be photographed separately.
Next, step S04 is executed to perform a mirror image processing on the grid map 210 to obtain a mirror image map (Ink map), and the mirror image map is integrated with the electrical test chart of the wafer to obtain the distribution of the defective dies of the wafer.
The grid map 210 with the dot identifications 220 is processed, for example, by a data processing software, to obtain a mirror image of the grid map. The distribution of defective crystal grains in the wafer is a distribution of defective crystal grains on the Front surface (Front side) of the wafer, that is, the mirror image corresponds to a distribution of defective crystal grains on the Front surface of the wafer. The data processing software comprises an image recognition unit for converting the photograph of the grid map into data information. As shown in fig. 2, the grid position of the dot mark 220 is stored with the number "1", and the grid position without the dot mark 220 (the grid corresponding to the qualified die) is stored with the number "0" (not shown in the figure). The data processing software further comprises a data processing unit for processing the data information to obtain data information of the mirror image. For convenience of explanation, fig. 2 only symbolically illustrates a process from data information of a grid diagram to data information of a mirror diagram, and a data processing process related in the middle may be processed by using an existing common data processing method, which is not described herein again.
Then, the obtained mirror image and the electrical test chart of the Wafer are integrated to obtain the distribution condition (Wafer Mapping) of the defect grains on the front surface of the Wafer. The electrical test (Chip Prober, CP) graph also comprises a test result (failure classification) of a failed crystal grain, namely, the position coordinate of a defective crystal grain in an obtained mirror image graph is matched and integrated with the position coordinate of the failed crystal grain in the electrical test graph, the type of the crystal grain (unqualified crystal grain or qualified crystal grain) can be judged according to the position coordinate of the crystal grain in the CP graph, the failure analysis type can be judged according to the position coordinate, and the subsequent process can pick up the corresponding crystal grain according to the integrated Wafer Mapping, so that the subsequent packaging process is completed. Accordingly, the position coordinates of the failed die in the electrical test pattern may partially coincide with the position coordinates of the defective die in the mirror pattern.
In summary, the present invention provides a method for marking ink dots on a wafer, the method includes placing a transparent standard template on a back surface of the wafer, marking ink dots on defective dies in a grid pattern of the transparent standard template, photographing the transparent standard template to store the grid pattern, performing mirror image processing on the grid pattern to obtain a mirror image, and merging the mirror image with an electrical test pattern of the wafer to obtain a distribution status of the defective dies of the wafer. The invention realizes point-to-point ink dot identification on the defective crystal grains on the wafer, avoids misjudgment caused by manual recording of the defective crystal grains and reduces the labor cost. Furthermore, the data processing software is used for carrying out mirror image processing on the grid map with the coordinate information of the defective crystal grains to obtain a mirror image corresponding to the distribution condition of the crystal grains on the front surface of the wafer, so that errors caused by manual mirror image processing are reduced. In addition, the method for marking the ink dots on the wafer can realize mass production of the ink dot marks, improve the accuracy of the ink dot marks on the wafer and reduce the rejection of crystal grains.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. A method of wafer ink dot identification, comprising:
providing a transparent standard template, wherein a grid pattern corresponding to the crystal grain distribution of the wafer is arranged on the transparent standard template;
correspondingly placing the transparent standard template on the back of the wafer, and performing ink dot identification at the position of the grid pattern corresponding to the defect crystal grains;
photographing the transparent standard template and storing the grid diagram; and
and carrying out mirror image processing on the grid image to obtain a mirror image, and combining the mirror image with the electrical property test image of the wafer to obtain the distribution condition of the defect crystal grains of the wafer.
2. The method of claim 1, wherein the transparent master template is secured to the back side of the wafer by a clamp.
3. The method of claim 2, wherein the wafer is held within an iron ring, and the holder is customized to the iron ring.
4. The method of wafer dot marking as claimed in claim 1, wherein the grid distribution of the grid map is customized according to the kind of wafer, the grid map at least covering the wafer to correspond to the die distribution of the wafer.
5. The method of wafer dot identification as claimed in claim 4 wherein coordinates are provided on the grid map.
6. The method for marking the ink dots on the wafer as claimed in claim 5, wherein the transparent standard template is taken a picture and then removed by a cleaning agent so as to be recycled.
7. The method of claim 1, wherein the transparent standard template is photographed by a camera, and a grid map with coordinate information of the defective die is automatically stored in a grid disk after photographing.
8. The method of claim 7, wherein the coordinate information is processed by a data processing software to obtain a mirror image of the grid map.
9. The method of wafer dot identification as claimed in claim 8 wherein the data processing software includes an image recognition unit for converting a photograph of the grid map into data information.
10. The method of claim 9, wherein the data processing software further comprises a data processing unit for processing the data information to obtain the data information of the mirror image.
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| CN202110128685.8A CN112927192A (en) | 2021-01-29 | 2021-01-29 | Method for marking ink dots on wafer |
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| CN202110128685.8A CN112927192A (en) | 2021-01-29 | 2021-01-29 | Method for marking ink dots on wafer |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114429926A (en) * | 2021-12-31 | 2022-05-03 | 上海翔芯集成电路有限公司 | Method for producing 12-inch and above wafers by small-area chip mounting equipment |
| CN114758969A (en) * | 2022-04-18 | 2022-07-15 | 无锡九霄科技有限公司 | Wafer back visual detection structure, detection method and related equipment |
| CN118471863A (en) * | 2024-07-09 | 2024-08-09 | 成都高投芯未半导体有限公司 | Wafer coordinate map generation method and device, storage medium and electronic equipment |
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