CN113066363B - Display panel and manufacturing method thereof - Google Patents
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- CN113066363B CN113066363B CN202110256095.3A CN202110256095A CN113066363B CN 113066363 B CN113066363 B CN 113066363B CN 202110256095 A CN202110256095 A CN 202110256095A CN 113066363 B CN113066363 B CN 113066363B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 185
- 229910052751 metal Inorganic materials 0.000 claims abstract description 94
- 239000002184 metal Substances 0.000 claims abstract description 94
- 238000007789 sealing Methods 0.000 claims abstract description 48
- 238000000034 method Methods 0.000 claims description 24
- 230000008569 process Effects 0.000 claims description 16
- 239000004020 conductor Substances 0.000 claims description 9
- 238000007688 edging Methods 0.000 claims description 9
- 238000007639 printing Methods 0.000 claims description 7
- 239000004973 liquid crystal related substance Substances 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 178
- 239000010408 film Substances 0.000 description 25
- 239000012790 adhesive layer Substances 0.000 description 13
- 239000000463 material Substances 0.000 description 12
- 238000013461 design Methods 0.000 description 9
- 238000002161 passivation Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 description 3
- -1 polyethylene naphthalate Polymers 0.000 description 3
- 239000011112 polyethylene naphthalate Substances 0.000 description 3
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000004695 Polyether sulfone Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000004417 polycarbonate Substances 0.000 description 2
- 229920006393 polyether sulfone Polymers 0.000 description 2
- 239000011135 tin Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- MMZYCBHLNZVROM-UHFFFAOYSA-N 1-fluoro-2-methylbenzene Chemical compound CC1=CC=CC=C1F MMZYCBHLNZVROM-UHFFFAOYSA-N 0.000 description 1
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910020923 Sn-O Inorganic materials 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 125000003118 aryl group Chemical group 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
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- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000013532 laser treatment Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- JRZJOMJEPLMPRA-UHFFFAOYSA-N olefin Natural products CCCCCCCC=C JRZJOMJEPLMPRA-UHFFFAOYSA-N 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229920001230 polyarylate Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910002027 silica gel Inorganic materials 0.000 description 1
- 239000000741 silica gel Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application discloses a display panel and a manufacturing method thereof, comprising the following steps: the first substrate is provided with a first side surface, the first substrate comprises a metal pin, the metal pin is provided with a side surface, and the side surface of the metal pin is flush with the first side surface; the second substrate is arranged opposite to the first substrate and is provided with a second side surface, and the second side surface is flush with the first side surface; the sealing layer is attached between the first substrate and the second substrate and is provided with a third side surface, and the third side surface is flush with the first side surface and the second side surface; the conductive layer is arranged on the first side face, the second side face, the third side face and one side of the first substrate far away from the second substrate, and the conductive layer is electrically connected with the side face of the metal pin; and the binding component is arranged on one surface of the conductive layer away from the first substrate.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a manufacturing method thereof.
Background
With the rapid development of display panels, consumers have increasingly higher quality requirements for display panels; the product requirements of the spliced screen are increasing for narrow frames without frames, and the technology for narrow frames and extremely narrow frames faces some technical problems. The main technical difficulty is that the binding frame is narrower and narrower, and the requirements on material characteristics and peripheral circuit design are higher.
The side bonding technique (Side Bonding Technology) is a technique of bonding a COF (Chip On Film) to a glass boundary section. To implement the side-binding technique, it is necessary to implement the engagement between the glass-in-plane and COF traces in a glass-section printed circuit.
However, due to the limitation of the side binding technology, the yield of the COF circuit in the anisotropic conductive film (Anisotropic Conductive Film, ACF)) adhesive is low in the process of processing, manufacturing and transporting.
Therefore, a new solution is needed to solve the above-mentioned problems.
Disclosure of Invention
The embodiment of the application provides a display panel and a manufacturing method thereof, which are used for improving the yield of the display panel in the processing, manufacturing and transportation processes.
An embodiment of the present application provides a display panel including:
a first substrate having a first side, the first substrate comprising a metal pin having a side, the side of the metal pin being flush with the first side;
the second substrate is arranged opposite to the first substrate, and is provided with a second side surface, and the second side surface is flush with the first side surface;
a sealing layer attached between the first substrate and the second substrate, the sealing layer having a third side surface, the third side surface being flush with the first side surface and the second side surface;
the conductive layer is arranged on the first side face, the second side face, the third side face and one side, far away from the second substrate, of the first substrate, and is electrically connected with the side face of the metal pin;
and the binding component is arranged on one surface of the conductive layer away from the first substrate.
In the display panel provided by the embodiment of the application, the width of the sealing layer is less than or equal to 400 micrometers.
In the display panel provided by the embodiment of the application, the conductive layer comprises a first sub-conductive layer and a second sub-conductive layer, and the first sub-conductive layer is electrically connected with the second sub-conductive layer;
the first sub-conductive layer is arranged on the first side face, the second side face and the third side face, and is electrically connected with the side face of the metal pin;
the second sub-conductive layer is arranged on one surface of the first substrate far away from the second substrate.
In the display panel provided by the embodiment of the application, the binding component comprises:
the bonding layer is arranged on one surface of the second sub-conductive layer, which is far away from the first substrate;
the flip chip film is arranged on one surface of the bonding layer, which is far away from the second sub-conductive layer;
the printed circuit board is arranged on one surface of the first substrate far away from the second substrate, and is electrically connected with the second sub-conductive layer, the bonding layer and one side of the flip chip film.
In the display panel provided by the embodiment of the application, the display panel comprises a display part, a non-display part and a binding part, wherein the non-display part is positioned on at least one side of the display part, and the binding part is positioned on one side of the non-display part far away from the display part, wherein the width of the non-display is less than or equal to 1.5 cm.
In the display panel provided by the embodiment of the application, the first sub-conductive layer is formed by printing conductive materials on the first side surface, the second side surface and the third side surface, and the second sub-conductive layer is formed by printing conductive materials and one surface of the first substrate far away from the second substrate.
In the display panel provided by the embodiment of the application, the thickness of the conductive layer is less than or equal to 8 micrometers.
In the display panel provided by the embodiment of the application, the first side, the second side, the third side and the side surfaces of the metal pins are formed by a side surface edging process.
In the display panel provided by the embodiment of the application, the display panel further comprises a common electrode layer, the common electrode layer is arranged on one surface of the second substrate, which is close to the first substrate, and the distance between the common electrode layer and the sealing layer in the horizontal direction is greater than or equal to zero.
The embodiment of the application also provides a manufacturing method of the display panel, which comprises the following steps:
providing a first substrate and a second substrate, wherein the first substrate comprises metal pins;
aligning the first substrate and the second substrate;
forming a sealing layer, wherein the sealing layer is arranged on the same side of the first substrate and the second substrate, and a part of the sealing layer is attached in the first substrate and the second substrate;
side grinding is carried out on the same sides of the first substrate, the second substrate and the sealing layer by utilizing a side edging process so as to expose a first side face of the first substrate, a second side face of the second substrate, a third side face of the sealing layer and a side face of the metal pin;
forming a conductive layer on the first side surface, the second side surface, the third side surface and one surface of the first substrate away from the second substrate;
and forming a binding assembly on one surface of the conductive layer away from the first substrate.
The embodiment of the application provides a display panel and a manufacturing method thereof, wherein a first side face, a second side face and a third side face are arranged in a flush mode in the display panel provided by the embodiment of the application, and conductive layers of the display panel provided by the embodiment of the application are arranged on the first side face, the second side face and the third side face and one side, far away from a second substrate, of a first substrate.
In order to make the above-mentioned objects of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a display panel in the prior art;
fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present application;
fig. 3 is a schematic diagram of another structure of a display panel according to an embodiment of the application;
fig. 4 is a flowchart illustrating steps of a method for manufacturing a display panel according to an embodiment of the present application.
Detailed Description
For a better understanding of the present application, its objects, technical solutions and advantages, reference should be made to the following detailed description of the application with reference to the drawings wherein like reference numerals refer to like elements throughout the several views, and the following description is based on the illustrated embodiments of the application, which should not be construed as limiting other embodiments of the application not described herein. The word "embodiment" is used in this specification to mean an example, instance, or illustration.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel in the prior art. The display panel 100 includes a lower substrate W1 and an upper substrate W2 disposed opposite to each other, a frame paste 1, a barrier wall 2, a metal conductive layer 3, an anisotropic conductive film 4, a flip chip film 5, a printed circuit board 6, and the like.
In order to realize the narrow frame design of the display panel, the prior art utilizes a side binding technology (Side Bonding Technology) to bind a Chip On Film (COF) 5 to the sides of the lower substrate W1 and the upper substrate W2 through the anisotropic conductive Film 4, and electrically connects with the metal pins of the lower substrate W1 through the metal conductive layer 3 to conduct the lower substrate W1 and the flip Film 5. Since the side surface needs to be printed with a metal material to form the metal conductive layer 3, in order to prevent the metal material from flowing onto the lower substrate W1, a signal short of the metal pins in the lower substrate W1 is caused. Therefore, the prior art often needs to fabricate the retaining wall 2 to block the metal material from flowing onto the lower substrate W1. On the one hand, the process of the display panel manufactured by the method is complicated, the cost investment and the time investment are increased, and on the other hand, the width of the non-display area of the display panel manufactured by the method is large, the width d1 of the non-display area is between 1 cm and 2.5 cm, and the design of the ultra-narrow frame in the real sense cannot be realized.
The embodiment of the application provides a display panel, which is used for realizing the design of a narrow frame of the display panel.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the application. The display panel 200 includes a display portion AA, a non-display portion NA, and a binding portion BA, wherein the non-display portion NA is located on at least one side of the display portion AA, and the binding portion BA is located on a side of the non-display portion NA away from the display portion AA.
In one embodiment, the width of the non-display portion NA is less than or equal to 1.5 cm. For example, the width of the non-display section NA is any one of 0.2 cm, 0.4 cm, 0.5 cm, 0.7 cm, 0.9 cm, 1.1 cm, 1.3 cm, or 1.5 cm. The width of the non-display portion NA in the embodiment of the application is obviously smaller than that of the non-display portion in the prior art, and the narrow frame arrangement of the display panel is realized.
The display panel 200 includes a first substrate 10, a second substrate 20, and a sealing layer 30. The display portion AA includes a portion of the first substrate 10 and a portion of the second substrate 20, and the non-display portion NA includes another portion of the first substrate 10, another portion of the second substrate 20, and the sealing layer 30. The second substrate 20 is disposed opposite to the first substrate 10. Specifically, the first substrate 10 has a first side 10a, and the second substrate 20 has a second side 20a, and the first side 10a and the second side 20a are flush. The sealing layer 30 is bonded between the first substrate 10 and the second substrate 20, and the sealing layer 30 has a third side surface 30a that is flush with the first side surface 10a and the second side surface 20 a. In an embodiment of the present application, the width of the sealing layer 30 is less than or equal to 400 microns.
In an embodiment, the width of the sealing layer 30 may be any of 100 microns, 150 microns, 200 microns, 250 microns, 300 microns, 350 microns, or 400 microns.
In the embodiment of the application, one side surface of the sealing layer 30 is flush with the side surfaces of the first substrate 10 and the second substrate 20, and compared with the prior art, the retaining wall structure is reduced. On the one hand, the display panel 200 in the embodiment of the application saves the process of manufacturing the retaining wall, on the other hand, the width of the sealing layer 30 of the display panel 200 in the embodiment of the application is smaller, and the width of the non-display portion NA of the display panel 200 is reduced, thereby realizing the narrow frame design.
In an embodiment, the first substrate 10 may be a TFT (Thin Film Transistor ) substrate. Specifically, the first substrate 10 includes a base layer 101, an active layer 102, a gate insulating layer 103, a gate electrode 104, an interlayer dielectric layer 105, a source electrode 106, a drain electrode 107, a first passivation layer 108, a pixel electrode 109, a second passivation layer 110, and a bonding pad 111.
Specifically, the display portion AA of the display panel 200 includes the active layer 102, the gate electrode 104, the source electrode 106, the drain electrode 107, and the pixel electrode 109.
With continued reference to fig. 2, the base layer 101 has a first side and a second side opposite to each other, and the base layer 101 may include a first flexible substrate layer, a silicon dioxide layer, a second flexible substrate layer, and a buffer layer stacked in order. Wherein the second flexible substrate layer and the first flexible substrate layer are the same in material and may include at least one of PI (polyimide), PET (polyethylene naphthalate), PEN (polyethylene naphthalate), PC (polycarbonate), PES (polyethersulfone), PAR (aromatic fluorotoluene containing polyarylate), or PCO (polycyclic olefin). The buffer layer is composed of a stack structure of one or more of silicon-containing nitride, silicon-containing oxide or silicon-containing oxynitride.
The active layer 102 is disposed on the base layer 101, and the active layer 102 includes a channel region and doped regions located at both sides of the channel region. The active layer 102 may be an oxide active layer or a low temperature polysilicon active layer. For example, in some embodiments, the material of the active layer 102 is indium tin oxide, ln-IZO, ITZO, ITGZO, HIZO, IZO (InZnO), znO: F, in may also be used 2 O 3 :Sn、In 2 O 3 :Mo、Cd 2 SnO 4 、ZnO:Al、TiO 2 Nb, cd-Sn-O or other metal oxides. The doped region can be a P-type doped region or an N-type doped region, and when the doped region is the P-type doped region, the doped element of the doped region is one or a mixture of two of boron and indium. When the doped region is an N-type doped region, the doped element of the doped region is one or a mixture of more of phosphorus, arsenic and antimony.
The gate insulating layer 103 is disposed on the first surface of the base layer 101, and the gate insulating layer 103 covers the active layer 102 and the base layer 101. The material of the gate insulating layer 103 may be one of silicon nitride, silicon oxide, silicon oxynitride, or aluminum oxide, or any combination thereof.
The gate electrode 104 is disposed on the gate insulating layer 103, and the orthographic projection of the gate electrode 104 on the base layer 101 is entirely covered by the orthographic projection of the active layer 102 on the base layer 101. The material of the gate 104 may be metal or alloy such as Cr, W, ti, ta, mo, al, cu, and a gate metal layer composed of multiple layers of metals may also be sufficient.
The interlayer dielectric layer 105 covers the gate insulating layer 103 and the gate 104, wherein the interlayer dielectric layer 105 may be oxide or oxynitride.
The source 106 and the drain 107 are electrically connected to the doped regions on both sides of the channel region, respectively. The source 106 and the drain 107 may be made of metal or alloy such as Cr, W, ti, ta, mo, al, cu, and a gate metal layer made of multiple layers of metal may be sufficient.
The pixel electrode 109 is disposed on the first passivation layer 108, and the pixel electrode 109 is electrically connected to the drain electrode 107 through a via hole. The first passivation layer 108 is disposed on a surface of the interlayer dielectric layer 105 away from the gate insulating layer 103, and the first passivation layer 108 covers the interlayer dielectric layer 105, the source electrode 106, and the drain electrode 107.
The second passivation layer 110 covers the first passivation layer 108, and exposes the pixel electrode 109.
The material of the first passivation layer 108 and the second passivation layer 110 may be SiO x 、SiO x /SiN x Lamination or SiO x /SiN x /Al 2 O 3 Laminated inorganic nonmetallic film layer materials.
The non-display portion NA includes a bonding pad 111, and specifically, the bonding pad 111 is disposed on a side of the gate insulating layer 103 away from the base layer 101. In an embodiment, the bonding pad 111 may include a first metal conductive layer 111a, a second metal conductive layer 111b, and a metal pin 111c, wherein the second metal conductive layer 111b and the metal pin 111c are electrically connected through the pixel electrode 109. Alternatively, in another embodiment, the second metal conductive layer 111b and the metal pin 111c are electrically connected through a via.
With continued reference to fig. 2, the side surface of the first metal conductive layer 111a, the side surface of the second metal conductive layer 111b, and the side surface 111c1 of the metal pin 111c extend to the bonding portion BA of the display panel 200, and the side surface of the first metal conductive layer 111a, the side surface of the second metal conductive layer 111b, and the side surface 111c1 of the metal pin 111c are electrically connected to the bonding portion BA.
The display panel 200 further includes a conductive layer 201, the conductive layer 201 is disposed on the binding portion BA, and the conductive layer 201 is disposed on the first side 10a, the second side 20a, and the third side 30a, and the conductive layer 201 is electrically connected to the side 111c1 of the metal lead 111 c. The display panel 200 further includes a binding assembly 202, the binding assembly 202 including an adhesive layer 202a, a flip chip film 202b, and a printed circuit board 202c. Wherein the adhesive layer 202a is disposed on a side of the conductive layer 201 remote from the first side 10a, the second side 20a, and the third side 30 a. The flip chip film 202b is disposed on a side of the adhesive layer 202a remote from the conductive layer 201. The printed circuit board 202c is disposed on a side of the first substrate 10 away from the second substrate 20 and the printed circuit board 202c is disposed on a side of the flip chip film 202b near the adhesive layer 202a, and the printed circuit board 202c is connected to the conductive layer 201 and a side of the adhesive layer 202a near the first substrate 10.
In some embodiments, the first side 10a, the second side 20a, the third side 30a, and the side 111c1 of the metal pin 111c are formed by a side edging process.
In some embodiments, the thickness of conductive layer 201 is less than or equal to 8 microns. For example, the thickness of the conductive layer 201 may be any one of 1 micron, 1.5 microns, 2 microns, 3 microns, 4 microns, 5 microns, 6 microns, 7 microns, and 8 microns. In the embodiment of the application, the thickness of the conductive layer 201 is set to be less than or equal to 8 micrometers, so that the width of the non-display portion NA of the display panel 20 is not increased under the condition that the conductive layer 201 has better electrical conduction.
In one embodiment, the material of the adhesive layer 202a is anisotropic conductive film (Anisotropic Conductive Film, ACF), and the adhesive layer 202a functions as an adhesive to fix and electrically conduct between the conductive layer 201 and the bonding component 202.
Referring to fig. 3, fig. 3 is another schematic structural diagram of a display panel according to an embodiment of the application. The display panel of this embodiment is different from the display panel of the previous embodiment in that: the conductive layer 201 of the display panel 200 of the present embodiment includes a first sub-conductive layer 201a and a second sub-conductive layer 201b. Wherein the first sub-conductive layer 201a and the second sub-conductive layer 201b are electrically connected. Specifically, the first sub-conductive layer 201a is disposed on the first side 10a, the second side 20a and the third side 30a, and the first sub-conductive layer 201a is electrically connected to the side 111c1 of the metal pin 111 c. The second sub-conductive layer 201b is disposed on a side of the first substrate 10 remote from the second substrate 20.
The binding assembly 202 is disposed on a side of the conductive layer 201 remote from the first substrate 10, and in particular, the binding assembly 202 is disposed on a side of the second sub-conductive layer 201b remote from the first substrate 10.
In this embodiment, the binding assembly 202 includes an adhesive layer 202a, a flip chip film 202b, and a printed circuit board 202c. The adhesive layer 202a is disposed on a side of the second sub-conductive layer 201b away from the first substrate 10, the flip chip film 202b is disposed on a side of the adhesive layer 202a away from the second sub-conductive layer 201b, the printed circuit board 202c is disposed on a side of the first substrate 10 away from the second substrate 20, and the printed circuit board 202c is electrically connected to the second sub-conductive layer 201b, the adhesive layer 202a, and one side of the flip chip film 202 b.
In the embodiment of the application, the first sub-conductive layer 201a is disposed on the first side 10a, the second side 20a and the third side 30a, the second sub-conductive layer 201b is disposed on the side of the first substrate 10 far from the second substrate 20, and the first sub-conductive layer 201a and the second sub-conductive layer 201b are electrically connected, and the binding assembly 202 is disposed on the side of the second sub-conductive layer 201b far from the first substrate 10, so as to implement the back binding of the binding assembly 202. Because of the limitation of the side binding technology in the prior art, the yield of the flip chip film circuit is low in the processing, manufacturing and transportation processes of the anisotropic conductive film adhesive material, and therefore the display panel provided by the embodiment of the application binds the binding component 202 on the back surface of the first substrate, and the yield of the display panel in the processing, manufacturing and transportation processes is improved. In addition, the arrangement mode can further realize the narrow frame design of the display panel.
On the other hand, in the embodiment of the present application, one side of the sealing layer 30 is flush with the side of the first substrate 10 and the second substrate 20, and compared with the prior art, the retaining wall structure is reduced. In the embodiment of the application, the display panel 200 saves the process of manufacturing the retaining wall, and the width of the sealing layer 30 of the display panel 200 in the embodiment of the application is smaller, so that the width of the non-display portion NA of the display panel 200 is reduced, thereby realizing the design of a narrow frame.
The display panel 200 further includes a common electrode layer 40, the common electrode layer 40 being disposed on a side of the second substrate 20 adjacent to the first substrate 10, a distance between the common electrode layer 40 and the sealing layer 30 in a horizontal direction being greater than or equal to zero.
Since the common electrode layer 40 is formed by vapor deposition over the entire surface, the common electrode layer 40 needs to be subjected to laser treatment before the conductive layer 201 is provided on the first side surface 10a, the second side surface 20a, and the third side surface 30a, so that the distance between the common electrode layer 40 and the conductive layer 201 in the horizontal direction is greater than zero, and the common electrode layer 40 and the conductive layer 201 are prevented from coming into contact with each other, thereby preventing a short circuit.
The display panel 200 further includes a liquid crystal layer 50 filled between the first substrate 10 and the second substrate 20.
It should be noted that, the second substrate 20 may be a color film substrate, and the color film substrate may include blue blocks, green blocks, and red blocks, and a black matrix disposed between the blue blocks, the green blocks, and the red blocks.
In some embodiments, the conductive layer 201 is formed by printing a conductive material on the first side 10a, the second side 20a, and the third side 30. Wherein the conductive material includes at least one of metallic silver, gold, nickel and tin, but is not limited thereto.
It should be noted that, the display panel 200 In the present embodiment is a liquid crystal display panel, which may be a color filter (Color Filter On Array, COA) on an array substrate or a Non-COA liquid crystal display, and the display modes include Twisted Nematic (TN), in-Plane Switching (IPS) mode, vertical alignment (Vertical Alignment, VA) mode, and fringe field Switching (Fringe Field Switching, FFS) mode. The present embodiment is exemplified by a vertical alignment (Vertical Alignment, VA) type display mode, but is not limited thereto.
Referring to fig. 4, the embodiment of the application further provides a method for manufacturing a display panel, which includes the following steps:
step B101: a first substrate and a second substrate are provided.
Specifically, the first substrate may be a TFT substrate, and the second substrate may be a color film substrate.
In some embodiments, the first substrate comprises metal pins.
Step B102: and aligning the first substrate and the second substrate.
For example, the first substrate and the second substrate are inserted into the positioning device, at least one combined image of the first substrate and the second substrate is captured, then the image is displayed, and then the alignment command of the first substrate and the second substrate is performed, thereby completing the alignment of the first substrate and the second substrate.
Step B103: a sealing layer is formed, the sealing layer is arranged on the same side of the first substrate and the second substrate, and a part of the sealing layer is attached in the first substrate and the second substrate.
For example, a sealing layer material is coated on the second substrate, and then, a sealing layer is formed by means of vacuumizing, wherein the sealing layer material comprises a material with good sealing performance such as silica gel.
Step B104: and grinding the same sides of the first substrate, the second substrate and the sealing layer by using a side edging process to expose the first side of the first substrate, the second side of the second substrate and the third side of the sealing layer.
In an embodiment, step B104 may further include: and grinding the same sides of the first substrate, the second substrate and the sealing layer by using a side edging process to expose the first side of the first substrate, the second side of the second substrate, the third side of the sealing layer and the side of the metal pin.
In one embodiment, the width of the sealing layer formed using the side edging process is less than or equal to 400 microns.
In some embodiments, after step B104, further comprising:
step B105: the conductive layer is formed on the first side, the second side and the third side.
For example, the conductive layer is formed by printing a conductive material on the first side, the second side, and the third side.
In some embodiments, step B105 further comprises: a conductive layer is formed on a surface of the first substrate away from the second substrate.
For example, the conductive layer is formed by printing a conductive material on a surface of the first substrate away from the second substrate.
In some embodiments, the conductive layer includes a first sub-conductive layer and a second sub-conductive layer, the first sub-conductive layer is disposed on the first side, the second side, and the third side, and the first sub-conductive layer is electrically connected to the side of the metal pin. The second sub-conductive layer is arranged on one surface of the first substrate far away from the second substrate, and is electrically connected with the first sub-conductive layer.
In some embodiments, after step B105, further comprising:
step B106: a binding assembly is formed on a side of the conductive layer away from the first substrate.
The binding assembly comprises an adhesive layer, a flip chip film and a printed circuit board, wherein the adhesive layer is arranged on one surface of the conductive layer far away from the first substrate.
In the manufacturing method of the display panel provided by the embodiment of the application, the first side surface of the first substrate, the second side surface of the second substrate, the third side surface of the sealing layer and the side surfaces of the metal pins are processed by using a side surface edging process, so that the first side surface, the second side surface, the third side surface and the side surfaces of the metal pins are flush. Compared with the prior art, the retaining wall structure is reduced. On one hand, the display panel in the embodiment of the application saves the manufacturing process of manufacturing the retaining wall, and on the other hand, the width of the sealing layer of the display panel in the embodiment of the application is smaller, and the width of the non-display part of the display panel is reduced, so that the design of a narrow frame is realized.
The embodiment of the application provides a display panel and a manufacturing method thereof, wherein a first side face, a second side face and a third side face are arranged in a flush mode in the display panel provided by the embodiment of the application, and conductive layers of the display panel provided by the embodiment of the application are arranged on the first side face, the second side face and the third side face and one side, far away from a second substrate, of a first substrate.
In addition, the setting mode can further realize the narrow frame setting of the display panel. And, reduce the width of the sealing layer through the side grinding technology, compared with prior art, reduced the barricade structure. On one hand, the display panel in the embodiment of the application saves the manufacturing process of manufacturing the retaining wall, and on the other hand, the width of the sealing layer of the display panel in the embodiment of the application is smaller, and the width of the non-display part of the display panel is reduced, so that the design of a narrow frame is realized.
Furthermore, the sealing layer in the embodiment of the application can serve as a retaining wall structure and can be used for preventing the conductive material from dripping onto the first substrate, thereby causing the phenomenon of short circuit of the display panel.
In summary, although the present application has been described in terms of the preferred embodiments, the preferred embodiments are not limited to the above embodiments, and various modifications and changes can be made by one skilled in the art without departing from the spirit and scope of the application, and the scope of the application is defined by the appended claims.
Claims (8)
1. A display panel, the display panel comprising:
the liquid crystal display device comprises a first substrate, a second substrate and a first display device, wherein the first substrate is provided with a first side surface and comprises a basal layer, a grid electrode, a source electrode, a drain electrode, a pixel electrode and a metal pin, the metal pin is provided with a side surface, and the side surface of the metal pin is flush with the first side surface;
the second substrate is arranged opposite to the first substrate, and is provided with a second side surface, and the second side surface is flush with the first side surface;
the sealing layer is attached between the first substrate and the second substrate, the sealing layer is provided with a third side surface, the third side surface is flush with the first side surface and the second side surface, the first side surface, the second side surface, the third side surface and the side surfaces of the metal pins are formed through a side surface edging process, and the width of the sealing layer is smaller than or equal to 400 microns;
the conductive layer is arranged on the first side face, the second side face, the third side face and one side, far away from the second substrate, of the first substrate, and is electrically connected with the side face of the metal pin;
the binding component is arranged on one surface of the conductive layer, which is far away from the first substrate; wherein the method comprises the steps of
The display panel comprises a non-display part and a binding part, wherein the non-display part comprises a binding pad, the binding pad comprises a first metal conducting layer, a second metal conducting layer and metal pins, the first metal conducting layer is arranged on the substrate layer, and the first metal conducting layer and the grid are arranged on the same layer; the second metal conductive layer is arranged on one side of the first metal conductive layer far away from the basal layer, and the second metal conductive layer, the source electrode and the drain electrode are arranged on the same layer; the pixel electrode is arranged on one side, far away from the substrate layer, of the second metal conductive layer, the metal pin is arranged on one side, far away from the substrate layer, of the pixel electrode, the first metal conductive layer is connected with the second metal conductive layer, the second metal conductive layer is connected with the metal pin through the pixel electrode, the side face of the first metal conductive layer, the side face of the second metal conductive layer and the side face of the metal pin extend to the binding part, and the side face of the first metal conductive layer, the side face of the second metal conductive layer, the side face of the metal pin and the conductive layer are bound and connected.
2. The display panel of claim 1, wherein the conductive layer comprises a first sub-conductive layer and a second sub-conductive layer, the first sub-conductive layer and the second sub-conductive layer being electrically connected;
the first sub-conductive layer is arranged on the first side face, the second side face and the third side face, and is electrically connected with the side face of the metal pin;
the second sub-conductive layer is arranged on one surface of the first substrate far away from the second substrate.
3. The display panel of claim 2, wherein the binding component comprises:
the bonding layer is arranged on one surface of the second sub-conductive layer, which is far away from the first substrate;
the flip chip film is arranged on one surface of the bonding layer, which is far away from the second sub-conductive layer;
the printed circuit board is arranged on one surface of the first substrate far away from the second substrate, and is electrically connected with the second sub-conductive layer, the bonding layer and one side of the flip chip film.
4. The display panel of claim 1, wherein the display panel comprises a display portion, a non-display portion, and a binding portion, the non-display portion being located on at least one side of the display portion, the binding portion being located on a side of the non-display portion remote from the display portion, wherein the non-display has a width of less than or equal to 1.5 cm.
5. The display panel according to claim 2, wherein the first sub-conductive layer is formed by printing a conductive material on the first side, the second side, and the third side, and the second sub-conductive layer is formed by printing a conductive material on a side of the first substrate remote from the second substrate.
6. The display panel of claim 1, wherein the conductive layer has a thickness of less than or equal to 8 microns.
7. The display panel according to claim 1, further comprising a common electrode layer provided on a side of the second substrate close to the first substrate, wherein a distance between the common electrode layer and the sealing layer in a horizontal direction is greater than or equal to zero.
8. The manufacturing method of the display panel is characterized by comprising the following steps of:
providing a first substrate and a second substrate, wherein the first substrate is provided with a first side surface, the first substrate comprises a basal layer, a grid electrode, a source electrode, a drain electrode, a pixel electrode and a metal pin, the metal pin is provided with a side surface, and the side surface of the metal pin is flush with the first side surface;
aligning the first substrate with the second substrate, wherein the second substrate is provided with a second side surface, and the second side surface is flush with the first side surface;
forming a sealing layer, wherein the sealing layer is arranged on the same side of the first substrate and the second substrate, and a part of the sealing layer is attached in the first substrate and the second substrate;
side grinding the same sides of the first substrate, the second substrate and the sealing layer by using a side edging process to expose a first side of the first substrate, a second side of the second substrate, a third side of the sealing layer and a side of the metal pin, wherein the third side is level with the first side and the second side, and the width of the sealing layer is less than or equal to 400 micrometers;
forming a conductive layer on the first side surface, the second side surface, the third side surface and one surface of the first substrate far away from the second substrate, wherein the conductive layer is electrically connected with the side surface of the metal pin;
forming a binding assembly on one surface of the conductive layer away from the first substrate; wherein,,
the display panel comprises a non-display part and a binding part, wherein the non-display part comprises a binding pad, the binding pad comprises a first metal conducting layer, a second metal conducting layer and metal pins, the first metal conducting layer is arranged on the substrate layer, and the first metal conducting layer and the grid are arranged on the same layer; the second metal conductive layer is arranged on one side of the first metal conductive layer far away from the basal layer, and the second metal conductive layer, the source electrode and the drain electrode are arranged on the same layer; the pixel electrode is arranged on one side, far away from the substrate layer, of the second metal conductive layer, the metal pin is arranged on one side, far away from the substrate layer, of the pixel electrode, the first metal conductive layer is connected with the second metal conductive layer, the second metal conductive layer is connected with the metal pin through the pixel electrode, the side face of the first metal conductive layer, the side face of the second metal conductive layer and the side face of the metal pin extend to the binding part, and the side face of the first metal conductive layer, the side face of the second metal conductive layer, the side face of the metal pin and the conductive layer are bound and connected.
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| CN113721397A (en) * | 2021-08-20 | 2021-11-30 | Tcl华星光电技术有限公司 | Binding structure, display device, detection method and detection device |
| CN113721398B (en) * | 2021-08-25 | 2023-12-29 | Tcl华星光电技术有限公司 | Display device and electronic apparatus |
| CN113900310B (en) * | 2021-09-30 | 2024-07-02 | 上海天马微电子有限公司 | Liquid crystal device and method for manufacturing the same |
| CN114594624A (en) * | 2022-01-27 | 2022-06-07 | 业成科技（成都）有限公司 | Display module, manufacturing method thereof, touch display module, display and electronic equipment |
| CN114299828B (en) * | 2022-02-14 | 2023-04-07 | 惠州华星光电显示有限公司 | Display unit, spliced screen and display device |
| CN114935858A (en) * | 2022-05-26 | 2022-08-23 | Tcl华星光电技术有限公司 | Liquid crystal display device and method for manufacturing the same |
| CN115061300B (en) * | 2022-06-17 | 2023-11-28 | 武汉华星光电技术有限公司 | Display panel, manufacturing method of display panel and display device |
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