CN111192883A - Side edge binding structure of display panel and manufacturing method thereof - Google Patents
Side edge binding structure of display panel and manufacturing method thereof Download PDFInfo
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- CN111192883A CN111192883A CN202010016677.XA CN202010016677A CN111192883A CN 111192883 A CN111192883 A CN 111192883A CN 202010016677 A CN202010016677 A CN 202010016677A CN 111192883 A CN111192883 A CN 111192883A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
Abstract
The invention provides a display panel and a manufacturing method thereof. The display panel comprises a first substrate, a plurality of binding pads, insulating glue, sealant, a barrier layer, a second substrate and a chip on film. According to the display panel, the flip chip film is bound through the side edges, so that the area of a non-display area of the display panel in the prior art is effectively reduced, and the ultra-narrow frame display panel with the width of the non-display area smaller than 1mm is realized. Meanwhile, through the design of the barrier layer, the situation that the conductive adhesive overflows to short circuit a circuit between the binding pads in the binding process can be avoided.
Description
Technical Field
The present disclosure relates to display panel technologies, and particularly, to a side edge binding structure of a display panel and a manufacturing method thereof.
Background
With the increasing progress of technology, electronic products such as smart phones, tablet computers, wearable devices, etc. are becoming popular, and none of these devices requires a display panel. The display panel also comprises a display area and a non-display area; in order to satisfy the so-called full-screen in the market and to achieve a larger screen size in a limited device volume, it is necessary to maximize the display area of the display panel and reduce the area of the non-display area.
In a conventional display panel, a driving chip of the display panel is directly disposed on a substrate (COG) of the display panel. Since the driving chip is disposed on the periphery of the display panel, this area cannot be used as a display area, so that the display panel adopting the COG process has a large non-display area and a thick frame.
The Chip On Film (COF) improves the former technology, and the driving circuit on the non-display area of the traditional display panel is arranged on the flexible circuit board connected with the display panel, so that the area of the non-display area can be properly reduced.
The non-display area of the display panel can be properly reduced by adopting the COF process, but the non-display area still needs to be provided with an area for binding (bonding) the circuit pins of the flexible circuit board, and the reduction limit of the non-display area is also limited. Therefore, a bonding structure or a bonding technique for improving the COF process is needed to solve the current limit of shrinking the non-display area, obtain a smaller non-display area, and realize a display panel with an ultra-narrow frame.
Disclosure of Invention
In order to solve the above problems, the present invention provides a display panel, which includes a first substrate, a plurality of bonding pads, an insulating adhesive, a sealant, a barrier layer, a second substrate, and a chip on film. The first substrate comprises a thin film transistor, a display area and a non-display area located on the periphery of the display area. The bonding pads are arranged in the non-display area on the first substrate, electrically connected with the thin film transistor and extended to the side edge of the first substrate. The insulating glue is coated on the binding pads. The sealant is coated on the first substrate along the boundary line between the display area and the non-display area. The barrier layer is disposed on the insulating glue. The second substrate is disposed on the sealant. And the chip on film is arranged on the side edge of the coplanar first substrate, the side edges of the plurality of binding pads, the side edge of the insulating glue, the side edge of the barrier layer and the side edge of the second substrate, the chip on film comprises an anisotropic conductive film coated with conductive glue, the side edges of the plurality of binding pads are bound with the chip on film through the conductive glue and the anisotropic conductive film, and each binding pad is electrically connected with a corresponding circuit on the chip on film. When the side edges of the bonding pads are bonded with the chip on film, the barrier layer prevents the conductive adhesive from overflowing, so that circuits between the bonding pads are insulated from each other.
In the display panel of the invention, the barrier layer of an embodiment is a polystyrene layer.
In the display panel of the present invention, the barrier layer and the sealant of another embodiment are made of the same material, and the sealant covers the non-display region.
In the display panel of the invention, the insulating glue is taffeta glue.
In the display panel of the invention, the conductive adhesive is silver paste.
The invention also provides a manufacturing method of the display panel, which comprises the following steps:
step S10: providing a first substrate which comprises a thin film transistor, a display area and a non-display area positioned at the periphery of the display area.
Step S20: and arranging a plurality of binding pads in the non-display area on the first substrate, wherein the binding pads are electrically connected with the thin film transistor and extend to the side edge of the first substrate.
Step S30: and coating insulating glue on the binding pads.
Step S40: and coating a sealant on the first substrate along the boundary between the display area and the non-display area.
Step S50: and forming a barrier layer on the insulating glue.
Step S60: and arranging a second substrate on the sealing adhesive. And
step S70: attaching flip chip films to the side edges of the coplanar first substrate, the plurality of binding pads, the insulating glue, the barrier layer and the second substrate, wherein the flip chip films comprise anisotropic conductive films coated with conductive glue, the side edges of the plurality of binding pads are bound with the flip chip films through the conductive glue and the anisotropic conductive films, and each binding pad is electrically connected with a corresponding circuit on the flip chip films.
When the side edges of the bonding pads are bonded with the chip on film, the barrier layer prevents the conductive adhesive from overflowing, so that circuits between the bonding pads are insulated from each other.
In the method for manufacturing a display panel according to the present invention, the step S50 further includes the following steps:
step S51: and coating polystyrene on the insulating glue to form the barrier layer.
In the display panel manufacturing method according to the present invention, the step S50 of another embodiment further includes the steps of:
step S51: and coating the sealant of the step S40 on the insulating glue to form the barrier layer and cover the non-display area.
In the manufacturing method of the display panel, the insulating glue is taffeta glue.
In the method for manufacturing a display panel, the conductive adhesive is silver paste.
According to the display panel, the flip chip film is bound through the side edges, so that the area of a non-display area of the display panel in the prior art is effectively reduced, and the ultra-narrow frame display panel with the width of the non-display area smaller than 1mm is realized. Meanwhile, through the design of the barrier layer, the situation that the conductive adhesive overflows to short circuit a circuit between the binding pads in the binding process can be avoided.
Drawings
Fig. 1 is a top view of a first substrate according to an embodiment of the invention.
Fig. 2 to 8 are structural views of a manufacturing process according to a first embodiment of the present invention.
Fig. 9 is a sectional view taken along line a-a in fig. 8.
Fig. 10 is a structural view of a second embodiment of the present invention.
Detailed Description
The features and spirit of the present invention will be more clearly described in the following detailed description of the embodiments, which is not intended to limit the scope of the present invention by the embodiments disclosed. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the claims appended hereto.
Referring to fig. 1, in the display panel according to the embodiment of the invention, a first substrate 100 includes a display area 121 of the display panel and a non-display area 122 of the display panel located at a periphery of the display area 121. The dashed line in fig. 1 represents the boundary line 123 between the display area 121 and the non-display area 122.
The first embodiment:
fig. 2 to 8 are schematic diagrams of a manufacturing process according to a first embodiment of the invention.
Referring to fig. 2, step S10: a first substrate 100 as previously described is provided. The first substrate 100 may be an array substrate (array substrate) of the display panel, which is not limited in the present invention. The first substrate 100 includes a thin film transistor 110 in addition to the display region 121, the non-display region 122, and the boundary line 123.
Referring to fig. 3, step S20: a plurality of bonding pads 200 are disposed on the non-display area 122 on the first substrate 100. The bonding pads 200 are electrically connected to the tft 110 and extend to the side edge 101 of the first substrate. The bonding pads 200 are circuit pins of the tft 110.
Referring to fig. 4, step S30: an insulating paste 300 is coated on the plurality of binding pads 200. The insulating glue 300 is used to protect and insulate the plurality of bonding pads 200. The insulating glue 300 is taffey blue glue (taffey blue glue), and may be other insulating paint, UV curing glue, or silica gel, which is not limited in the present invention.
Referring to fig. 5, step S40: a sealant 400 is coated on the first substrate 100 along the boundary line 123 between the display region 121 and the non-display region 122. The sealant 400 is a frame sealant (sealant) of the display panel, and is used to surround the display area 121, so as to facilitate liquid crystal filling in a subsequent process.
Referring to fig. 6, step S50: a barrier layer 500 is formed on the insulating paste 300. Step S51 is also included in step S50: a Polystyrene (PS) layer is coated on the insulating paste 300 to form the barrier layer 500. Since each of the bonding pads 200 has a certain thickness, the topography is low between each of the bonding pads 200. The insulating paste 300 applied in the step S30 is only used for protecting and insulating the plurality of bonding pads 200, and the surface of the applied insulating paste 300 is still uneven. Therefore, the main purpose of this step is to planarize the insulating paste 300.
Referring to fig. 7, step S60: a second substrate 600 is disposed on the sealant 400. The second substrate 600 may be a color film substrate (color film substrate) of the display panel, which is not limited in the present invention.
Referring to fig. 8, step S70: a flip-chip film 700 is attached to the coplanar side edge 101 of the first substrate 100, the side edges 201 of the plurality of bonding pads 200, the side edge 301 of the insulating adhesive 300, the side edge 501 of the barrier layer 500, and the side edge 601 of the second substrate 600. The side edges 101 of the first substrate 100, the side edges 201 of the plurality of bonding pads 200, the side edges 301 of the insulating adhesive 300, the side edges 501 of the barrier layer 500, and the side edges 601 of the second substrate 600 are edges of the display panel, and the edges of the display panel may be formed into a flat surface by using a machining method such as grinding or cutting.
The chip on film 700 includes an anisotropic conductive film 710 coated with a conductive adhesive 720, the side edges 201 of the plurality of bonding pads 200 are bonded (bonded) to the chip on film 700 through the conductive adhesive 720 and the anisotropic conductive film 710, and each bonding pad 200 is electrically connected to a corresponding circuit on the chip on film 600, and further electrically connected to a driving circuit of the display panel, thereby completing the side bonding structure of the display panel. The conductive adhesive 720 of the present invention is silver (silver) paste, which can have conductive and adhesive effects after being cured or dried. The conductive paste 720 may be other conductive paint, copper (copper) paste, or resin with conductive powder, which is not limited in the present invention.
The display panel completed by the above process includes: the first substrate 100 having the thin film transistor 110, the display region 121, and the non-display region 122; the plurality of bonding pads 200 disposed on the non-display area 122 on the first substrate 100; the insulating paste 300 coated on the plurality of bonding pads 200; the sealant 400 coated on the first substrate 100; the barrier layer 500 disposed on the insulating paste 300; the second substrate 600 disposed on the sealant 400; and a flip-chip film 700 disposed on the coplanar side edge 101 of the first substrate 100, the side edges 201 of the plurality of bonding pads 200, the side edge 301 of the insulating adhesive 300, the side edge 501 of the barrier layer 500, and the side edge 601 of the second substrate 600.
Referring to fig. 9, fig. 9 is a cross-sectional view taken along line a-a of fig. 8, wherein the display panel is cut from a top view. The barrier layer 500 prevents the conductive adhesive 720 from overflowing toward the insulating adhesive 300 during the bonding and pressing process of the flip chip package 700, so as to prevent the conductive adhesive 720 from shorting the circuits between the bonding pads 200, thereby effectively improving the process yield.
Second embodiment:
the manufacturing flow of the second embodiment of the present invention is similar to that of the first embodiment, and includes the steps S10 to S50, which are the same as those of the first embodiment.
Referring to fig. 10, the step S50 further includes a step S51: the sealant 400 of the step S40 is coated on the insulating paste 300 to form the barrier layer 500 and cover the non-display area 122. The step S60 and the step S70 are then performed as in the first embodiment.
In the step S51 of the second embodiment of the present invention, the sealant 400 of the step S40 is continuously coated on the first substrate 100 from the boundary line 123 between the display area 121 and the non-display area 122 to cover the non-display area 122 onto the insulating glue 300. Second embodiment the design of step S51 is to prevent the conductive paste 720 from overflowing toward the insulating paste 300, prevent the conductive paste 720 from shorting the circuit between each of the bond pads 200, and simplify the formation process of the barrier layer 500.
The display panel completed by the above process includes: the first substrate 100 having the thin film transistor 110, the display region 121, and the non-display region 122; the plurality of bonding pads 200 disposed on the non-display area 122 on the first substrate 100; the insulating paste 300 coated on the plurality of bonding pads 200; the sealant 400 coated on the first substrate 100; the barrier layer 500 disposed on the insulating paste 300 and integrated with the sealant 400; the second substrate 600 disposed on the sealant 400; and a flip-chip film 700 disposed on the coplanar side edge 101 of the first substrate 100, the side edges 201 of the plurality of bonding pads 200, the side edge 301 of the insulating adhesive 300, the side edge 501 of the barrier layer 500, and the side edge 601 of the second substrate 600.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A display panel, comprising:
the display device comprises a first substrate, a second substrate and a third substrate, wherein the first substrate comprises a thin film transistor, a display area and a non-display area positioned on the periphery of the display area;
a plurality of bonding pads disposed in the non-display region on the first substrate, the bonding pads being electrically connected to the thin film transistor and extending to a side edge of the first substrate;
the insulating glue is coated on the binding pads;
the sealant is coated on the first substrate along the boundary line of the display area and the non-display area;
the barrier layer is arranged on the insulating glue;
a second substrate disposed on the sealant; and
the chip on film comprises anisotropic conductive films coated with conductive adhesives, the side edges of the plurality of binding pads are bound with the chip on film through the conductive adhesives and the anisotropic conductive films, and each binding pad is electrically connected with a corresponding circuit on the chip on film;
when the side edges of the bonding pads are bonded with the chip on film, the barrier layer prevents the conductive adhesive from overflowing, so that circuits between the bonding pads are insulated from each other.
2. The display panel of claim 1, wherein the barrier layer is a polystyrene layer.
3. The display panel of claim 1, wherein the barrier layer and the sealant are the same material, and the sealant covers the non-display region.
4. The display panel according to claim 2 or 3, wherein the insulating glue is Taffel blue glue.
5. The display panel according to claim 2 or 3, wherein the conductive paste is silver paste.
6. A method for manufacturing a display panel includes the steps of:
step S10: providing a first substrate which comprises a thin film transistor, a display area and a non-display area positioned at the periphery of the display area;
step S20: arranging a plurality of binding pads in the non-display area on the first substrate, wherein the binding pads are electrically connected with the thin film transistor and extend to the side edge of the first substrate;
step S30: coating insulating glue on the binding pads;
step S40: coating a sealant on the first substrate along the boundary between the display area and the non-display area;
step S50: forming a barrier layer on the insulating glue;
step S60: arranging a second substrate on the sealing adhesive; and
step S70: attaching a flip chip film to the coplanar side edges of the first substrate, the plurality of binding pads, the insulating glue, the barrier layer and the second substrate, wherein the flip chip film comprises an anisotropic conductive film coated with a conductive glue, the side edges of the plurality of binding pads are bound with the flip chip film through the conductive glue and the anisotropic conductive film, and each binding pad is electrically connected with a corresponding circuit on the flip chip film;
when the side edges of the bonding pads are bonded with the chip on film, the barrier layer prevents the conductive adhesive from overflowing, so that circuits between the bonding pads are insulated from each other.
7. The display panel manufacturing method according to claim 6, wherein the step S50 further includes the steps of:
step S51: and coating polystyrene on the insulating glue to form the barrier layer.
8. The display panel manufacturing method according to claim 6, wherein the step S50 further includes the steps of:
step S51: and coating the sealant of the step S40 on the insulating glue to form the barrier layer and cover the non-display area.
9. The method for manufacturing a display panel according to claim 7 or 8, wherein the insulating glue is taffeta glue.
10. The method according to claim 7 or 8, wherein the conductive paste is silver paste.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010016677.XA CN111192883A (en) | 2020-01-08 | 2020-01-08 | Side edge binding structure of display panel and manufacturing method thereof |
| PCT/CN2020/077199 WO2021138985A1 (en) | 2020-01-08 | 2020-02-28 | Side edge bonding structure for display panel, and manufacturing method for display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010016677.XA CN111192883A (en) | 2020-01-08 | 2020-01-08 | Side edge binding structure of display panel and manufacturing method thereof |
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| Publication Number | Publication Date |
|---|---|
| CN111192883A true CN111192883A (en) | 2020-05-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010016677.XA Pending CN111192883A (en) | 2020-01-08 | 2020-01-08 | Side edge binding structure of display panel and manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN111192883A (en) |
| WO (1) | WO2021138985A1 (en) |
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| CN112526792A (en) * | 2020-11-24 | 2021-03-19 | 北海惠科光电技术有限公司 | Display panel, display device and manufacturing method thereof |
| CN112946962A (en) * | 2021-03-09 | 2021-06-11 | Tcl华星光电技术有限公司 | Display panel and manufacturing method thereof |
| CN113066363A (en) * | 2021-03-09 | 2021-07-02 | Tcl华星光电技术有限公司 | Display panel and manufacturing method thereof |
| CN113299852A (en) * | 2021-05-11 | 2021-08-24 | 深圳市华星光电半导体显示技术有限公司 | Display panel |
| CN113421489A (en) * | 2021-06-08 | 2021-09-21 | Tcl华星光电技术有限公司 | Display panel, manufacturing method thereof and display device |
| CN113568224A (en) * | 2020-08-14 | 2021-10-29 | 友达光电股份有限公司 | Display device |
| TWI749974B (en) * | 2020-08-14 | 2021-12-11 | 友達光電股份有限公司 | Display apparatus |
| CN114019706A (en) * | 2021-10-21 | 2022-02-08 | 武汉华星光电技术有限公司 | Display panel and manufacturing method thereof |
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| CN113421489A (en) * | 2021-06-08 | 2021-09-21 | Tcl华星光电技术有限公司 | Display panel, manufacturing method thereof and display device |
| CN113421489B (en) * | 2021-06-08 | 2022-07-12 | Tcl华星光电技术有限公司 | Display panel, manufacturing method thereof and display device |
| CN114019706A (en) * | 2021-10-21 | 2022-02-08 | 武汉华星光电技术有限公司 | Display panel and manufacturing method thereof |
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| WO2021138985A1 (en) | 2021-07-15 |
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Application publication date: 20200522 |