CN113056813A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN113056813A CN113056813A CN201980070928.8A CN201980070928A CN113056813A CN 113056813 A CN113056813 A CN 113056813A CN 201980070928 A CN201980070928 A CN 201980070928A CN 113056813 A CN113056813 A CN 113056813A
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- Prior art keywords
- electrode
- semiconductor device
- lead
- chip
- connection portion
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 97
- 230000008602 contraction Effects 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 239000000463 material Substances 0.000 claims abstract description 33
- 229910000679 solder Inorganic materials 0.000 description 90
- 230000035882 stress Effects 0.000 description 43
- 238000010438 heat treatment Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000000875 corresponding effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 230000008646 thermal stress Effects 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- FOIXSVOLVBLSDH-UHFFFAOYSA-N Silver ion Chemical compound [Ag+] FOIXSVOLVBLSDH-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
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Abstract
本发明涉及的半导体装置1包括:基板10;芯片20,形成有表面电极22;以及引线30,其具有:配置在表面电极22上并经由导电性接合材料50与芯片20的表面电极22电连接的第一电极连接部32、与布线图案11的电极部15电连接的第二电极连接部34、以及与第一电极连接部32以及第二电极连接部34连接,并且作为第一电极连接部32与第二电极连接部34之间的电流导通路的电流导通部36,其中,从平面上看,引线30进一步具有:设置在第一电极连接部32的外周中未连接电流导通部36的部分上的,将施加于设置在第一电极连接部32与表面电极22之间的导电性接合材料50上的热收缩应力均等化的热收缩应力均等化结构40。本发明的半导体装置1能够将导电性接合材料的厚度保持在固定水平上,具有高可靠性。
Description
技术领域
本发明涉及一种半导体装置。
背景技术
以往,已知一种有芯片和引线通过导电性接合材料(焊锡)接合的半导体装置(例如,参照专利文献1)。
以往的半导体装置900如图7(a)所示,包括:基板910,其表面形成有布线图案;芯片920,载置在基板910上,在基板910侧的相反侧的面上形成有表面电极922;以及引线930,配置在表面电极922上,并且具有:通过作为导电性接合材料的焊锡950(参照图7(b))与芯片920的表面电极922电连接的第一电极连接部932、与布线图案的电极部连接的第二电极连接部934、以及与第一电极连接部932以及第二电极连接部934连接,并作为第一电极连接部932与第二电极连接部934之间的电流导通路的电流导通部936。
根据以往的半导体装置900,由于其所具备的引线930被配置在表面电极922上,并且引线930具有:通过作为导电性接合材料的焊锡950(参照图7(b))与芯片920的表面电极922电连接的第一电极连接部932、与布线图案的电极部连接的第二电极连接部934、以及与第一电极连接部932以及第二电极连接部934连接,并作为第一电极连接部932与第二电极连接部934之间的电流导通路的电流导通部936,因此与使用导电性导线的半导体装置相比,是一种可以导通大电流的半导体装置。
先行技术文献
【专利文献1】特开2015-176916号公报
然而,在以往的半导体装置900中,在加热基板910、芯片920及引线930后用焊锡950接合芯片920和引线930时,施加在焊锡950上的热收缩应力有时会产生差异。例如,如图7(b)所示,在第一电极连接部932的电流导通部936侧,焊锡950沿着引线930的芯片920侧的面延展,与此相对的,在与电流导通部936侧相反一侧,焊锡950不仅在引线930的芯片920侧的面上浸润扩展,而且还会延展至引线930的侧面(第一电极连接部932的侧面)上,因此,对于与引线930接触的焊锡950的表面积(包括引线930的表面及侧面)而言,位于第一电极连接部932的一侧(电流导通部936侧)就和其相反侧存在差异,从而导致施加在芯片920和引线930之间的焊锡950上的热收缩应力产生出差异。在这种情况下,在焊锡950固化时(焊锡凝集时),芯片920有可能产生倾斜,出现局部地有可能产生焊锡950的厚度变薄的情况,导致难以制成具有高可靠性的半导体装置。这种问题不仅在使用焊锡时产生,在使用焊锡以外的导电性接合材料时也会产生。
鉴于上述问题,本发明的目的是提供一种具有该可靠性的半导体装置。
发明内容
【1】本发明涉及的半导体装置,其特征在于,包括:
基板,其表面形成有具有电极部的布线图案;
芯片,配置在所述基板上,并且在与所述基板侧相反一侧的面上形成有表面电极;以及
引线,其具有:配置在所述表面电极上并经由导电性接合材料与所述芯片的所述表面电极电连接的第一电极连接部、与所述布线图案的所述电极部电连接的第二电极连接部、以及与所述第一电极连接部以及所述第二电极连接部连接,并且作为所述第一电极连接部与所述第二电极连接部之间的电流导通路的电流导通部,
其中,从平面上看,所述引线进一步具有:设置在所述第一电极连接部的外周中未连接所述电流导通部的部分上的,将施加于设置在所述第一电极连接部与所述表面电极之间的所述导电性接合材料上的热收缩应力均等化的热收缩应力均等化结构。
【2】在本发明涉及的半导体装置中,从平面上看,所述热收缩应力均等化结构具有从所述第一电极连接部向与所述电流导通部连接的一侧的相反侧延伸的延伸部。
【3】在本发明涉及的半导体装置中,所述延伸部相对于所述第一电极连接部在与所述电流导通部连接的一侧相对称的位置上延伸。
【4】在本发明涉及的半导体装置中,所述热收缩应力均等化结构具有设置在所述引线上的位于隔着所述第一电极连接部的相对位置上的切口或孔。
【5】在本发明涉及的半导体装置中,所述切口或孔设置在与所述芯片的所述表面电极相对称的位置上。
【6】在本发明涉及的半导体装置中,在从与所述芯片的外周相垂直的截面观看时,所述导电性接合材料上的与所述引线相接触的区域与所述表面电极的中央相对称。
【7】在本发明涉及的半导体装置中,在从与所述芯片的外周相垂直的截面观看时,位于所述表面电极的中央的一侧的所述引线的热阻与位于所述一侧的相反侧即另一侧的所述引线的热阻相等。
【8】在本发明涉及的半导体装置中,进一步包括:引脚(Pin)端子,所述引脚端子贯通所述引线,并且其一端部向外部突出,其另一端部与所述布线图案连接。
发明效果
根据本发明的半导体装置,从平面上看,由于引线具有:设置在第一电极连接部的外周中的未连接电流导通部的部分上的,将施加于设置在第一电极连接部与表面电极之间的导电性接合材料上的热收缩应力均等化的热收缩应力均等化结构,因此即使在使用导电性接合材料在接合基板、芯片和引线时进行加热,从平面上看,与引线接触的导电性接合材料的表面积(包括引线的表面和侧面)也可以在第一电极连接部的一侧与其相反侧之间保持均匀化。因此,本发明的半导体装置在导电性接合材料固化时(例如,焊锡凝结后),芯片不易产生倾斜,能够将导电性接合材料的厚度保持固定,是具有高可靠性的半导体装置。
另外,根据本发明的半导体装置,从平面上看,由于引线具有:设置在第一电极连接部的外周中的未连接电流导通部的部分上的,将施加于设置在第一电极连接部与表面电极之间的导电性接合材料上的热收缩应力均等化的热收缩应力均等化结构,因此从平面上看,从引线的规定位置到芯片的热阻能够在第一电极连接部的一侧和其相反侧的另一侧均匀化。这样一来,加热时的热传递速度就能够均匀化,从而使与引线接触的导电性接合材料的表面积更加均匀化。
附图说明
图1是展示实施例一涉及的半导体装置件1的图。其中,图1(a)是半导体装置1的平面图,图1(b)是半导体装置1的截面图。
图2是展示根据实施例二涉及的半导体装置2的图。其中,图2(a)是半导体装置2的平面图,图2(b)是半导体装置2的截面图,在图2中,符号34a表示第二电极连接部。
图3是用于说明实施例三涉及的半导体装置3的斜视图。
图4是用于说明实施例三涉及的半导体装置3的图。其中,图4(a)是展示半导体装置3在树脂密封前的形态的图,图4(b)是展示半导体装置3的等效电路图,在图4(a)中,符号30d、30e、30f表示引线。
图5是用于说明实施例三中的热应力均匀化结构(延伸部41a)的图。其中,图5(a)是展示由图4中的点划线包围的区域A的主要部分放大平面图,图5(b)是图5(a)的C-C截面图,图5(c)是图5(a)的D-D截面图。
图6是用于说明实施例三中的第二热应力均等化结构(切口部42b、42c)的图。其中,图6(a)是展示由图4(a)中的点划线包围的区域b的主要部分放大平面图,图6(b)是图6(a)的E-E截面图。
图7是用于说明现有的半导体装置900的图。其中,图7(a)是半导体装置900的平面图,图7(b)是展示半导体装置900的问题点的图,在图7中,符号924表示栅极,符号951表示焊锡。
具体实施方式
以下,将基于附图中所示的各实施方式,对本发明的半导体装置进行说明。各附图均为示意图,并不一定反映实际的尺寸。
【实施例一】
1.实施例一涉及的半导体装置1的结构
如图1所示,实施例一涉及的半导体装置1具备基板10、芯片20、以及引线30。
基板10是在绝缘性基板12的一个表面上形成布线图案11后的基板。在实施例一中,作为基板10,使用了在背面形成有散热用的金属板13的DCB基板(Direct CopperBonding基板),但是也可以使用印刷基板等合适的基板。
布线图案11具有用于载置芯片20的芯片载置部14、以及经由引线30与芯片20的源电极22(表面电极)连接的电极部15,并且与未图示的外部连接的端子连接。
芯片20经由导电性接合材料(焊锡51)载置于基板10的芯片载置部14上。芯片20时一个具有形成在一个面(基板侧的面)上的漏电极、形成在另一个面(与基板相反侧的面)上的作为表面电极的源电极22、以及栅极电极24的功率MOSFET。漏电极通过导电性接合材料(焊锡51)与芯片载置面16接合,栅电极24通过导线连接到布线图案11的规定位置。
引线30为一个平板状的金属构件,其具有:与配置在源电极22上并通过导电性接合材料(焊锡50)与源电极22电连接的第一电极连接部32、与布线图案11的电极部15电连接的第二电极连接部34、第一电极连接部32以及第二电极连接部34连接并作为第一电极连接部32与第二电极连接部34之间的电流导通路的电流导通路36、以及热收缩应力均等化结构。
第一电极连接部32大致呈矩形,在矩形中相邻的两个边(图1(a)中的上侧和右侧)形成有电流导通部36。第二电极连接部34通过导电性接合材料(未图示)与电极部15接合。关于热收缩应力均等化结构,将在后面叙述。
导电性接合材料是具有导电性和粘接性合金或金属,在本实施例中使用焊锡50、51。焊锡50、51也可以是无铅焊锡。另外,焊锡50、51也可以是银膏或具有银纳米粒子的导电性粘接剂等焊锡以外的导电性接合材料。
在与芯片20的边相垂直的截面上观看时,焊锡50与引线30相接触的区域(焊锡接合的区域)相对于源电极22的中央(图1(b)中的点划线A-A)呈对称状态。
从平面上看,热收缩应力均等化结构设置在第一电极连接部32的外周中的未连接电流导通部36的部分上,其能够将施加在设置于第一电极连接部32与源电极22之间的焊锡50上的热收缩应力(参照图1(b)中的箭头)均等化。热收缩应力均等化结构具有:相对于第一电极连接部32的,在与电流导通部36连接的一侧的相反侧从第一电极连接部32延伸的延伸部41。从平面上看,延伸部41相对于第一电极连接部32在与电流导通部36相对称的位置上延伸。
如图1(b)所示,在第一电极连接部32的位于电流导通部36的一侧,焊锡50沿着引线30位于芯片20的一侧的面延展。另一方面,由于在电流导通部36一侧的相反侧也具有延伸部41,所以焊锡50沿着引线30位于芯片20一侧的面延展。因此,即使在用焊锡50、51接合基板10、芯片20和引线30时进行加热,从平面上看,与引线30接触的焊锡50的表面积也能够与第一电极连接部32的一侧(电流导通部36侧)的相反侧(延伸部41侧)均匀化。
热收缩应力均等化结构的被构成为:从与电流导通部36连接的一侧传递值焊锡50的热传递速度与从延伸部41一侧传递之焊锡50的热传递速度之间的差变小。
换言之,热收缩应力均等化结构被构成为:在与芯片20的外周相垂直的截面上观看时,源极电极22的中央的一侧的引线30的热阻与另一侧的引线的热阻相等。
因此,热收缩应力均等化结构的目的为:使向位于源电极22与引线30之间的焊锡50传递的热量均等化,从而使焊锡50均匀地延展。
2.实施例一涉及的半导体装置1的效果
根据实施例一涉及的半导体装置1,从平面上看,由于引线30具有设置在第一电极连接部32的外周中的未连接电流导通部36的部分上的,将施加于设置在第一电极连接部32与源电极22之间的导焊锡50上的热收缩应力均等化的热收缩应力均等化结构,因此即使在使用焊锡50在接合基板10、芯片20和引线30时进行加热,从平面上看,与引线30接触的焊锡50的表面积(包括引线的表面和侧面)也可以在第一电极连接部32的一侧与其相反侧之间保持均匀化。因此,本发明的半导体装置在焊锡50固化时(例如,焊锡50凝结后),芯片20不易产生倾斜,能够将焊锡50的厚度保持固定,是具有高可靠性的半导体装置。
另外,根据本发明涉及的半导体装置1,从平面上看,由于引线30具有:设置在第一电极连接部32的外周中的未连接电流导通部36的部分上的,将施加于设置在第一电极连接部32与源电极22之间的焊锡50上的热收缩应力均等化的热收缩应力均等化结构,因此从平面上看,从引线30的规定位置到芯片20的热阻能够在第一电极连接部32的一侧和其相反侧的另一侧均匀化。这样一来,加热时的热传递速度就能够均匀化,从而使与引线30接触的焊锡50的表面积更加均匀化。
另外,根据实施例一涉及的半导体装置1,由于从平面上看,热收缩应力均等化结构在与电流导通部36连接的一侧的相反侧具有从第一电极连接部32延伸的延伸部41,因此在第一电极连接部32的位于电流导通部36的一侧及其相反侧的延伸部41处的焊锡50均沿着引线30位于的芯片20一侧的面延展。这样一来,从平面上看,就能够使与引线30相接触的焊锡50的表面积(包括引线的表面和侧面)与第一电极连接部32的一侧及其相反侧相均等化。
另外,根据实施例一涉及的半导体装置1,由于延伸部41相对于第一电极连接部32在与电流导通部36连接的一侧相对称的位置上延伸,因此就能够缩小与电流导通部36连接的一侧向焊锡50传递的热传递速度与从延伸部41一侧向焊锡50传递的热传递速度之间的差异。这样一来,施加在与电流导通部36连接的一侧和其相反侧的焊锡50上的热收缩应力之间的差就会更小,从而在焊锡50固化时芯片20不易产生倾斜。
此外,根据实施例一涉及的半导体装置1,由于焊锡50相对于源电极22的中央呈对称状态,因此芯片20不易产生倾斜,从而能够将焊锡50的厚度保持固定,因此是一种具有更高可靠性的半导体装置。
另外,根据实施例一涉及的半导体装置1,在与芯片20的外周相垂直的截面上观看时,源电极22的中央的一侧的引线30的热阻与另一侧的引线30的热阻相等,因此施加在焊锡50上的热收缩应力也是对称的,这样就能够使芯片20更加不易产生倾斜。
【实施例二】
实施例二涉及的半导体装置2基本上具有与实施例一涉及的半导体装置1相同的结构,但是其在热收缩应力均等化结构的具体结构上与实施例一涉及的半导体装置1的情况不同。即,在实施例二涉及的半导体装置2中,热收缩应力均等化结构具有:设置在隔着引线30a的第一电极连接部32a的相对位置上的切口42(参照图2)。
在实施例二涉及的引线30a中,在矩形的第一电极连接部32a的相对的两个边(图2(a)中上侧和下侧的边)形成有电流导通部36a。切口42在未连接电流导通部36a的部分、即与各电流导通部36a相邻的边(图2(a)右侧和左侧的边)处被切口成顶点朝向芯片20一侧的三角形状。另外,切口部42被设置在与芯片20的源极22相对称的位置处。
如图2(b)所示,在第一电极连接部32a上形成有切口42的相对的两个边处,焊锡50均沿着引线30a的位于芯片20一侧的表面延展,同时焊锡50还沿着引线30a的侧面(切口42的侧面)突起。因此,即使在使用焊锡50接合基板10、芯片20和引线30a时进行加热,从平面上看,也能够使与引线30a相接触的焊锡50的表面积(包括引线30a的表面和侧面)在第一电极连接部32a一侧与另一侧(形成有切口42的相对的两边)之间实现均等化。这样一来,就能够使施加于焊锡50的热收缩应力均等化。
像这样,尽管实施例二涉及的半导体装置2在热收缩应力均等化结构的具体结构上与实施例一涉及的半导体装置不同,但与实施例一涉及的半导体装置1一样,由于引线30具有设置在第一电极连接部32的外周中的未连接电流导通部36的部分上的,将施加于设置在第一电极连接部32与源电极22之间的导焊锡50上的热收缩应力均等化的热收缩应力均等化结构,因此即使在使用焊锡50在接合基板10、芯片20和引线30时进行加热,从平面上看,与引线30接触的焊锡50的表面积(包括引线的表面和侧面)也可以在第一电极连接部32的一侧与其相反侧之间保持均匀化。因此,本发明的半导体装置在焊锡50固化时(例如,焊锡50凝结后),芯片20不易产生倾斜,能够将焊锡50的厚度保持固定,是具有高可靠性的半导体装置。
另外,根据实施例二涉及的半导体装置2,由于热收缩应力均等化结构具有设置在引线30上的隔着第一电极连接部32的相对位置上的切口42,因此,在第一电极连接部32a中形成有切口42的相对的两个边上,在第一电极连接部32a上形成有切口42的相对的两个边处,焊锡50均沿着引线30a的位于芯片20一侧的表面延展,同时焊锡50还沿着引线30a的侧面(切口42的侧面)突起。因此,即使在使用焊锡50接合基板10、芯片20和引线30a时进行加热,从平面上看,也能够使与引线30a相接触的焊锡50的表面积(包括引线30a的表面和侧面)在第一电极连接部32a一侧与另一侧(形成有切口42的相对的两边)之间实现均等化。这样一来,就能够使施加于焊锡50的热收缩应力均等化。
另外,根据实施例二涉及的半导体装置2,由于切口42设置在相对于芯片20的源电极22呈对称的位置上,因此从平面上看,与引线30a相接触的焊锡50的表面积(包括引线30a的表面和侧面)就能够在第一电极连接部32a的一侧与另一侧(未形成有切口42的相对的两个边)之间保持均等化。
另外,实施例二涉及的半导体装置2在热收缩应力均等化结构的具体结构以外的方面具有与实施例一涉及的半导体装置1相同的结构,因此也具有实施例一涉及的半导体装置1所具有的的相应效果。
【实施例三】
实施例三涉及的半导体装置3基本上具有与实施例一涉及的半导体装置1相同的结构,但是起在具备两个芯片,且具备引脚端子这一点上与实施例一涉及的半导体装置1不同。
实施例三涉及的半导体装置3并不是在被树脂密封的半导体装置的侧面具备端子,而是如图3所示,具备向被树脂密封的半导体装置的上表面突出的端子(引脚端子)。
针脚端子贯穿引线,其一个端部从模塑树脂70向外部突出,另一个端部与布线图案连接。引脚端子是一个在中央部具有较大直径部分的凸缘部的细长圆柱状的导电性引脚(参照图3和图4(a))。引脚端子在作为外部连接用的端子使用的同时,还作为连接引线与布线图案的构件使用。
如图3和图4所示,引脚端子包括:与芯片20a的栅电极24a连接的引脚端子60g、与芯片20a的源电极22a连接的引脚端子60s、与芯片20a的源电极22a以及芯片20b的漏电极连接的引脚端子61s、与芯片20a的漏电极连接的两个引脚端子60d、与芯片20b的栅电极24b连接的引脚端子61g、以及与芯片20b的源电极22b连接的引脚端子62s、63s。
如图4(a)和图4(b)所示,实施例三涉及的半导体装置3具备两个芯片20a、20b。这两个芯片分别在基板10的布线图案11(芯片载置面)侧具有漏电极(未图示),并在基板10的相反侧具有源电极22a、22b以及栅电极24a、24b。而且,由这两个芯片20a、20b、基板10的布线图案11、引线30b、30c、以及各引脚端子构成了将两个开关元件串联而成的电路(参照图4(b))。
如图4(a)所示,引线30b包括:第一电极连接部32b,其配置在芯片20a的源电极22a上,且通过焊锡50与芯片20a的源电极22a电连接;第二电极连接部34b,通过引脚端子60s与布线图案11的电极部连接;第二电极连接部34c,通过引脚端子61s与布线图案11的电极部连接;电流导通部36b,其与第一电极连接部32b及第二电极连接部34b连接,并作为第一电极连接部32b与第二电极连接部34b之间的电流导通路;以及电流导通部36c,其与第一电极连接部32b及第二电极连接部34c连接,并作为第一电极连接部32b与第二电极连接部34c之间的电流导通路。
如图4和图5所示,引线30b在第一电极连接部32b的外周中未与电流导通部36b、36c连接的边、即与电流导通部36b相反的一侧(图4(a)及图5(a)中下侧的部分)的边(部分)处设有作为热收缩应力均等化结构的延伸部41a(参照图5(a))。
电流导通部36b在与源极电极22错开的位置上与第一电极连接部32b连接。即,将电流导通部36b与第一电极连接部32b连接使其位于向源电极一侧延伸的区域上与源电极22a错开的位置上。而且,延伸部41设置在隔着第一电极连接部32b的相对称的位置上。
如图5(b)所示,在第一电极连接部32b的电流导通部36b一侧,焊锡50沿着引线30b位于芯片20a一侧的面延展。另一方面,由于在电流导通部36b侧的相反侧也具有延伸部41a,所以焊锡50也沿着引线30b位于芯片20a一侧的面延展。这样一来,即使在用焊锡50接合基板10、芯片20b和引线30b时进行加热,从平面上看,与引线30b接触的焊锡50的表面积也能够在第一电极连接部32b的一侧(电流导通部36b侧)与其相反侧(延伸部41a侧)之间均匀化。
在引线30b处,电流导通部36b设置有孔43a,在隔着源极电极22的相对位置上,形成有与该孔43a对应的切口42a。虽然在电流导通部上设有孔会妨碍电流导通,但如本实施例那样,只要能够通过扩大电流导通部36b的宽度来增大截面积从而实现充分的电流导通,就能够防止因设置切口或孔导致施加在导电性接合材料上的热收缩应力产生的差异。
即,如图5(c)所示,在第一电极连接部32b中形成有切口42a和孔43a的相对的两个边处,焊锡50沿着引线30b位于芯片20a一侧的表面延展,同时,焊锡50还沿着引线30b的侧面(切口42的侧面以及孔43a的侧面)突起。因此,即使在使用焊锡50接合基板10、芯片20a和引线30b时进行加热,从平面上看,也能够使与引线30b相接触的焊锡50的表面积(包括引线30的表面和侧面)在第一电极连接部32b一侧与另一侧(形成有切口42a的相对的两边与形成有和它相对的孔43a的边一侧)之间实现均等化。
如图4和图6所示,引线30c包括:第一电极连接部32c,其配置在芯片20b的源电极22b上,且通过焊锡50与芯片20b的源电极22b电连接;第二电极连接部34d,通过引脚端子62s与布线图案11的电极部连接(参照图4(a));第二电极连接部34e,通过引脚端子63s与布线图案11的电极部连接(参照图4(a));电流导通部36d,其与第一电极连接部32c及第二电极连接部34d连接,并作为第一电极连接部32c与第二电极连接部34d之间的电流导通路;以及电流导通部36e,其与第一电极连接部32c及第二电极连接部34e连接,并作为第一电极连接部32c与第二电极连接部34e之间的电流导通路。
在引线30c的矩形的第一电极连接部32a的相对的两个边(图4以及图6中上侧和下侧的边)形成有电流导通部36d、36e。切口42b、42c在未连接电流导通部的部分、即与各电流导通部36d、36e相邻的边处被切口成顶点朝向芯片20一侧的五角形状。另外,切口部42b、42c被设置在与芯片20b的源极22b相对称的位置处。另外,为了使切口42b、42c与未切口部分的面积(体积)相平衡,考虑了切口的厚度和长度。
如图6(b)所示,在第一电极连接部32c上形成有切口42b、42c的相对的两个边处,焊锡50均沿着引线30c的位于芯片20b一侧的表面延展,同时焊锡50还沿着引线30c的侧面(切口42b、42c的侧面)突起。因此,即使在使用焊锡50接合基板、芯片20b和引线30c时进行加热,从平面上看,也能够使与引线30c相接触的焊锡50的表面积(包括引线30c的表面和侧面)在第一电极连接部32c一侧与另一侧(形成有切口42b、42c的相对的两边)之间实现均等化。这样一来,就能够使施加于焊锡50的热收缩应力均等化。
像这样,虽然实施例三涉及的半导体装置3在具备两个芯片,并且具备引脚端子这两点上与实施例一涉及的半导体装置不同,但其与实施例一和二涉及的半导体装置1、2一样,由于引线30b、30c具有设置在第一电极连接部32b、32c的外周中的未连接电流导通部的部分上的,将施加于设置在第一电极连接部32b、32c与源电极22b、22c之间的导焊锡50上的热收缩应力均等化的热收缩应力均等化结构,因此从平面上看,与引线30b、30c接触的焊锡50的表面积(包括引线30b、30c的表面和侧面)也可以在第一电极连接部32b、32c的一侧与其相反侧之间保持均匀化。因此,本发明的半导体装置在焊锡50固化时(例如,焊锡50凝结后),芯片20b、20c不易产生倾斜,能够将焊锡50的厚度保持固定,是具有高可靠性的半导体装置。
另外,实施例三涉及的半导体装置3还具备贯穿引线30b、30c,且一个端部向外部突出,另一个端部与布线图案11连接的引脚端子。通过采用这样的结构,即使是在因引线30b、30c经由引脚端子60s、61s、62s、63s固定于基板10而自对准难以作用于引线30b、30c的情况下,也能够抑制施加于焊锡50的热收缩应力。因此,在导电性接合材料固化时(焊锡凝结时),芯片20b、20c也不易产生倾斜,从而能够将导电性接合材料的厚度保持固定,因此是具有高可靠性的半导体装置。
另外,实施例三涉及的半导体装置3除了具备两个芯片且具备引脚端子这一点以外,具有与实施例一涉及的半导体装置1相同的结构,因此也同样具有实施例一涉及的半导体装置1所具有的相应的效果。
以上,基于上述实施例对本发明进行了说明,本发明并不限定于上述实施例。在不脱离其主旨的范围内,可以用各种方式来实施,例如也可以进行以下变形。
(1)在上述实施例中记载的材质、形状、位置、大小等仅为示例,可以在不损害本发明的效果的范围内进行变更。
(2)在上述实施例二和三中,形成有作为热收缩应力均等化结构的切口,但本发明不限于此。也可以形成作为热收缩应力均等化结构的孔。
(3)在上述实施例二和三中,形成有三角形或五边形的切口,但本发明不限于此,也可以形成矩形、圆形以外的适当形状的切口。
(4)在上述各实施例中,使用MOSFET来作为芯片,但是本发明并不限于此。也可以使用IGBT、晶闸管、二极管等其他适当的元件来作为芯片。另外,芯片的材料也可以使用硅、SiC、GaN等适当的材料。
(5)在上述各实施例中,使用了在芯片的一个面具有源电极、另一面具有漏电极且纵向流过主电流的所谓纵型的半导体装置,但本发明不限于此。也可以使用在芯片的一个面具有源电极和漏电极,横向流过主电流的所谓横向型的半导体装置。
符号说明
1、2、3、900…半导体装置;10…基板;11…布线图案;12…绝缘性基板;13…金属板;14…芯片载置部;15、15b…电极部;16…芯片载置面;20、20a、20b、20c…芯片;22、22a、22b、22c…源电极;24、24a、24b…栅电极;30、30a、30b、30c、30d、30e、30f…引线;32、32a、32b、32c…第一电极连接部;34、34a、34b、34c、34d、34e…第二电极连接部;36、36a、36b、36c、36d、36e…电流导通部;40…热收缩应力均等化结构;41、41a…延伸部;42、42a、42b、42c…切口;43…孔、50、51…导电性接合材料;60d、60g、61g、60s、61s、62s、63s…引脚端子;70…模塑树脂。
Claims (8)
1.一种半导体装置,其特征在于,包括:
基板,其表面形成有具有电极部的布线图案;
芯片,配置在所述基板上,并且在与所述基板侧相反一侧的面上形成有表面电极;以及
引线,其具有:配置在所述表面电极上并经由导电性接合材料与所述芯片的所述表面电极电连接的第一电极连接部、与所述布线图案的所述电极部电连接的第二电极连接部、以及与所述第一电极连接部以及所述第二电极连接部连接,并且作为所述第一电极连接部与所述第二电极连接部之间的电流导通路的电流导通部,
其中,从平面上看,所述引线进一步具有:设置在所述第一电极连接部的外周中未连接所述电流导通部的部分上的,将施加于设置在所述第一电极连接部与所述表面电极之间的所述导电性接合材料上的热收缩应力均等化的热收缩应力均等化结构。
2.根据权利要求1所述的半导体装置,其特征在于:
其中,从平面上看,所述热收缩应力均等化结构具有从所述第一电极连接部向与所述电流导通部连接的一侧的相反侧延伸的延伸部。
3.根据权利要求2所述的半导体装置,其特征在于:
其中,所述延伸部相对于所述第一电极连接部在与所述电流导通部连接的一侧相对称的位置上延伸。
4.根据权利要求1至3中任意一项所述的半导体装置,其特征在于:
其中,所述热收缩应力均等化结构具有设置在所述引线上的位于隔着所述第一电极连接部的相对位置上的切口或孔。
5.根据权利要求4所述的半导体装置,其特征在于:
其中,所述切口或孔设置在与所述芯片的所述表面电极相对称的位置上。
6.根据权利要求1至5中任意一项所述的半导体装置,其特征在于:
其中,在从与所述芯片的外周相垂直的截面观看时,所述导电性接合材料上的与所述引线相接触的区域与所述表面电极的中央相对称。
7.根据权利要求1至6中任意一项所述的半导体装置,其特征在于:
其中,在从与所述芯片的外周相垂直的截面观看时,位于所述表面电极的中央的一侧的所述引线的热阻与位于所述一侧的相反侧即另一侧的所述引线的热阻相等。
8.根据权利要求1至7中任意一项所述的半导体装置,其特征在于,进一步包括:
引脚端子,所述引脚端子贯通所述引线,并且其一端部向外部突出,其另一端部与所述布线图案连接。
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