CN113054001B - 可编程的电源开关器件及其制备方法 - Google Patents
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Abstract
本申请公开了一种可编程的电源开关器件及其制备方法,涉及集成电路技术领域,所述可编程的电源开关器件包括:高压可编程MOS管和高压开关MOS管;所述高压可编程MOS管为NMOS管,所述高压开关MOS管为NMOS管或者PMOS管;所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过高密度等离子HDP介质隔离。也即电源开关器件可以直接提供电路使用的开关管,而无需额外存储器进行配置,降低电路设计复杂度和减少电路输出延迟,可用于精准的多电压输出电源管理类芯片的输出。
Description
技术领域
本发明涉及可编程的电源开关器件及其制备方法,属于集成电路技术领域。
背景技术
随着便携式设备的快速增长,电源管理类芯片的需求日益增多,尤其对输出电压可调功能的LDO(Low Dropout linear regulator,低压差线性稳压器)的需求日益明显。早期的电源管理实现方法往往是采用继电器的形式进行电压切换,但是存在噪声大,效率低等缺点。采用MOS(Metal-Oxide-Semiconductor,金氧半场效晶体管)开关阵列组合,以实现不同电压的输出的方法,虽然提升了电源管理类芯片的工作效率,但存在掉电后,记忆点数据丢失,上电需要重复编程等缺点。近年来,随着集成电路技术的发展,将EEPROM(Electrically Erasable Programmable read only memory,带电可擦可编程只读存储器)等非易失性存储器集成在电路管理类的芯片中,可将编程点数据预先存入到EEPROM等非易失性存储器中,上电后重新读取到开关阵列中,控制所需要的电压输出。但电路设计往往比较复杂,且存储器和MOS开关阵列存在延时等缺点。而一种易于CMOS工艺集成,可编程的非易失性电源开关器件将有利于解决此类电源管理芯片的需求。
发明内容
本发明的目的在于提供一种可编程的电源开关器件及其制备方法,用于解决现有技术中存在的问题。
为达到上述目的,本发明提供如下技术方案:
根据第一方面,本发明实施例提供了一种可编程的电源开关器件,所述电源开关器件包括高压可编程MOS管和高压开关MOS管;所述高压可编程MOS管为NMOS管,所述高压开关MOS管为NMOS管或者PMOS管;
所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过高密度等离子HDP介质隔离。
可选的,所述高压可编程MOS管使用沟道氧化层和隧穿氧化层,所述沟道氧化层和所述隧穿氧化层的厚度不同,且在编程和擦除过程中,电子从所述隧穿氧化层进出。
可选的,所述高压可编程MOS管和所述高压开关MOS管均为NMOS管时,所述高压可编程MOS管的沟道内设有N-区,所述隧穿氧化层的隧道孔开在所述N-区内,且高压可编程MOS管和所述高压开关MOS管处于同一阱内。
可选的,所述高压开关MOS管使用沟道氧化层。
可选的,所述高压可编程MOS管和所述高压开关MOS管的氧化层上均设置有多晶硅浮栅,所述多晶硅浮栅覆盖所述高压可编程MOS管和所述高压开关MOS管的有源区和有源区隔离介质区域,所述多晶硅浮栅上设有ONO介质层,所述ONO介质层上设有多晶硅控制栅,所述多晶硅浮栅、所述多晶硅控制栅和所述ONO介质层形成PIP电容。
可选的,所述多晶硅浮栅和所述多晶硅控制栅的四周设置有侧墙,所述侧墙覆盖栅氧、所述多晶硅浮栅、所述ONO介质层和所述多晶硅控制栅。
第二方面,提供了一种可编程的电源开关器件的制备方法,所述方法用于制备如第一方面所述的电源开关器件,所述方法包括:
在P型衬底上依次形成外二氧化硅层和阻挡层;
刻蚀形成浅沟道隔离STI(shallow trench isolation)隔离槽,填充高密度等离子HDP介质;
依次进行深阱注入、埋层注入、沟道栅氧生长、隧穿孔刻蚀、隧穿氧化层生长、多晶硅浮栅生长及刻蚀、ONO介质层淀积、多晶硅控制栅生长及刻蚀、侧墙生长刻蚀以及源漏注入,制备得到可编程的电源开关器件;
其中,所述电源开关器件包括高压可编程MOS管和高压开关MOS管,所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过HDP介质隔离。
可选的,所述隧穿氧化层生长的流程包括:
通过HTO的方式,编程管和开关管生长一层SiO2膜;
通过隧穿孔光罩对所述高压可编程MOS管进行隧穿孔刻蚀;
去除光阻后,对硅片进行隧穿氧化层生长前清洗,使用热氧化的方式生长SiO2膜,形成所述隧穿氧化层。
可选的,所述多晶硅浮栅和所述多晶硅控制栅的生长流程为:
使用浮栅光罩,对所述高压可编程MOS管和所述高压开关MOS管同时进行多晶硅刻蚀,停在栅氧化层上,形成共用的所述多晶硅浮栅;
在所述多晶硅浮栅上依次淀积Oxide,SIN,Oxide,然后淀积多晶硅;
使用控制栅光罩,对所述高压可编程MOS管和所述高压开关MOS管同时进行多晶硅刻蚀,ONO介质层刻蚀,最终停在Oxide上,形成共用的所述多晶硅控制栅。
可选的,所述高压可编程MOS管的隧穿孔沟长0.2~0.4μm,所述高压可编程MOS管和所述高压开关MOS管的沟道长度为0.6~0.8μm。
通过提供包括高压可编程MOS管和高压开关MOS管的电源开关器件,所述高压可编程MOS管为NMOS管,所述高压开关MOS管为NMOS管或者PMOS管;所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过高密度等离子HDP介质隔离。也即上述电源开关器件可以直接提供电路使用的开关管,而无需额外存储器进行配置,降低电路设计复杂度和减少电路输出延迟,可用于精准的多电压输出电源管理类芯片的输出。
上述说明仅是本发明技术方案的概述,为了能够更清楚了解本发明的技术手段,并可依照说明书的内容予以实施,以下以本发明的较佳实施例并配合附图详细说明如后。
附图说明
图1是本申请实施例提供的可编程的电源开关器件的平面示意图;
图2、图3是本申请实施例提供的可编程的电源开关器件的两种阵列排布示意图;
图4是本申请实施例提供的可编程的电源开关器件的制备方法的方法流程图;
图5是本申请实施例提供的可编程的电源开关器件的制备过程中STI刻蚀后的示意图;
图6是本申请实施例提供的可编程的电源开关器件的制备过程中Deep Pwell离子注入区域意图;
图7是本申请实施例提供的可编程的电源开关器件的制备过程中埋层离子注入示意图;
图8是本申请实施例提供的可编程的电源开关器件的制备过程中隧道孔刻蚀后示意图;
图9是本申请实施例提供的可编程的电源开关器件的制备过程中隧道氧化层氧化和第一层多晶Poly沉积后的示意图;
图10是本申请实施例提供的可编程的电源开关器件的制备过程中第一层多晶Poly光罩区域示意图;
图11是本申请实施例提供的可编程的电源开关器件的制备过程中第一层多晶Poly刻蚀后的示意图;
图12是本申请实施例提供的可编程的电源开关器件的制备过程中ONO和第二层多晶Poly沉积后的示意图;
图13是本申请实施例提供的可编程的电源开关器件的制备过程中第二层多晶Poly光罩区域示意图;
图14是本申请实施例提供的可编程的电源开关器件的制备过程中第二层多晶Poly和ONO刻蚀后的示意图;
图15是本申请实施例提供的可编程的电源开关器件的制备过程中侧墙、源漏区域注入和Salicde形成后的示意图;
图16是本申请实施例提供的可编程的电源开关器件的制备过程中接触孔形成后的示意图。
具体实施方式
下面将结合附图对本发明的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
在本发明的描述中,需要说明的是,术语“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,术语“第一”、“第二”、“第三”仅用于描述目的,而不能理解为指示或暗示相对重要性。
在本发明的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本发明中的具体含义。
此外,下面所描述的本发明不同实施方式中所涉及的技术特征只要彼此之间未构成冲突就可以相互结合。
请参考图1,其示出了本申请一个实施例提供的可编程的电源开关器件的结构俯视图,如图1所示,所述电源开关器件包括高压可编程MOS管和高压开关MOS管;所述高压可编程MOS管为NMOS(N-Metal-Oxide-Semiconductor,N型金属-氧化物-半导体)管,所述高压开关MOS管为NMOS管或者PMOS(P-Metal-Oxide-Semiconductor,P型金属-氧化物-半导体)管;
所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过HDP(High Density Plasma,高密度等离子)介质隔离。并且,实际实现时,高压可编程MOS管和所述高压开关MOS管共用同一个衬底。并且,实际实现时,衬底可以为P型衬底,P型衬底的电阻率为8~12Ω·cm。
所述高压可编程MOS管使用沟道氧化层和隧穿氧化层,所述沟道氧化层和所述隧穿氧化层的厚度不同,且在编程和擦除过程中,电子从所述隧穿氧化层进出。可选的,沟道氧化层的厚度可以为隧穿氧化层的厚度可以为隧穿氧化层开口大小为沟长0.2~0.4μm,沟宽为0.5~0.8μm。
所述高压可编程MOS管和所述高压开关MOS管均为NMOS管时,所述高压可编程MOS管的沟道内设有N-区,所述隧穿氧化层的隧道孔开在所述N-区内,且高压可编程MOS管和所述高压开关MOS管处于同一阱内。
所述高压开关MOS管使用沟道氧化层。沟道氧化层的长度为0.6~0.8μm。
高压可编程MOS管和所述高压开关MOS管的氧化层上均设有多晶硅浮栅,多晶硅浮栅覆盖高压可编程MOS管和高压开关MOS管的有源区和有源区隔离介质区域,多晶硅浮栅上设有ONO(Oxide-Nitride-Oxide)介质层,ONO介质层上设有多晶硅控制栅,多晶硅浮栅、多晶硅控制栅和ONO介质层形成PIP电容。
高压可编程MOS管的有源区内设有N+漏区和N+源区,当高压开关MOS管是N型时,在高压开关MOS管的有源区设有N+漏区和N+源区,当高压开关MOS管是P型时,在高压开关MOS管的有源区设有P+漏区和P+源区,源区和漏区分布在多晶硅的两侧。
此外,所述多晶硅浮栅和所述多晶硅控制栅的四周设置有侧墙,所述侧墙覆盖栅氧、所述多晶硅浮栅、所述ONO介质层和所述多晶硅控制栅。
所述多晶硅控制栅、高压可编程MOS管和高压开关MOS管有源区上的源、漏区均不设置硅化物,只通过较大的接触孔来降低欧姆接触。
在多晶硅栅上设有ILD(Inter Layer Dielectric,层间介质层)介质层,对多晶硅浮栅、多晶硅控制栅、ONO介质层以及氧化层全包裹。
此外,请参考图2和图3,电源开关器件可以通过面对面或者背靠背的方式组成开关单元阵列,进而实现多个开关器件的使用。
综上所述,通过提供包括高压可编程MOS管和高压开关MOS管的电源开关器件,所述高压可编程MOS管为NMOS管,所述高压开关MOS管为NMOS管或者PMOS管;所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过高密度等离子HDP介质隔离。也即上述电源开关器件可以直接提供电路使用的开关管,而无需额外存储器进行配置,降低电路设计复杂度和减少电路输出延迟,可用于精准的多电压输出电源管理类芯片的输出。
请参考图4,其示出了本申请一个实施例提供的可编程的电源开关器件的制备方法的方法流程图,所述方法用于制备以上实施例所述的电源开关器件,如图4所示,所述方法包括:
步骤401,在P型衬底上依次形成外二氧化硅层和阻挡层;
P型衬底的电阻率为8~12Ω·cm。
步骤402,刻蚀形成STI(shallow trench isolation,浅沟道隔离)隔离槽,填充HDP介质;
实际实现时,可以利用有源区光罩刻蚀形成STI隔离槽,如图5所示,并填充HDP介质,进行高温退火处理后,对HDP介质进行平坦化。
步骤403,依次进行深阱注入、埋层注入、沟道栅氧生长、隧穿孔刻蚀、隧穿氧化层生长、多晶硅浮栅生长及刻蚀、ONO介质层淀积、多晶硅控制栅生长及刻蚀、侧墙生长刻蚀以及源漏注入,制备得到可编程的电源开关器件。
其中,所述电源开关器件包括高压可编程MOS管和高压开关MOS管,所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过HDP介质隔离。
可选的,本步骤可以包括:
使用湿法去除阻挡层后,利用Deep Pwell光罩,隔着二氧化硅层进行Deep Pwell离子注入,注入选用P型杂质,如B,注入深度在0.8~1.2μm,如图6所示。需要说明的是,上述仅以高压开关MOS管为NMOS管来举例说明,实际实现时,若高压开关MOS管为PMOS管时,此步骤包括:利用Deep Nwell光罩,隔着二氧化硅层进行Deep Nwell离子注入,在此不再赘述。
利用埋层光罩,在Deep Pwell区选择性进行N型埋层注入,如图7所示,注入杂质为s,注入深度为0.1μm~0.13μm,剂量为1E14~1.2E14,用于形成高压可编程MOS管和高压开关MOS管的沟道区域。
湿法去除二氧化硅层,然后淀积厚度的HTO,使用隧道孔光罩,湿法去除干净隧道孔内的HTO,如图8所示。然后,采用热氧化的方式生长的隧道氧化层。高压可编程MOS管中的专用的隧道孔的结构,可增大耦合系数,提升可编程管的编程效率。
使用控制栅光罩,如图13,对第二层多晶Poly进行干法刻蚀,形成可可编程MOS管的浮栅和高压开关MOS管的控制栅,如图14所示。
对可编程MOS管的浮栅和高压开关MOS管同时进行HV NLDD注入,倾斜45度角度,斜注入N型杂质,注入结深0.19~0.22μm。如果高压开关MOS管为P型,需要使用HV PLDD光罩,选择性对高压开关MOS管区域进行P型轻掺杂注入。
对可编程MOS管的浮栅和高压开关MOS管同时进行侧墙淀积和无光罩刻蚀,停在有源区硅上。根据需要,可进行二次侧墙淀积和再次刻蚀,以获得较佳的侧墙宽度和高度。
使用N+光罩,如图15所示,对可编程MOS管的浮栅和高压开关MOS管的源漏区域同时注入N+,形成MOS管的N+区。如果,高压开关MOS管是P型,需要单独使用P+光罩进行源漏区域注入。需要说明的是,上述仅以高压开关MOS管为NMOS管来举例说明,实际实现时,在高压开关MOS管为PMOS管时,次步骤中在源漏区域同时注入P+,在此不再赘述。
最后,本技术人员能够根据所属领域知识,遵循通用的CMOS工艺制程,进行接触孔停止层沉积、ILD沉积、接触孔光刻和刻蚀、金属钨填充、金属钨CMP,形成如图16所示的电源开关器件,开关器件的金属层及通孔根据所集成电路的实际需要进行布线连接。本实施例在此不再赘述。
综上所述,通过制备得到包括高压可编程MOS管和高压开关MOS管的电源开关器件,也即制备得到的电源开关器件可以直接提供电路使用的开关管,而无需额外存储器进行配置,降低电路设计复杂度和减少电路输出延迟,可用于精准的多电压输出电源管理类芯片的输出。
高压可编程MOS管除隧道孔外的沟道上方氧化层采用较厚的HTO氧化层和热氧化层组合,不仅可以减少热氧化对器件的影响,还可以提升栅氧质量,增加器件的耐久性和数据保持能力。
此外,电源开关器件的开关管由于采用了非隧道氧化层,可承受电路长时间的电应力,延长整体电路的使用寿命。
以上所述实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述,然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本发明的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。因此,本发明专利的保护范围应以所附权利要求为准。
Claims (8)
1.一种可编程的电源开关器件,其特征在于,所述电源开关器件包括高压可编程MOS管和高压开关MOS管;所述高压可编程MOS管为NMOS管,所述高压开关MOS管为NMOS管或者PMOS管;
所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过HDP介质隔离;
所述高压可编程MOS管使用沟道氧化层和隧穿氧化层,所述沟道氧化层和所述隧穿氧化层的厚度不同,且在编程和擦除过程中,电子从所述隧穿氧化层进出;
所述高压可编程MOS管和所述高压开关MOS管均为NMOS管时,所述高压可编程MOS管和所述高压开关MOS管的沟道内设有N-区,所述隧穿氧化层的隧道孔开在所述N-区内,且所述高压可编程MOS管和所述高压开关MOS管处于同一阱内。
2.根据权利要求1所述的电源开关器件,其特征在于,所述高压开关MOS管使用沟道氧化层。
3.根据权利要求1至2任一所述的电源开关器件,其特征在于,所述高压可编程MOS管和所述高压开关MOS管的氧化层上均设置有多晶硅浮栅,所述多晶硅浮栅覆盖所述高压可编程MOS管和所述高压开关MOS管的有源区和有源区隔离介质区域,所述多晶硅浮栅上设有ONO介质层,所述ONO介质层上设有多晶硅控制栅,所述多晶硅浮栅、所述多晶硅控制栅和所述ONO介质层形成PIP电容。
4.根据权利要求3所述的电源开关器件,其特征在于,所述多晶硅浮栅和所述多晶硅控制栅的四周设置有侧墙,所述侧墙覆盖多晶硅浮栅下的隧穿氧化层、所述多晶硅浮栅、所述ONO介质层和所述多晶硅控制栅。
5.一种可编程的电源开关器件的制备方法,其特征在于,所述方法用于制备如权利要求1至4任一所述的电源开关器件,所述方法包括:
在P型衬底上依次形成外二氧化硅层和阻挡层;
刻蚀形成浅沟道隔离STI(shallow trench isolation)隔离槽,填充HDP介质;
依次进行深阱注入、埋层注入、沟道栅氧生长、隧穿孔刻蚀、隧穿氧化层生长、多晶硅浮栅生长及刻蚀、ONO介质层淀积、多晶硅控制栅生长及刻蚀、侧墙生长刻蚀以及源漏注入,制备得到可编程的电源开关器件;
其中,所述电源开关器件包括高压可编程MOS管和高压开关MOS管,所述高压可编程MOS管和所述高压开关MOS管共用多晶硅浮栅和多晶硅控制栅,且通过HDP介质隔离。
6.根据权利要求5所述的方法,其特征在于,所述隧穿氧化层生长的流程包括:
通过HTO的方式,高压可编程MOS管和高压开关MOS管生长一层SiO2膜;
通过隧穿孔光罩对所述高压可编程MOS管进行隧穿孔刻蚀;
去除光阻后,对硅片进行隧穿氧化层生长前清洗,使用热氧化的方式生长SiO2膜,形成所述隧穿氧化层。
7.根据权利要求5所述的方法,其特征在于,所述多晶硅浮栅和所述多晶硅控制栅的生长流程为:
在所述高压可编程MOS管和所述高压开关MOS管的栅氧化层形成后,淀积一层2000~2400 Å的多晶硅;
使用浮栅光罩,对所述高压可编程MOS管和所述高压开关MOS管同时进行多晶硅刻蚀,停在栅氧化层上,形成共用的所述多晶硅浮栅;
在所述多晶硅浮栅上依次淀积Oxide,SiN ,Oxide,然后淀积多晶硅;
使用控制栅光罩,对所述高压可编程MOS管和所述高压开关MOS管同时进行多晶硅刻蚀,ONO介质层刻蚀,形成共用的所述多晶硅控制栅。
8.根据权利要求5至7任一所述的方法,其特征在于,所述高压可编程MOS管的隧穿孔沟长0.2~0.4μm,所述高压可编程MOS管和所述高压开关MOS管的沟道长度为0.6~0.8μm。
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CN107302003A (zh) * | 2017-06-22 | 2017-10-27 | 中国电子科技集团公司第五十八研究所 | 抗辐射Sence‑Switch型nFLASH开关单元结构及其制备方法 |
CN110047837A (zh) * | 2019-04-26 | 2019-07-23 | 中国电子科技集团公司第五十八研究所 | 一种Sense-Switch型pFLASH阵列结构及其制备方法 |
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