CN113037317B - 高频模块和通信装置 - Google Patents
高频模块和通信装置 Download PDFInfo
- Publication number
- CN113037317B CN113037317B CN202011529777.9A CN202011529777A CN113037317B CN 113037317 B CN113037317 B CN 113037317B CN 202011529777 A CN202011529777 A CN 202011529777A CN 113037317 B CN113037317 B CN 113037317B
- Authority
- CN
- China
- Prior art keywords
- frequency module
- main surface
- bump electrode
- frequency
- disposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/005—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
- H04B1/0053—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band
- H04B1/006—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band using switches for selecting the desired band
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0458—Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/18—Input circuits, e.g. for coupling to an antenna or a transmission line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
- H01L2223/6655—Matching arrangements, e.g. arrangement of inductive and capacitive components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6672—High-frequency adaptations for passive devices for integrated passive components, e.g. semiconductor device with passive components only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1205—Capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1206—Inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/142—HF devices
- H01L2924/1421—RF devices
- H01L2924/14215—Low-noise amplifier [LNA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B2001/0408—Circuits with power amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Transceivers (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
一种高频模块和通信装置。高频模块(1)具备:模块基板(91),具有主面(91b);凸块电极(150a),配置于主面(91b),作为高频模块(1)的外部连接端子发挥功能;半导体IC(20),配置于主面(91b),内置放大高频接收信号的低噪声放大器(21);底部填充构件(93),填充在半导体IC(20)与主面(91b)之间;电感器(411),配置于主面(91b)上的凸块电极(150a)与半导体IC(20)之间,俯视模块基板(91)时,底部填充构件(93)的外缘位于电感器(411)的同凸块电极(150a)相向的边缘部(411a)与半导体IC(20)的同凸块电极(150a)相向的边缘部(201)之间。
Description
技术领域
本发明涉及一种高频模块和通信装置。
背景技术
在便携式电话等移动通信设备中,特别是,随着多频段化的进展,构成高频前端电路的电路元件的配置结构变得复杂。
在专利文献1中,公开了一种能够对底部填充构件在部件与封装基板之间的扩散进行控制的双面安装的高频模块。在专利文献1中,例如,底部填充构件的流出被封装基板上的围坝(dam)所限制。
现有技术文献
专利文献
专利文献1:美国专利申请公开第2018/0226271号说明书
发明内容
发明要解决的问题
然而,在上述以往技术中,需要追加在封装基板形成围坝以控制底部填充构件的扩散的工序,制造工序增加。
因此,本发明提供一种能够在抑制制造工序的增加的同时控制底部填充构件的扩散的高频模块和通信装置。
用于解决问题的方案
本发明的一个方式所涉及的高频模块具备:基板,其具有第一主面;第一凸块电极,其配置于所述第一主面,作为所述高频模块的外部连接端子来发挥功能;半导体集成电路,其配置于所述第一主面,内置放大高频接收信号的低噪声放大器;底部填充构件,其被填充在所述半导体集成电路与所述第一主面之间;以及表面安装器件,其配置于所述第一主面上的、所述第一凸块电极与所述半导体集成电路之间,其中,在俯视所述基板时,所述底部填充构件的外缘位于所述表面安装器件的同所述第一凸块电极相向的第一边缘部与所述半导体集成电路的同所述第一凸块电极相向的边缘部之间。
发明的效果
根据本发明的一个方式所涉及的高频模块,能够在抑制制造工序的增加的同时控制底部填充构件的扩散。
附图说明
图1是实施方式所涉及的通信装置的电路结构图。
图2是实施方式所涉及的匹配电路的电路结构图。
图3是实施方式所涉及的高频模块的俯视图。
图4是实施方式所涉及的高频模块的放大俯视图。
图5是实施方式所涉及的高频模块的截面图。
附图标记说明
1:高频模块;2:天线;3:RFIC;4:BBIC;5:通信装置;11:功率放大器;20:半导体IC(半导体集成电路);21:低噪声放大器;31、41:匹配电路;51、52、53:开关;61、62:双工器;61R、62R:接收滤波器;61T、62T:发送滤波器;91:模块基板;91a、91b:主面;92:树脂构件;93:底部填充构件;100:天线连接端子;110:发送输入端子;120:接收输出端子;150、150a、150b、150c、150d:凸块电极;201、411a、411b:边缘部;411、413:电感器;412:电容器;931:溢出部。
具体实施方式
下面,使用附图来详细说明本发明的实施方式及其变形例。此外,下面说明的实施方式及其变形例均示出总括性或具体性的例子。下面的实施方式及其变形例所示的数值、形状、材料、结构要素、结构要素的配置以及连接方式等是一个例子,其主旨并不在于限定本发明。
此外,各图是为了表示本发明而适当进行了强调、省略、或比率的调整的示意图,未必严格地进行了图示,有时与实际的形状、位置关系以及比率不同。在各图中,对实质上相同的结构标注相同的标记,有时省略或简化重复的说明。
在下面的各图中,X轴和Y轴是在与模块基板的主面平行的平面上相互正交的轴。另外,Z轴是与模块基板的主面垂直的轴,Z轴的正方向表示向上方向,Z轴的负方向表示向下方向。
另外,本发明中的用语的含义如下。
·“连接”不仅包括通过连接端子和/或布线导体来直接连接的情况,也包括经由其它电路元件来电连接的情况。
·“直接连接”是指:不经由其它电路元件而通过连接端子和/或布线导体来直接连接。
·“平行”及“垂直”等表示要素之间的关系性的用语、“矩形”等表示要素的形状的用语以及数值范围表示实质上等同的范围,例如还包括百分之几左右的差异,而不是仅表示严格的含义。
·“俯视基板”是指从Z轴正侧将物体正投影到XY平面来进行观察。
·“在俯视基板时,C位于A与B之间”是指在俯视基板时将A内的任意的点与B内的任意的点连结的线段通过C。
(实施方式)
参照图1~图5来说明实施方式。
[1.1高频模块1和通信装置5的电路结构]
说明本实施方式所涉及的高频模块1和通信装置5的电路结构。图1是实施方式1所涉及的高频模块1和通信装置5的电路结构图。
[1.1.1通信装置5的电路结构]
首先,参照图1来具体说明通信装置5的电路结构。如图1所示,通信装置5具备高频模块1、天线2、RFIC 3以及BBIC 4。
高频模块1在天线2与RFIC 3之间传输高频信号。高频模块1的详细电路结构在后面叙述。
天线2与高频模块1的天线连接端子100连接,辐射从高频模块1输出的高频信号,另外,接收来自外部的高频信号后输出到高频模块1。
RFIC 3是对利用天线2发送接收的高频信号进行处理的信号处理电路的一例。具体地说,RFIC 3对经由高频模块1的接收信号路径输入的高频接收信号通过下变频等进行信号处理,将该信号处理后生成的接收信号输出到BBIC 4。另外,RFIC 3对从BBIC 4输入的发送信号通过上变频等进行信号处理,将该信号处理后生成的高频发送信号输出到高频模块1的发送信号路径。
BBIC 4是使用频率比由高频模块1传输的高频信号的频率低的中间频带来进行信号处理的基带信号处理电路。由BBIC 4处理后的信号例如被用作图像信号以显示图像,或者被用作声音信号以借助扬声器进行通话。
另外,RFIC 3基于所使用的通信频段来控制高频模块1所具有的开关51~53的连接。另外,RFIC 3将用于调整高频模块1的功率放大器11的增益等的控制信号传递到高频模块1。
此外,本实施方式所涉及的通信装置5也可以不具备天线2和BBIC 4。也就是说,天线2和BBIC 4不是本发明所涉及的通信装置所必需的结构要素。
[1.1.2高频模块1的电路结构]
接着,参照图1来具体说明高频模块1的电路结构。如图1所示,高频模块1具备功率放大器11、低噪声放大器21、匹配电路31及41、开关51~53、双工器61及62、天线连接端子100、发送输入端子110、以及接收输出端子120。
功率放大器11对从发送输入端子110输入的高频发送信号进行放大。例如,功率放大器11对通信频段A和/或通信频段B的高频发送信号进行放大。
低噪声放大器21将高频接收信号放大后输出到接收输出端子120。例如,低噪声放大器21将通信频段A和/或通信频段B的高频接收信号以低噪声进行放大。
双工器61使通信频段A的高频信号通过。双工器61将通信频段A的发送信号和接收信号以频分双工(FDD:Frequency Division Duplex)方式进行传输。双工器61包括发送滤波器61T和接收滤波器61R。
发送滤波器61T连接于功率放大器11与天线连接端子100之间。发送滤波器61T使被功率放大器11放大后的高频信号中的通信频段A的发送带的高频信号通过。
接收滤波器61R连接于低噪声放大器21与天线连接端子100之间。接收滤波器61R使从天线连接端子100输入的高频信号中的通信频段A的接收带的高频信号通过。
双工器62使通信频段B的高频信号通过。双工器62将通信频段B的发送信号和接收信号以FDD方式进行传输。双工器62包括发送滤波器62T和接收滤波器62R。
发送滤波器62T连接于功率放大器11与天线连接端子100之间。发送滤波器62T使被功率放大器11放大后的高频信号中的通信频段B的发送带的高频信号通过。
接收滤波器62R连接于低噪声放大器21与天线连接端子100之间。接收滤波器62R使从天线连接端子100输入的高频信号中的通信频段B的接收带的高频信号通过。
匹配电路31是连接于功率放大器11与发送滤波器61T及62T之间、且与功率放大器11的输出端子直接连接的阻抗匹配电路。匹配电路31取得功率放大器11与发送滤波器61T及62T的阻抗匹配。
匹配电路41是连接于低噪声放大器21与接收滤波器61R及62R之间、且与低噪声放大器21的输入端子直接连接的阻抗匹配电路。匹配电路41取得低噪声放大器21与接收滤波器61R及62R的阻抗匹配。
开关51连接于发送滤波器61T及62T与功率放大器11之间。具体地说,开关51具有公共端子和2个选择端子。开关51的公共端子经由匹配电路31来与功率放大器11连接。作为开关51的2个选择端子中的一方的第一选择端子与发送滤波器61T连接,作为2个选择端子中的另一方的第二选择端子与发送滤波器62T连接。在该连接结构中,开关51在将公共端子与第一选择端子连接以及将公共端子与第二选择端子连接之间进行切换。也就是说,开关51是在将功率放大器11与发送滤波器61T连接以及将功率放大器11与发送滤波器62T连接之间进行切换的频段选择开关。开关51例如由SPDT(Single Pole Double Throw:单刀双掷)型的开关电路构成。
开关52连接于接收滤波器61R及62R与低噪声放大器21之间。具体地说,开关52具有公共端子和2个选择端子。开关52的公共端子经由匹配电路41来与低噪声放大器21连接。作为开关52的2个选择端子中的一方的第一选择端子与接收滤波器61R连接,作为2个选择端子中的另一方的第二选择端子与接收滤波器62R连接。在该连接结构中,开关52在将公共端子与第一选择端子连接以及将公共端子与第二选择端子连接之间进行切换。也就是说,开关52是在将低噪声放大器21与接收滤波器61R连接以及将低噪声放大器21与接收滤波器62R连接之间进行切换的LNA(Low Noise Amplifier:低噪声放大器)用内嵌开关。开关52例如由SPDT型的开关电路构成。
开关53连接于天线连接端子100与双工器61及62之间。具体地说,开关53具有公共端子和2个以上的选择端子。开关53的公共端子与天线连接端子100连接。作为开关53的2个以上的选择端子中的1个选择端子的第一选择端子与双工器61连接,作为2个以上的选择端子中的另1个选择端子的第二选择端子与双工器62连接。在该连接结构中,开关53对公共端子与第一选择端子的连接和非连接进行切换,对公共端子与第二选择端子的连接和非连接进行切换。也就是说,开关53是对天线2与双工器61的连接和非连接进行切换、对天线2与双工器62的连接和非连接进行切换的天线开关。开关53例如由多连接型的开关电路构成。
此外,也可以是,图1中示出的电路元件中的一些电路元件不包括在高频模块1中。例如,高频模块1只要具备其它电路元件中的至少1个(例如匹配电路41)以及低噪声放大器21即可,也可以不具备剩余的电路元件。
另外,在高频模块1的电路结构中,能够以FDD方式进行发送信号和接收信号的通信,但是本发明所涉及的高频模块的电路结构不限定于此。例如,本发明所涉及的高频模块也可以具有能够以时分双工(TDD:Time Division Duplex)方式进行发送信号和接收信号的通信的电路结构,还可以具有能够以FDD方式和TDD方式这两方进行通信的电路结构。
[1.1.3匹配电路41的电路结构]
接着,参照图2来具体说明匹配电路41的电路结构。图2是实施方式所涉及的匹配电路的电路结构图。如图2所示,匹配电路41具备电感器411、电容器412以及电感器413。
电感器411和电容器412串联连接于开关52与低噪声放大器21之间。另外,电感器413连接于电感器411与电容器412之间的节点同地之间。
此外,图2所示的匹配电路41是一个例子,不限定于该电路结构。例如,匹配电路41也可以不包括电容器412和电感器413。
[1.2高频模块1的电路部件的配置]
接着,参照图3~图5来具体说明如以上那样构成的高频模块1的电路部件的配置。
图3是实施方式所涉及的高频模块1的俯视图。在图3中,(a)表示从Z轴正侧观察模块基板91的主面91a所得到的图,(b)表示从Z轴正侧透视模块基板91的主面91b所得到的图。图4是实施方式所涉及的高频模块1的放大俯视图。在图4中,电感器411和电容器412的周边区域被放大地表示。图5是实施方式所涉及的高频模块1的截面图。图5中的高频模块1的截面是图3的v-v线处的截面。
如图3~图5所示,高频模块1除了具备图1中示出的内置电路元件的电路部件以外,还具备模块基板91、树脂构件92、底部填充构件93以及多个凸块电极150。此外,在图3中,为了图示电路部件而省略了树脂构件92的记载。
模块基板91具有彼此相向的主面91a和主面91b。作为模块基板91,例如能够使用印刷电路板(Printed Circuit Board:PCB)、低温共烧陶瓷(Low Temperature Co-firedCeramics:LTCC)基板、或者树脂多层基板等,但是不限定于此。
主面91a是第二主面的一例,有时被称为上表面或表面。如图3的(a)所示,在主面91a配置有功率放大器11、匹配电路31、开关51以及双工器61及62。
双工器61及62中的各双工器例如由使用SAW(Surface Acoustic Wave:声表面波)的弹性波滤波器、使用BAW(Bulk Acoustic Wave:体声波)的弹性波滤波器、LC谐振滤波器、电介质滤波器、或者它们的任意组合来实现,但是不限定于此。
主面91b是第一主面的一例,有时被称为下表面或背面。如图3的(b)所示,在主面91b配置有低噪声放大器21、构成匹配电路41的电感器411、电容器412及电感器413、以及开关52及53。
低噪声放大器21以及开关52及53内置于配置在主面91b上的半导体集成电路(IC:Integrated Circuit)20。如图3所示,在俯视模块基板91时,半导体IC20具有矩形形状。
半导体IC 20例如由CMOS(Complementary Metal Oxide Semiconductor:互补金属氧化物半导体)构成,具体地说,是通过SOI(Silicon on Insulator:绝缘体上的硅)工艺来构成的。由此,能够廉价地制造半导体IC 20。此外,半导体IC 20也可以由GaAs、SiGe以及GaN中的至少1个构成。由此,能够输出具有高质量的放大性能和噪声性能的高频信号。此外,也可以在半导体IC 20中还内置有开关51。
电感器411、电容器412以及电感器413分别由表面安装器件(SMD:Surface MountDevice)构成。SMD是指安装于基板的表面的电子部件。电感器411、电容器412以及电感器413例如分别能够由集成型无源器件(IPD:Integrated Passive Device)构成,但是不限定于此。
如图3所示,电感器411、电容器412以及电感器413分别配置于凸块电极150与半导体IC 20之间。具体地说,电感器411配置于主面91b上的、凸块电极150a与半导体IC 20之间。另外,电容器412配置于主面91b上的、凸块电极150b与半导体IC 20之间。另外,电感器413配置于主面91b上的、凸块电极150c与半导体IC 20之间。此外,在主面91b上的、凸块电极150d与半导体IC 20之间没有配置SMD。
如图3所示,在俯视模块基板91时,电感器411、电容器412以及电感器413分别具有矩形形状。例如,如图4所示,电感器411具有与凸块电极150a相向的边缘部411a(第一边缘部)以及与半导体IC 20相向的边缘部411b(第二边缘部)。电容器412和电感器413也与电感器411同样地具有边缘部。
多个凸块电极150配置于模块基板91的主面91b,作为高频模块1的外部连接端子来发挥功能。多个凸块电极150包括凸块电极150a、150b、150c及150d。凸块电极150a、150b、150c分别是第一凸块电极的一个例子,凸块电极150d是第二凸块电极的一个例子。多个凸块电极150中的各凸块电极从主面91b突出,其端部与配置于高频模块1的Z轴负侧的主板上的输入输出端子或地电极等连接。作为多个凸块电极150,例如能够使用球栅阵列(BGA:Ball Grid Array),但是不限定于此。
树脂构件92配置在模块基板91的主面91a上,覆盖了主面91a上的电路部件。树脂构件92具有确保主面91a上的电路部件的机械强度和耐湿性等的可靠性的功能。此外,高频模块1也可以不具备树脂构件92。也就是说,树脂构件92不是本发明所涉及的高频模块所必需的结构要素。
底部填充构件93被填充在半导体IC 20与主面91b之间。底部填充构件93具有确保半导体IC 20的耐下落冲击性和耐腐蚀性等的可靠性的功能。作为底部填充构件93,例如能够使用密封树脂、环氧树脂、聚氨酯树脂、硅酮树脂、聚酯树脂、或者它们的任意组合,但是不限定于此。
在制造工序中,在半导体IC 20和电感器411等被安装到主面91b之后,底部填充构件93被注入到半导体IC 20与主面91b之间的间隙,利用毛细管现象来在间隙之中扩散,其一部分流出到间隙之外。之后,底部填充构件93被固化。此时,在主面91b形成多个凸块电极150的工序既可以在底部填充构件93的注入工序之前也可以在其之后。在此,将从底部填充构件93的间隙溢出的部分称为溢出部931。
在此,参照图4来说明底部填充构件93的溢出部931与电感器411的位置关系。此外,电容器412及电感器413与溢出部931的位置关系同电感器411与溢出部931的位置关系相同,因此省略说明。
在俯视模块基板91时,底部填充构件93的溢出部931到达电感器411的边缘部411a与半导体IC 20的边缘部201之间的位置。也就是说,在俯视模块基板91时,底部填充构件93的外缘位于电感器411的边缘部411a与半导体IC 20的边缘部201之间。
更具体地说,在俯视模块基板91时,溢出部931到达电感器411的边缘部411b。也就是说,在俯视模块基板91时,底部填充构件93的外缘位于电感器411的边缘部411a与边缘部411b之间。
在本实施方式中,SMD配置于多个凸块电极150中的一些第一凸块电极与半导体IC20之间,但是不配置于多个凸块电极150中的剩余的第二凸块电极与半导体IC 20之间。此时,第一凸块电极与半导体IC 20之间的距离比第二凸块电极与半导体IC 20之间的距离小。
例如,电感器411、电容器412以及电感器413分别配置于主面91b上的、凸块电极150a、150b及150c与半导体IC 20之间。另一方面,在凸块电极150d与半导体IC 20之间不配置SMD。此时,凸块电极150a与半导体IC 20之间的距离D1比凸块电极150d与半导体IC 20之间的距离D2小。同样地,凸块电极150b及150c各自与半导体IC 20之间的距离比凸块电极150d与半导体IC 20之间的距离小。
也就是说,SMD配置于多个凸块电极150中的更为接近半导体IC 20的第一凸块电极与半导体IC 20之间,但是不配置于比第一凸块电极远离半导体IC20的第二凸块电极与半导体IC 20之间。
在此,模块基板91的主面91b上的2个物体之间的距离意味着2个物体的外缘之间的最短距离。换言之,2个物体之间的距离是将一方的物体的外缘与另一方的物体的外缘连结的多个线段中的最短的线段的长度。
此外,在本实施方式中,电感器413远离电感器411和电容器412地配置,但是电感器413也可以配置在电感器411和电容器412的附近。在该情况下,只要在图3的电感器413的位置配置其它电路部件即可。
此外,高频模块1也可以具备以覆盖树脂构件92的上表面和侧表面的方式形成的屏蔽电极层(未图示)。屏蔽电极层被设定为地电位,由此能够抑制外来噪声侵入到构成高频模块1的电路部件。
[1.3效果等]
如以上那样,本实施方式所涉及的高频模块1具备:模块基板91,其具有主面91b;第一凸块电极(例如凸块电极150a),其配置于主面91b,作为高频模块1的外部连接端子来发挥功能;半导体IC 20,其配置于主面91b,内置放大高频接收信号的低噪声放大器21;底部填充构件93,其被填充在半导体IC 20与主面91b之间;以及SMD(例如电感器411),其配置于主面91b的第一凸块电极与半导体IC 20之间,其中,在俯视模块基板91时,底部填充构件93的外缘位于SMD的同第一凸块电极相向的第一边缘部(例如边缘部411a)与半导体IC 20的同第一凸块电极相向的边缘部(例如边缘部201)之间。
另外,本实施方式所涉及的通信装置5具备:RFIC 3,其对利用天线2发送接收的高频信号进行处理;以及高频模块1,其在天线2与RFIC 3之间传输高频信号。
据此,能够将SMD配置于主面91b的第一凸块电极与半导体IC 20之间。因而,在制造工序中,从间隙流出的底部填充构件93被SMD拦截,能够抑制底部填充构件93到达第一凸块电极的位置。其结果,能够抑制第一凸块电极与模块基板91或主板的接合力因底部填充构件93而下降。并且,能够将SMD使用于底部填充构件93的拦截。因而,能够将高频电路的电路部件用作SMD,能够排除仅为了控制底部填充构件93的扩散而在模块基板91形成围坝的工序,从而抑制制造工序的增加。
另外,例如,在本实施方式所涉及的高频模块1中,也可以是,在俯视模块基板91时,底部填充构件93的外缘位于SMD的第一边缘部(例如边缘部411a)与SMD的同半导体IC20相向的第二边缘部(例如边缘部411b)之间。
据此,在底部填充构件93扩散至SMD的状况下,能够利用SMD来有效拦截底部填充构件93。
另外,例如,也可以是,本实施方式所涉及的高频模块1还具备第二凸块电极(例如凸块电极150d),该第二凸块电极配置于主面91b,作为高频模块1的外部连接端子来发挥功能,在主面91b上的、第二凸块电极与半导体IC 20之间没有配置SMD,在俯视模块基板91时,第一凸块电极与半导体IC 20之间的距离比第二凸块电极与半导体IC 20之间的距离小。
据此,能够在更为接近半导体IC 20的凸块电极与半导体IC 20之间配置SMD,能够更有效地抑制底部填充构件93到达凸块电极的位置。
另外,例如,在本实施方式所涉及的高频模块1中,也可以是,SMD是构成与低噪声放大器21的输入端子连接的匹配电路41的电容器412和/或电感器413。
据此,能够在低噪声放大器21的附近配置电容器412和/或电感器413,能够使低噪声放大器21与匹配电路41的布线长度短。因而,能够减少因布线损耗和布线偏差引起的失配损耗,从而改善高频模块1的电气特性(例如噪声指数(NF)、增益特性等)。
另外,例如,在本实施方式所涉及的高频模块1中,也可以是,SMD是构成与低噪声放大器21的输入端子连接的匹配电路41的电感器411。
据此,能够在低噪声放大器21的附近配置电感器411,能够使低噪声放大器21与匹配电路41的布线长度短。因而,能够减少因布线损耗和布线偏差引起的失配损耗,从而改善高频模块1的电气特性(例如噪声指数(NF)、增益特性等)。
另外,例如,在本实施方式所涉及的高频模块1中,也可以是,SMD是集成型无源器件。
据此,能够实现配置于主面91b的SMD的高度降低,能够有助于高频模块1整体的高度降低。
另外,例如,在本实施方式所涉及的高频模块1中,也可以是,模块基板91在主面91b的相反侧具有主面91a,高频模块1还具备功率放大器11,该功率放大器11配置于主面91a,放大高频发送信号。
据此,能够在模块基板91的两面配置电路部件,能够有助于高频模块1的小型化。并且,能够将功率放大器11和低噪声放大器21配置在互不相同的主面,能够提高发送电路与接收电路的隔离度特性。
(变形例)
以上,关于本发明的实施方式所涉及的高频模块和通信装置,列举实施方式来进行了说明,但是本发明所涉及的高频模块和通信装置不限定于上述实施方式。将上述实施方式中的任意的结构要素进行组合来实现的其它实施方式、对上述实施方式实施本领域技术人员在不脱离本发明的宗旨的范围内想到的各种变形来得到的变形例、内置有上述高频模块和通信装置的各种设备也包括在本发明中。
例如,在上述各实施方式所涉及的高频模块和通信装置中,也可以在附图中公开的对各电路元件以及信号路径进行连接的路径之间插入其它的电路元件和布线等。例如也可以是,在双工器61与开关53之间和/或双工器62与开关53之间连接有阻抗匹配电路。
此外,上述实施方式中的部件的形状及配置以及凸块电极的形状、数量及配置是例示的,不限定于此。例如,开关51也可以配置于主面91b,还可以内置于半导体IC 20。
此外,在上述实施方式中,作为配置于模块基板91的主面91b的SMD,使用了匹配电路41中包括的电感器411、电容器412以及电感器413,但是不限定于此。例如,也可以是,匹配电路31和/或开关51作为SMD配置于模块基板91的主面91b。另外,也可以使用用于其它通信频段的部件或者没有表现在高频信号的路径中的芯片部件(例如两端连接于地的芯片电感器)。
此外,在上述实施方式中,在多个凸块电极150中的一些凸块电极与半导体IC 20之间配置有SMD,但是不限定于此。例如,也可以是,在多个凸块电极150中的各凸块电极与半导体IC 20之间配置有SMD。另外,还可以是,在多个凸块电极150中的仅最接近半导体IC20的1个凸块电极与半导体IC 20之间配置有SMD。
产业上的可利用性
本发明作为配置于前端部的高频模块,能够广泛利用于便携式电话等通信设备。
Claims (8)
1.一种高频模块,具备:
基板,其具有第一主面;
第一凸块电极,其配置于所述第一主面,作为所述高频模块的外部连接端子来发挥功能;
半导体集成电路,其配置于所述第一主面,内置放大高频接收信号的低噪声放大器;
底部填充构件,其被填充在所述半导体集成电路与所述第一主面之间;以及
表面安装器件,其配置于所述第一主面上的、所述第一凸块电极与所述半导体集成电路之间,
其中,在俯视所述基板时,所述底部填充构件的外缘位于所述表面安装器件的同所述第一凸块电极相向的第一边缘部与所述半导体集成电路的同所述第一凸块电极相向的边缘部之间,
所述表面安装器件是构成与所述低噪声放大器的输入端子连接的匹配电路的电感器或电容器。
2.根据权利要求1所述的高频模块,其特征在于,
在俯视所述基板时,所述底部填充构件的外缘位于所述表面安装器件的所述第一边缘部与所述表面安装器件的同所述半导体集成电路相向的第二边缘部之间。
3.根据权利要求1所述的高频模块,其特征在于,
所述高频模块还具备第二凸块电极,所述第二凸块电极配置于所述第一主面,作为所述高频模块的外部连接端子来发挥功能,
在所述第一主面上的、所述第二凸块电极与所述半导体集成电路之间,没有配置表面安装器件,
在俯视所述基板时,所述第一凸块电极与所述半导体集成电路之间的距离比所述第二凸块电极与所述半导体集成电路之间的距离小。
4.根据权利要求1所述的高频模块,其特征在于,
所述表面安装器件是构成与所述低噪声放大器的输入端子连接的匹配电路的电感器。
5.根据权利要求1所述的高频模块,其特征在于,
所述表面安装器件是构成与所述低噪声放大器的输入端子连接的匹配电路的电容器。
6.根据权利要求4所述的高频模块,其特征在于,
所述表面安装器件是集成型无源器件。
7.根据权利要求1~6中的任一项所述的高频模块,其特征在于,
所述基板在与所述第一主面相反的一侧具有第二主面,
所述高频模块还具备功率放大器,所述功率放大器配置于所述第二主面,对高频发送信号进行放大。
8.一种通信装置,具备:
信号处理电路,其对利用天线发送接收的高频信号进行处理;以及
根据权利要求1~7中的任一项所述的高频模块,其在所述天线与所述信号处理电路之间传输所述高频信号。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019-233728 | 2019-12-25 | ||
JP2019233728A JP2021103713A (ja) | 2019-12-25 | 2019-12-25 | 高周波モジュール及び通信装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN113037317A CN113037317A (zh) | 2021-06-25 |
CN113037317B true CN113037317B (zh) | 2022-07-19 |
Family
ID=76459074
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011529777.9A Active CN113037317B (zh) | 2019-12-25 | 2020-12-22 | 高频模块和通信装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20210203371A1 (zh) |
JP (1) | JP2021103713A (zh) |
KR (1) | KR20210082354A (zh) |
CN (1) | CN113037317B (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6729790B2 (ja) * | 2017-03-14 | 2020-07-22 | 株式会社村田製作所 | 高周波モジュール |
WO2020261819A1 (ja) * | 2019-06-26 | 2020-12-30 | 株式会社村田製作所 | 高周波モジュール及び通信装置 |
JP2021170701A (ja) * | 2020-04-14 | 2021-10-28 | 株式会社村田製作所 | 高周波モジュール及び通信装置 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102460985A (zh) * | 2009-06-11 | 2012-05-16 | 株式会社村田制作所 | 高频开关模块 |
JP2014099839A (ja) * | 2013-07-09 | 2014-05-29 | Taiyo Yuden Co Ltd | 高周波回路モジュール |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001250889A (ja) * | 2000-03-06 | 2001-09-14 | Matsushita Electric Ind Co Ltd | 光素子の実装構造体およびその製造方法 |
TW575949B (en) * | 2001-02-06 | 2004-02-11 | Hitachi Ltd | Mixed integrated circuit device, its manufacturing method and electronic apparatus |
US6774718B2 (en) * | 2002-07-19 | 2004-08-10 | Micro Mobio Inc. | Power amplifier module for wireless communication devices |
TW200520201A (en) * | 2003-10-08 | 2005-06-16 | Kyocera Corp | High-frequency module and communication apparatus |
JP2006166277A (ja) * | 2004-12-10 | 2006-06-22 | Hitachi Media Electoronics Co Ltd | 送受信装置およびモジュール |
US8409970B2 (en) * | 2005-10-29 | 2013-04-02 | Stats Chippac, Ltd. | Semiconductor device and method of making integrated passive devices |
JP5211493B2 (ja) * | 2007-01-30 | 2013-06-12 | 富士通セミコンダクター株式会社 | 配線基板及び半導体装置 |
JP5407667B2 (ja) * | 2008-11-05 | 2014-02-05 | 株式会社村田製作所 | 半導体装置 |
JP5625340B2 (ja) * | 2009-12-07 | 2014-11-19 | 富士通セミコンダクター株式会社 | 半導体装置とその製造方法 |
EP2741426B1 (en) * | 2011-08-01 | 2017-12-20 | Murata Manufacturing Co., Ltd. | High-frequency module |
WO2016042990A1 (ja) * | 2014-09-18 | 2016-03-24 | 株式会社村田製作所 | 高周波部品 |
JP6288294B2 (ja) * | 2014-10-31 | 2018-03-07 | 株式会社村田製作所 | アンテナモジュール及び回路モジュール |
WO2018088410A1 (ja) * | 2016-11-11 | 2018-05-17 | 株式会社村田製作所 | スイッチic、高周波モジュールおよび通信装置 |
KR102266668B1 (ko) * | 2016-12-02 | 2021-06-21 | 가부시키가이샤 무라타 세이사쿠쇼 | 고주파 모듈 |
US20180226271A1 (en) | 2017-01-31 | 2018-08-09 | Skyworks Solutions, Inc. | Control of under-fill using a film during fabrication for a dual-sided ball grid array package |
-
2019
- 2019-12-25 JP JP2019233728A patent/JP2021103713A/ja active Pending
-
2020
- 2020-12-10 KR KR1020200171860A patent/KR20210082354A/ko not_active IP Right Cessation
- 2020-12-17 US US17/124,516 patent/US20210203371A1/en active Pending
- 2020-12-22 CN CN202011529777.9A patent/CN113037317B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102460985A (zh) * | 2009-06-11 | 2012-05-16 | 株式会社村田制作所 | 高频开关模块 |
JP2014099839A (ja) * | 2013-07-09 | 2014-05-29 | Taiyo Yuden Co Ltd | 高周波回路モジュール |
Non-Patent Citations (1)
Title |
---|
Finite element analyses of uniform current density electrodes for radio-frequency cardiac ablation;S. Tungjitkusolmun;《IEEE》;20000131;全文 * |
Also Published As
Publication number | Publication date |
---|---|
CN113037317A (zh) | 2021-06-25 |
KR20210082354A (ko) | 2021-07-05 |
JP2021103713A (ja) | 2021-07-15 |
US20210203371A1 (en) | 2021-07-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN113037317B (zh) | 高频模块和通信装置 | |
US11349507B2 (en) | Radio frequency module and communication device | |
US11336315B2 (en) | Radio-frequency module and communication device | |
US11463118B2 (en) | Radio frequency module and communication device | |
CN215912093U (zh) | 高频模块和通信装置 | |
CN213937898U (zh) | 高频模块和通信装置 | |
CN215072395U (zh) | 高频模块和通信装置 | |
US11431363B2 (en) | Radio frequency module and communication device | |
US11425235B2 (en) | Radio frequency module and communication device | |
CN215498955U (zh) | 高频模块和通信装置 | |
CN215186733U (zh) | 高频模块和通信装置 | |
CN213990661U (zh) | 高频模块和通信装置 | |
CN115956343A (zh) | 高频模块以及通信装置 | |
CN213585768U (zh) | 高频模块和通信装置 | |
CN214959527U (zh) | 高频模块以及通信装置 | |
CN117121386A (zh) | 高频模块和通信装置 | |
CN117256104A (zh) | 高频模块 | |
CN116057689A (zh) | 高频模块及通信装置 | |
CN117063394A (zh) | 高频模块和通信装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |