CN112953485A - Shutoff control circuit and electronic equipment thereof - Google Patents
Shutoff control circuit and electronic equipment thereof Download PDFInfo
- Publication number
- CN112953485A CN112953485A CN202110113823.5A CN202110113823A CN112953485A CN 112953485 A CN112953485 A CN 112953485A CN 202110113823 A CN202110113823 A CN 202110113823A CN 112953485 A CN112953485 A CN 112953485A
- Authority
- CN
- China
- Prior art keywords
- mos transistor
- source
- gate
- mos tube
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
Landscapes
- Electronic Switches (AREA)
Abstract
The invention provides a turn-off control circuit, wherein the grid electrodes of a first MOS tube and a third MOS tube, the output end of a first phase inverter and the input end of a second phase inverter are connected, the drain electrode of the first MOS tube is connected with the drain electrode and the grid electrode of a sixth MOS tube and the grid electrode of a seventh MOS tube, the source electrode of the first MOS tube is connected with the input end of a first current source and the drain electrode of a fifth MOS tube, the grid electrode of the second MOS tube is connected with the output end of the second phase inverter, the source electrode of the second MOS tube is connected with the input end of a second current source, and the drain electrodes of the second MOS tube and the seventh MOS tube are connected with the grid electrodes of a ninth MOS tube and; the drain electrodes of the third MOS tube and the ninth MOS tube are connected, the source electrode of the third MOS tube is connected with the grid electrode and the drain electrode of the fourth MOS tube and the grid electrode of the fifth MOS tube, and the source electrodes of the fourth MOS tube and the fifth MOS tube, the output end of the first current source, the output end of the second current source and one end of the load resistor are connected; the source electrodes of the sixth MOS tube, the seventh MOS tube, the ninth MOS tube and the eighth MOS tube are connected; and the drain electrode of the eighth MOS tube is connected with the other end of the load resistor. A fast turn-off of the circuit can be achieved.
Description
Technical Field
The invention belongs to the technical field of electronics, and particularly relates to a turn-off control circuit and electronic equipment thereof.
Background
Fig. 1 is a conventional turn-off control circuit, primarily for powering a load from a high voltage power supply through a controllable switch. However, the conventional turn-off control circuit has a slow turn-off speed, and the turn-off speed is determined by the current magnitude of the current source I1 and the ratio of MP1/MP2, so that a large current is required to increase the turn-off speed, thereby increasing power consumption.
Disclosure of Invention
The invention aims to provide a turn-off control circuit and electronic equipment thereof, and aims to solve the problems that the turn-off speed of the traditional turn-off control circuit is low, and the power consumption is increased due to the fact that a large current is needed for improving the turn-off speed.
In a first aspect, the present invention provides a shutdown control circuit, including: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a first inverter X1, a second inverter X2, a first current source I1, a second current source I2 and a load resistor RL; the gate of the first MOS transistor M1 is connected to the output end of the first inverter X1, the input end of the second inverter X2 and the gate of the third MOS transistor M3, the input end of the first inverter X1 is connected to the switch control signal EN, the drain of the first MOS transistor M1 is connected to the drain and the gate of the sixth MOS transistor M6 and the gate of the seventh MOS transistor M7, the source of the first MOS transistor M1 is connected to the input end of the first current source I1 and the drain of the fifth MOS transistor M5, the gate of the second MOS transistor M2 is connected to the output end of the second inverter X2, the source of the second MOS transistor M2 is connected to the input end of the second current source I2, and the drain of the second MOS transistor M2 is connected to the drain of the seventh MOS transistor M7, the gate of the ninth MOS transistor M9 and the gate of the eighth MOS transistor M8; the drain of the third MOS transistor M3 is connected to the drain of the ninth MOS transistor M9, the source of the third MOS transistor M3 is connected to the gate and the drain of the fourth MOS transistor M4 and the gate of the fifth MOS transistor M5, respectively, and the source of the fourth MOS transistor M4 is connected to the source of the fifth MOS transistor M5, the output terminal of the first current source I1, the output terminal of the second current source I2, the power ground GND and one end of the load resistor RL; the source electrode of the sixth MOS transistor M6 is respectively connected to the high-voltage power supply VM, the source electrode of the seventh MOS transistor M7, the source electrode of the ninth MOS transistor M9 and the source electrode of the eighth MOS transistor M8; the drain of the eighth MOS transistor M8 is connected to the other end of the load resistor RL.
In a second aspect, the invention provides an electronic device comprising the shutdown control circuit.
In the invention, the circuit is switched off by the ninth MOS transistor M9, the third MOS transistor M3, the fourth MOS transistor M4 and the fifth MOS transistor M5, so that the switching-off speed is remarkably high, and no obvious extra power consumption is caused.
Drawings
Fig. 1 is a schematic diagram of a conventional shutdown control circuit provided in the present invention.
Fig. 2 is a schematic diagram of a shutdown control circuit according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of another shutdown control circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
Referring to fig. 2, an embodiment of the invention provides a shutdown control circuit, including: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a first inverter X1, a second inverter X2, a first current source I1, a second current source I2 and a load resistor RL; the gate of the first MOS transistor M1 is connected to the output end of the first inverter X1, the input end of the second inverter X2 and the gate of the third MOS transistor M3, the input end of the first inverter X1 is connected to the switch control signal EN, the drain of the first MOS transistor M1 is connected to the drain and the gate of the sixth MOS transistor M6 and the gate of the seventh MOS transistor M7, the source of the first MOS transistor M1 is connected to the input end of the first current source I1 and the drain of the fifth MOS transistor M5, the gate of the second MOS transistor M2 is connected to the output end of the second inverter X2, the source of the second MOS transistor M2 is connected to the input end of the second current source I2, and the drain of the second MOS transistor M2 is connected to the drain of the seventh MOS transistor M7, the gate of the ninth MOS transistor M9 and the gate of the eighth MOS transistor M8; the drain of the third MOS transistor M3 is connected to the drain of the ninth MOS transistor M9, the source of the third MOS transistor M3 is connected to the gate and the drain of the fourth MOS transistor M4 and the gate of the fifth MOS transistor M5, respectively, and the source of the fourth MOS transistor M4 is connected to the source of the fifth MOS transistor M5, the output terminal of the first current source I1, the output terminal of the second current source I2, the power ground GND and one end of the load resistor RL; the source electrode of the sixth MOS transistor M6 is respectively connected to the high-voltage power supply VM, the source electrode of the seventh MOS transistor M7, the source electrode of the ninth MOS transistor M9 and the source electrode of the eighth MOS transistor M8; the drain of the eighth MOS transistor M8 is connected to the other end of the load resistor RL.
Referring to fig. 3, another turn-off control circuit according to an embodiment of the present invention is different from the turn-off control circuit shown in fig. 2 in that the turn-off control circuit further includes a zener diode D1, an anode of the zener diode D1 is connected to the gate of the eighth MOS transistor M8, and a cathode of the zener diode D1 is connected to the source of the eighth MOS transistor 8.
In an embodiment of the present invention, the turn-off control circuit may further include a resistor R1, and two ends of the resistor R1 are respectively connected to the source and the gate of the ninth MOS transistor M9.
In an embodiment of the invention, the first MOS transistor M1, the second MOS transistor M2, and the third MOS transistor M3 are high-voltage N-type MOS transistors.
In an embodiment of the invention, the fourth MOS transistor M4 and the fifth MOS transistor M5 are low-voltage N-type MOS transistors.
In an embodiment of the invention, the sixth MOS transistor M6, the seventh MOS transistor M7, the eighth MOS transistor M8, and the ninth MOS transistor M9 are high-voltage P-type MOS transistors.
In an embodiment of the present invention, the eighth MOS transistor M8 is a switching power transistor.
Referring to fig. 3, the shutdown control circuit according to an embodiment of the present invention has the following operating principle:
when the switch control signal EN is a high signal, the first MOS transistor M1 and the third MOS transistor M3 are turned off, and the second MOS transistor M2 is turned on, so that the sixth MOS transistor M6 and the seventh MOS transistor M7 are slowly turned off, the gate voltages of the eighth MOS transistor M8 and the ninth MOS transistor M9 start to fall, and then the eighth MOS transistor M8 is turned on to supply power to a load, and the zener diode D1 is used for clamping the gate source power supply of the eighth MOS transistor M8. When the switch control signal EN is a low signal, the first MOS transistor M1 and the third MOS transistor M3 are turned on, and the second MOS transistor M2 is turned off. At the moment when the switching control signal EN goes low, the gate voltage of the ninth MOS transistor M9 is low, when the third MOS transistor M3 is turned on, the gate voltage of the fourth MOS transistor M4 starts to rise, the fourth MOS transistor M4 is turned on to form a current I3, the fifth MOS transistor M5 and the fourth MOS transistor M4 copy the current I3 in proportion to form a current I4, the current I1 and the current I4 pull down the gate voltage of the sixth MOS transistor M6, so that the gate currents injected into the eighth MOS transistor M7 and the eighth MOS transistor M8 and the ninth MOS transistor M9 are significantly increased by the seventh MOS transistor M7, the gate voltage of the eighth MOS transistor M8 is pulled up rapidly, the currents I3 and I3 also become small gradually as the gates of the eighth MOS transistor M8 and the ninth MOS transistor M9 rise, until the ninth MOS transistor M3 is turned off, the I3 and the eighth MOS transistor M3 are finally turned off, and the eighth MOS transistor M3 is pulled up completely.
Another embodiment of the present invention provides an electronic device, which includes the shutdown control circuit.
In the embodiment of the invention, the circuit has a significantly faster turn-off speed through the ninth MOS transistor M9, the third MOS transistor M3, the fourth MOS transistor M4 and the fifth MOS transistor M5 in the turn-off path, and does not bring obvious extra power consumption.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (8)
1. A shutdown control circuit, comprising: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a first inverter X1, a second inverter X2, a first current source I1, a second current source I2 and a load resistor RL; the gate of the first MOS transistor M1 is connected to the output end of the first inverter X1, the input end of the second inverter X2 and the gate of the third MOS transistor M3, the input end of the first inverter X1 is connected to the switch control signal EN, the drain of the first MOS transistor M1 is connected to the drain and the gate of the sixth MOS transistor M6 and the gate of the seventh MOS transistor M7, the source of the first MOS transistor M1 is connected to the input end of the first current source I1 and the drain of the fifth MOS transistor M5, the gate of the second MOS transistor M2 is connected to the output end of the second inverter X2, the source of the second MOS transistor M2 is connected to the input end of the second current source I2, and the drain of the second MOS transistor M2 is connected to the drain of the seventh MOS transistor M7, the gate of the ninth MOS transistor M9 and the gate of the eighth MOS transistor M8; the drain of the third MOS transistor M3 is connected to the drain of the ninth MOS transistor M9, the source of the third MOS transistor M3 is connected to the gate and the drain of the fourth MOS transistor M4 and the gate of the fifth MOS transistor M5, respectively, and the source of the fourth MOS transistor M4 is connected to the source of the fifth MOS transistor M5, the output terminal of the first current source I1, the output terminal of the second current source I2, the power ground GND and one end of the load resistor RL; the source electrode of the sixth MOS transistor M6 is respectively connected to the high-voltage power supply VM, the source electrode of the seventh MOS transistor M7, the source electrode of the ninth MOS transistor M9 and the source electrode of the eighth MOS transistor M8; the drain of the eighth MOS transistor M8 is connected to the other end of the load resistor RL.
2. The turn-off control circuit of claim 1, further comprising a zener diode D1, wherein the anode of the zener diode D1 is connected to the gate of the eighth MOS transistor M8, and the cathode of the zener diode D1 is connected to the source of the eighth MOS transistor 8.
3. The turn-off control circuit of claim 1, further comprising a resistor R1, wherein two ends of the resistor R1 are respectively connected to the source and the gate of the ninth MOS transistor M9.
4. The turn-off control circuit of claim 1, wherein the first MOS transistor M1, the second MOS transistor M2 and the third MOS transistor M3 are high voltage N-type MOS transistors.
5. The turn-off control circuit of claim 1, wherein the fourth MOS transistor M4 and the fifth MOS transistor M5 are low voltage N-type MOS transistors.
6. The turn-off control circuit of claim 1, wherein the sixth MOS transistor M6, the seventh MOS transistor M7, the eighth MOS transistor M8 and the ninth MOS transistor M9 are high voltage P-type MOS transistors.
7. The turn-off control circuit of claim 1, wherein the eighth MOS transistor M8 is a switching power transistor.
8. An electronic device characterized in that it comprises a shutdown control circuit according to any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110113823.5A CN112953485A (en) | 2021-01-27 | 2021-01-27 | Shutoff control circuit and electronic equipment thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110113823.5A CN112953485A (en) | 2021-01-27 | 2021-01-27 | Shutoff control circuit and electronic equipment thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112953485A true CN112953485A (en) | 2021-06-11 |
Family
ID=76238171
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110113823.5A Pending CN112953485A (en) | 2021-01-27 | 2021-01-27 | Shutoff control circuit and electronic equipment thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112953485A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117335784A (en) * | 2023-09-22 | 2024-01-02 | 上海帝迪集成电路设计有限公司 | Load switch circuit with controllable output voltage rising and falling rate and control method thereof |
-
2021
- 2021-01-27 CN CN202110113823.5A patent/CN112953485A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117335784A (en) * | 2023-09-22 | 2024-01-02 | 上海帝迪集成电路设计有限公司 | Load switch circuit with controllable output voltage rising and falling rate and control method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108592343B (en) | IGBT tube gate resistance adjusting circuit and air conditioner | |
| CN111130532A (en) | IGBT gate push-pull driving circuit and method and IGBT driving circuit | |
| CN112953485A (en) | Shutoff control circuit and electronic equipment thereof | |
| CN116155252A (en) | IGBT grid driving circuit | |
| CN214177285U (en) | Shutoff control circuit and electronic equipment thereof | |
| CN208285214U (en) | A kind of stagnant ring driving device of low-power consumption | |
| CN115314038A (en) | Gate-level buffer circuit based on SiC power device | |
| CN215581091U (en) | IGBT gate pole drive circuit | |
| CN214756293U (en) | Level conversion circuit applied to SOC | |
| CN113054828B (en) | Drive circuit and electrical power generating system of power switch tube | |
| CN116418326A (en) | Driving circuit for power tube | |
| CN113098460A (en) | Ultra-low power consumption reset circuit | |
| CN108336988B (en) | Negative voltage driving circuit of MOS switch | |
| CN115411697A (en) | Undervoltage protection device | |
| CN115395943B (en) | Level shift circuit and switching tube drive circuit | |
| CN215835386U (en) | Circuit and intelligent terminal with reduced conduction voltage drop | |
| CN213521825U (en) | Switch control circuit | |
| KR101906158B1 (en) | Receiver circuit with high input voltage protection | |
| CN217282896U (en) | Semiconductor switch circuit and semiconductor switch device | |
| CN211509032U (en) | Push-pull driving circuit for driving high-end PMOS tube switch | |
| CN116736924B (en) | Voltage stabilizing source circuit with wide input range and low power consumption and electronic equipment | |
| CN113131913B (en) | Input stage circuit, drive circuit and power supply system | |
| CN217406396U (en) | Drive circuit and electronic device | |
| CN220556580U (en) | Relay control circuit | |
| CN116505888B (en) | Negative pressure protection circuit of GaN power amplifier |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |