CN214177285U

CN214177285U - Shutoff control circuit and electronic equipment thereof

Info

Publication number: CN214177285U
Application number: CN202120227498.0U
Authority: CN
Inventors: 肖余; 肖明; 王维铁
Original assignee: Shenzhen Silicon Tower Technology Co ltd
Current assignee: Shenzhen Silicon Tower Technology Co ltd
Priority date: 2021-01-27
Filing date: 2021-01-27
Publication date: 2021-09-10
Anticipated expiration: 2031-01-27

Abstract

The utility model provides a turn-off control circuit, the grid of first and third MOS pipe, the output of first phase inverter links to each other with the input of second phase inverter, the drain electrode of first MOS pipe connects the drain electrode and the grid of sixth MOS pipe and the grid of seventh MOS pipe, the source electrode of first MOS pipe connects the input of first current source and the drain electrode of fifth MOS pipe, the grid of second MOS pipe connects the output of second phase inverter, the source electrode of second MOS pipe connects the input of second current source, the drain electrode of second and seventh MOS pipe, the grid of ninth and eighth MOS pipe link to each other; the drain electrodes of the third MOS tube and the ninth MOS tube are connected, the source electrode of the third MOS tube is connected with the grid electrode and the drain electrode of the fourth MOS tube and the grid electrode of the fifth MOS tube, and the source electrodes of the fourth MOS tube and the fifth MOS tube, the output end of the first current source, the output end of the second current source and one end of the load resistor are connected; the source electrodes of the sixth MOS tube, the seventh MOS tube, the ninth MOS tube and the eighth MOS tube are connected; and the drain electrode of the eighth MOS tube is connected with the other end of the load resistor. A fast turn-off of the circuit can be achieved.

Description

Shutoff control circuit and electronic equipment thereof

Technical Field

The utility model belongs to the technical field of the electron, especially, relate to a turn-off control circuit and electronic equipment thereof.

Background

Fig. 1 is a conventional turn-off control circuit, primarily for powering a load from a high voltage power supply through a controllable switch. However, the conventional turn-off control circuit has a slow turn-off speed, and the turn-off speed is determined by the current magnitude of the current source I1 and the ratio of MP1/MP2, so that a large current is required to increase the turn-off speed, thereby increasing power consumption.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a turn-off control circuit and electronic equipment thereof, it is slow to aim at solving the traditional turn-off control circuit turn-off speed, thereby needs the problem of great electric current increase consumption for improving turn-off speed.

In a first aspect, the present invention provides a turn-off control circuit, including: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a first inverter X1, a second inverter X2, a first current source I1, a second current source I2 and a load resistor RL; the gate of the first MOS transistor M1 is connected to the output end of the first inverter X1, the input end of the second inverter X2 and the gate of the third MOS transistor M3, the input end of the first inverter X1 is connected to the switch control signal EN, the drain of the first MOS transistor M1 is connected to the drain and the gate of the sixth MOS transistor M6 and the gate of the seventh MOS transistor M7, the source of the first MOS transistor M1 is connected to the input end of the first current source I1 and the drain of the fifth MOS transistor M5, the gate of the second MOS transistor M2 is connected to the output end of the second inverter X2, the source of the second MOS transistor M2 is connected to the input end of the second current source I2, and the drain of the second MOS transistor M2 is connected to the drain of the seventh MOS transistor M7, the gate of the ninth MOS transistor M9 and the gate of the eighth MOS transistor M8; the drain of the third MOS transistor M3 is connected to the drain of the ninth MOS transistor M9, the source of the third MOS transistor M3 is connected to the gate and the drain of the fourth MOS transistor M4 and the gate of the fifth MOS transistor M5, respectively, and the source of the fourth MOS transistor M4 is connected to the source of the fifth MOS transistor M5, the output terminal of the first current source I1, the output terminal of the second current source I2, the power ground GND and one end of the load resistor RL; the source electrode of the sixth MOS transistor M6 is respectively connected to the high-voltage power supply VM, the source electrode of the seventh MOS transistor M7, the source electrode of the ninth MOS transistor M9 and the source electrode of the eighth MOS transistor M8; the drain of the eighth MOS transistor M8 is connected to the other end of the load resistor RL.

In a second aspect, the present invention provides an electronic device, which comprises the turn-off control circuit.

In the utility model discloses in, the circuit is through turn-off route ninth MOS pipe M9, third MOS pipe M3, fourth MOS pipe M4 and fifth MOS pipe M5, and turn-off speed is showing and is becoming fast to can not bring obvious extra consumption.

Drawings

Fig. 1 is a schematic diagram of a conventional turn-off control circuit provided by the present invention.

Fig. 2 is a schematic diagram of a turn-off control circuit according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of another shutdown control circuit according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantageous effects of the present invention more clearly understood, the present invention is further described in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

In order to explain the technical solution of the present invention, the following description is made by using specific examples.

Referring to fig. 2, an embodiment of the present invention provides a turn-off control circuit, including: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a first inverter X1, a second inverter X2, a first current source I1, a second current source I2 and a load resistor RL; the gate of the first MOS transistor M1 is connected to the output end of the first inverter X1, the input end of the second inverter X2 and the gate of the third MOS transistor M3, the input end of the first inverter X1 is connected to the switch control signal EN, the drain of the first MOS transistor M1 is connected to the drain and the gate of the sixth MOS transistor M6 and the gate of the seventh MOS transistor M7, the source of the first MOS transistor M1 is connected to the input end of the first current source I1 and the drain of the fifth MOS transistor M5, the gate of the second MOS transistor M2 is connected to the output end of the second inverter X2, the source of the second MOS transistor M2 is connected to the input end of the second current source I2, and the drain of the second MOS transistor M2 is connected to the drain of the seventh MOS transistor M7, the gate of the ninth MOS transistor M9 and the gate of the eighth MOS transistor M8; the drain of the third MOS transistor M3 is connected to the drain of the ninth MOS transistor M9, the source of the third MOS transistor M3 is connected to the gate and the drain of the fourth MOS transistor M4 and the gate of the fifth MOS transistor M5, respectively, and the source of the fourth MOS transistor M4 is connected to the source of the fifth MOS transistor M5, the output terminal of the first current source I1, the output terminal of the second current source I2, the power ground GND and one end of the load resistor RL; the source electrode of the sixth MOS transistor M6 is respectively connected to the high-voltage power supply VM, the source electrode of the seventh MOS transistor M7, the source electrode of the ninth MOS transistor M9 and the source electrode of the eighth MOS transistor M8; the drain of the eighth MOS transistor M8 is connected to the other end of the load resistor RL.

Referring to fig. 3, another turn-off control circuit according to an embodiment of the present invention is different from the turn-off control circuit shown in fig. 2 in that the turn-off control circuit further includes a zener diode D1, the anode of the zener diode D1 is connected to the gate of the eighth MOS transistor M8, and the cathode of the zener diode D1 is connected to the source of the eighth MOS transistor 8.

In an embodiment of the present invention, the turn-off control circuit may further include a resistor R1, and the source and the gate of the ninth MOS transistor M9 are connected to two ends of the resistor R1, respectively.

In an embodiment of the present invention, the first MOS transistor M1, the second MOS transistor M2, and the third MOS transistor M3 are high-voltage N-type MOS transistors.

In an embodiment of the present invention, the fourth MOS transistor M4 and the fifth MOS transistor M5 are low-voltage N-type MOS transistors.

In an embodiment of the present invention, the sixth MOS transistor M6, the seventh MOS transistor M7, the eighth MOS transistor M8, and the ninth MOS transistor M9 are high-voltage P-type MOS transistors.

In an embodiment of the present invention, the eighth MOS transistor M8 is a switching power transistor.

Referring to fig. 3, an embodiment of the present invention provides a shutdown control circuit having the following operating principle:

when the switch control signal EN is a high signal, the first MOS transistor M1 and the third MOS transistor M3 are turned off, and the second MOS transistor M2 is turned on, so that the sixth MOS transistor M6 and the seventh MOS transistor M7 are slowly turned off, the gate voltages of the eighth MOS transistor M8 and the ninth MOS transistor M9 start to fall, and then the eighth MOS transistor M8 is turned on to supply power to a load, and the zener diode D1 is used for clamping the gate source power supply of the eighth MOS transistor M8. When the switch control signal EN is a low signal, the first MOS transistor M1 and the third MOS transistor M3 are turned on, and the second MOS transistor M2 is turned off. At the moment when the switching control signal EN goes low, the gate voltage of the ninth MOS transistor M9 is low, when the third MOS transistor M3 is turned on, the gate voltage of the fourth MOS transistor M4 starts to rise, the fourth MOS transistor M4 is turned on to form a current I3, the fifth MOS transistor M5 and the fourth MOS transistor M4 copy the current I3 in proportion to form a current I4, the current I1 and the current I4 pull down the gate voltage of the sixth MOS transistor M6, so that the gate currents injected into the eighth MOS transistor M7 and the eighth MOS transistor M8 and the ninth MOS transistor M9 are significantly increased by the seventh MOS transistor M7, the gate voltage of the eighth MOS transistor M8 is pulled up rapidly, the currents I3 and I3 also become small gradually as the gates of the eighth MOS transistor M8 and the ninth MOS transistor M9 rise, until the ninth MOS transistor M3 is turned off, the I3 and the eighth MOS transistor M3 are finally turned off, and the eighth MOS transistor M3 is pulled up completely.

Another embodiment of the present invention provides an electronic device, which comprises the turn-off control circuit.

In the embodiment of the utility model provides an in, the circuit is through turn-off route ninth MOS pipe M9, third MOS pipe M3, fourth MOS pipe M4 and fifth MOS pipe M5, and turn-off speed is showing and is becoming fast to can not bring obvious extra consumption.

The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims

1. A shutdown control circuit, comprising: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a first inverter X1, a second inverter X2, a first current source I1, a second current source I2 and a load resistor RL; the gate of the first MOS transistor M1 is connected to the output end of the first inverter X1, the input end of the second inverter X2 and the gate of the third MOS transistor M3, the input end of the first inverter X1 is connected to the switch control signal EN, the drain of the first MOS transistor M1 is connected to the drain and the gate of the sixth MOS transistor M6 and the gate of the seventh MOS transistor M7, the source of the first MOS transistor M1 is connected to the input end of the first current source I1 and the drain of the fifth MOS transistor M5, the gate of the second MOS transistor M2 is connected to the output end of the second inverter X2, the source of the second MOS transistor M2 is connected to the input end of the second current source I2, and the drain of the second MOS transistor M2 is connected to the drain of the seventh MOS transistor M7, the gate of the ninth MOS transistor M9 and the gate of the eighth MOS transistor M8; the drain of the third MOS transistor M3 is connected to the drain of the ninth MOS transistor M9, the source of the third MOS transistor M3 is connected to the gate and the drain of the fourth MOS transistor M4 and the gate of the fifth MOS transistor M5, respectively, and the source of the fourth MOS transistor M4 is connected to the source of the fifth MOS transistor M5, the output terminal of the first current source I1, the output terminal of the second current source I2, the power ground GND and one end of the load resistor RL; the source electrode of the sixth MOS transistor M6 is respectively connected to the high-voltage power supply VM, the source electrode of the seventh MOS transistor M7, the source electrode of the ninth MOS transistor M9 and the source electrode of the eighth MOS transistor M8; the drain of the eighth MOS transistor M8 is connected to the other end of the load resistor RL.

2. The turn-off control circuit of claim 1, further comprising a zener diode D1, wherein the anode of the zener diode D1 is connected to the gate of the eighth MOS transistor M8, and the cathode of the zener diode D1 is connected to the source of the eighth MOS transistor 8.

3. The turn-off control circuit of claim 1, further comprising a resistor R1, wherein two ends of the resistor R1 are respectively connected to the source and the gate of the ninth MOS transistor M9.

4. The turn-off control circuit of claim 1, wherein the first MOS transistor M1, the second MOS transistor M2 and the third MOS transistor M3 are high voltage N-type MOS transistors.

5. The turn-off control circuit of claim 1, wherein the fourth MOS transistor M4 and the fifth MOS transistor M5 are low voltage N-type MOS transistors.

6. The turn-off control circuit of claim 1, wherein the sixth MOS transistor M6, the seventh MOS transistor M7, the eighth MOS transistor M8 and the ninth MOS transistor M9 are high voltage P-type MOS transistors.

7. The turn-off control circuit of claim 1, wherein the eighth MOS transistor M8 is a switching power transistor.

8. An electronic device characterized in that it comprises a shutdown control circuit according to any one of claims 1 to 7.