CN112909078B - High-voltage ultrafast recovery diode chip and manufacturing method thereof - Google Patents
High-voltage ultrafast recovery diode chip and manufacturing method thereof Download PDFInfo
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- 238000011084 recovery Methods 0.000 title claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 56
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 56
- 239000010703 silicon Substances 0.000 claims abstract description 56
- 239000013078 crystal Substances 0.000 claims abstract description 37
- 230000007797 corrosion Effects 0.000 claims abstract description 26
- 238000005260 corrosion Methods 0.000 claims abstract description 26
- 238000001035 drying Methods 0.000 claims abstract description 23
- 239000007788 liquid Substances 0.000 claims abstract description 19
- 238000004140 cleaning Methods 0.000 claims abstract description 16
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 claims abstract description 14
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000002253 acid Substances 0.000 claims abstract description 11
- 229910017604 nitric acid Inorganic materials 0.000 claims abstract description 11
- 238000011010 flushing procedure Methods 0.000 claims abstract description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 10
- 238000002791 soaking Methods 0.000 claims abstract description 8
- 229910001868 water Inorganic materials 0.000 claims abstract description 8
- 239000003292 glue Substances 0.000 claims abstract description 7
- 238000001816 cooling Methods 0.000 claims abstract description 6
- 238000001259 photo etching Methods 0.000 claims abstract description 5
- 238000005406 washing Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 27
- 238000009792 diffusion process Methods 0.000 claims description 18
- 238000005530 etching Methods 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 17
- 238000002161 passivation Methods 0.000 claims description 7
- 239000003513 alkali Substances 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000008367 deionised water Substances 0.000 claims description 3
- 229910021641 deionized water Inorganic materials 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims 1
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 abstract description 2
- 235000011114 ammonium hydroxide Nutrition 0.000 abstract description 2
- 230000005684 electric field Effects 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 5
- 239000012535 impurity Substances 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66136—PN junction diodes
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Abstract
The invention provides a high-voltage ultrafast recovery diode chip and a manufacturing method thereof, wherein the manufacturing method comprises the following steps: 1) Pre-cleaning; 2) And drying; 3) And photoetching; 4) And grooving for the first time: preparing acid by the first-time corrosive liquid according to the volume ratio: h2SO4 HNO3 CH3COOH HF = 9; 5) And grooving for the second time: and preparing acid by the second corrosive liquid according to the volume ratio: h3, HNO3: CH3COOH: HF = 5; 6) Flushing and removing the glue; 7) And removing damage and cleaning: soaking the high-resistance silicon single crystal wafer in a damage-removing corrosion solution with the volume ratio of HNO3 to HF =10, then flushing cooling ionized water, soaking in a washing solution with the volume ratio of H2O to H2O2 to NH4OH = 1; 8) And (5) drying.
Description
Technical Field
The invention belongs to the technical field of chips, relates to a manufacturing method of a deep groove, and particularly relates to a high-voltage ultrafast recovery diode chip and a manufacturing method thereof.
Background
The total thickness of the ultrafast recovery diode chip produced at present is 220 +/-5 microns, the depth of the groove is 145 +/-5 microns, and the existing manufacturing method is as follows: cleaning → drying → gumming → forward drying → exposing → developing → firming → grooving → flushing → gumming → flushing → drying; however, the concentration of the diffusion layer is too high, so that the lateral corrosion is severe, the effective mesa area is reduced to about 60%, and the effective mesa area is a negative bevel angle, so that the chip is poor in current impact resistance, small in borne surge current, low in reverse breakdown voltage and high in forward voltage, and brings difficulty to post-process photoetching and electrode manufacturing.
Disclosure of Invention
The invention aims to solve the problems in the prior art, and provides a high-voltage ultrafast recovery diode chip and a manufacturing method thereof, wherein a positive and negative bevel angle deep groove is realized by performing step-by-step etching twice and correspondingly designing an etching process according to the characteristics of different doped layers so as to improve the effective platform area.
The purpose of the invention can be realized by the following technical scheme: the utility model provides a high-pressure ultrafast recovery diode chip, includes high resistant silicon single crystal piece, high resistant silicon single crystal piece superposes positive electrode layer, high concentration diffusion layer, PN junction, silicon substrate layer and back electrode layer from top to bottom in proper order, the periphery of PN junction forms the passivation layer, by high concentration diffusion layer extremely the silicon substrate layer corrodes and forms the slot, the slot pierces through high concentration diffusion layer, PN junction, and the upper portion of silicon substrate layer.
The front electrode layer of the high-resistance silicon single chip in the high-voltage ultrafast recovery diode chip is in a round-corner square shape. The PN junction is protected by a passivation layer.
In the above high-voltage ultrafast recovery diode chip, the thicknesses of the front electrode layer and the back electrode layer are equal, and the compositions of the front electrode layer and the back electrode layer are the same.
In the high-voltage ultrafast recovery diode chip, the high-concentration diffusion layer and the silicon substrate layer have different doping concentrations, the difference between the doping concentrations is more than two orders of magnitude, and a PN junction is formed by combining the high-concentration diffusion layer and the silicon substrate layer.
The manufacturing method of the high-voltage ultrafast recovery diode chip comprises the following steps of:
1) And pre-cleaning: cleaning the high-resistance silicon single crystal wafer;
2) And drying: putting the cleaned high-resistance silicon single crystal wafer into drying equipment for drying;
3) And photoetching: sequentially carrying out glue coating, pre-baking, exposure, development and film hardening on the cleaned high-resistance silicon single crystal wafer to etch a mesa graph;
4) And grooving for the first time: preparing acid by the first-time corrosive liquid according to the volume ratio: h2SO4 HNO3 CH3COOH HF = 9;
5) And grooving for the second time: and preparing acid by the second corrosive liquid according to the volume ratio: h3, HNO3: CH3COOH: HF = 5;
6) Flushing and removing glue: cleaning and photoresist removing treatment is carried out on the high-resistance silicon single crystal wafer subjected to groove etching;
7) And removing damage and cleaning: soaking the photoresist-removed high-resistance silicon single crystal wafer in a damage-removing corrosion solution with the volume ratio of HNO3 to HF = 10;
8) And drying: and drying the manufactured high-resistance silicon single crystal wafer in drying equipment.
The manufacturing method of the high-voltage ultrafast recovery diode chip comprises dividing the grooving process into two parts, grooving from the high-doping concentration region to the low-doping concentration region, and converting the negative bevel angle into the positive bevel angle. Firstly, developing a first-time corrosive liquid according to the impurity characteristics of a high-doping-concentration area, wherein the first-time corrosive liquid has a small transverse corrosion effect and mainly performs longitudinal corrosion, and the first-time corrosive liquid is used for corroding the high-doping-concentration area; and secondly, developing a secondary corrosion liquid according to the impurity characteristics of the low-doping concentration region, wherein the transverse corrosion speed and the longitudinal corrosion speed of the secondary corrosion liquid to the low-doping concentration region are the same, the corrosion speed is high, the corrosion speed to the high-doping concentration region is low, the secondary corrosion liquid is used for corroding the low-doping concentration region, so that a positive oblique angle is obtained, and the area of the table top is large. The first step must control the trench depth precisely and the second step must control the etch temperature and time precisely to ensure that a positive bevel is formed without damaging the mesa.
In the manufacturing method of the high-voltage ultrafast recovery diode chip, in the step 1), the surface of the high-resistance silicon single crystal wafer is chemically cleaned through an acid, alkali and deionized water ultrasonic cleaning process.
In the above method for manufacturing a high-voltage ultrafast recovery diode chip, in step 4), the temperature of the first etching solution is 3 ± 3 ℃ and the etching time is 20 minutes ± 30 seconds.
In the manufacturing method of the high-voltage ultrafast recovery diode chip, in the step 5), the temperature of the second-time corrosive liquid is minus 5 +/-3 ℃, and the corrosion time is 3 minutes +/-30 seconds.
In the above method for manufacturing a high-voltage ultrafast recovery diode chip, in step 7), the high-resistance silicon single crystal wafer is immersed in the damage-removing etching solution for an etching time of 10 ± 2 seconds.
In the above method for manufacturing a high-voltage ultrafast recovery diode chip, in step 7), the time for flushing the high-resistance silicon single crystal wafer with cooling ionized water is 10 ± 1 minute each time.
In the above method for manufacturing a high-voltage ultrafast recovery diode chip, in step 7), the time for soaking the high-resistance silicon single crystal wafer in the washing solution is 2 ± 1 minute.
Compared with the prior art, the high-voltage ultrafast recovery diode chip and the manufacturing method thereof have the following beneficial effects:
the deep grooves with positive and negative oblique angles are realized through step-by-step groove carving, and in the mesa structure with the positive oblique angles, the smaller the oblique angle is, the wider the space charge region on the surface is pulled, and the electric field intensity on the surface is smaller; in addition, the maximum electric field on the surface is not on the PN junction but on the side of the low-doping concentration area. The structure can reduce the surface electric field intensity and improve the voltage endurance capability. The positive oblique angle process is the most ideal process for high-voltage devices, obtains parallel plane junctions close to the ideal process, improves the reverse breakdown voltage of the devices, improves the effective area, reduces the forward voltage, and improves the stability and the reliability of the devices. The area of the whole effective platform is increased from about 60% to more than 85%, surge current and reverse breakdown voltage are both increased, forward voltage is reduced, and the process is easy to control and strong in operability.
Drawings
Fig. 1 is a schematic cross-sectional view of an ultrafast recovery diode chip according to the present invention.
Fig. 2 is a schematic top view of an ultrafast recovery diode chip according to the present invention.
Fig. 3 is a schematic diagram of a trench cross-sectional structure of an ultrafast recovery diode chip of the present invention.
In the figure, 1, a front electrode layer; 2. a high concentration diffusion layer; 3. a PN junction; 4. a silicon substrate layer; 5. a back electrode layer; 6. a passivation layer; 7. and (4) a groove.
Detailed Description
The following description of the embodiments of the present invention will be made with reference to the accompanying drawings:
as shown in fig. 1 to 3, the high-voltage ultrafast recovery diode chip comprises a high-resistance silicon single crystal wafer, wherein a front electrode layer 1, a high-concentration diffusion layer 2, a PN junction 3, a silicon substrate layer 4 and a back electrode layer 5 are sequentially stacked on the high-resistance silicon single crystal wafer from top to bottom, a passivation layer 6 is formed on the periphery of the PN junction 3, a groove 7 is formed by corroding the high-concentration diffusion layer 2 to the silicon substrate layer 4, and the groove 7 penetrates through the high-concentration diffusion layer 2, the PN junction 3 and the upper part of the silicon substrate layer 4.
The front electrode layer 1 of the high-resistance silicon single chip in the high-voltage ultrafast recovery diode chip is in a round-corner square shape. The PN junction 3 is protected by a passivation layer 6.
The thicknesses of the front electrode layer 1 and the back electrode layer 5 are equal, and the compositions of the front electrode layer 1 and the back electrode layer 5 are the same.
The high-concentration diffusion layer 2 and the silicon substrate layer 4 have different doping concentrations, the difference of the doping concentrations is more than two orders of magnitude, and a PN junction 3 is formed between the high-concentration diffusion layer 2 and the silicon substrate layer 4 in a combined mode.
The manufacturing method of the high-voltage ultrafast recovery diode chip comprises the following steps of:
1) And pre-cleaning: cleaning the high-resistance silicon single crystal wafer;
2) And drying: putting the cleaned high-resistance silicon single crystal wafer into drying equipment for drying;
3) And photoetching: sequentially carrying out glue coating, pre-baking, exposure, development and film hardening on the cleaned high-resistance silicon single crystal wafer to etch a mesa graph;
4) And grooving for the first time: preparing acid by the first-time corrosive liquid according to the volume ratio: h2SO4 HNO3 CH3COOH HF = 9;
5) And grooving for the second time: and preparing acid by the second corrosive liquid according to the volume ratio: h3, HNO3, CH3COOH and HF = 5;
6) Flushing and removing glue: cleaning and photoresist removing treatment is carried out on the high-resistance silicon single crystal wafer subjected to groove etching;
7) And removing damage and cleaning: soaking the photoresist-removed high-resistance silicon single crystal wafer in a damage-removing corrosion solution with the volume ratio of HNO3 to HF =10, then flushing cooling ionized water, then soaking in a washing solution with the volume ratio of H2O to H2O2 to NH4OH =1, and then flushing cooling ionized water;
8) And drying: and drying the manufactured high-resistance silicon single crystal wafer in drying equipment.
The manufacturing method of the high-voltage ultrafast recovery diode chip comprises dividing the grooving process into two parts, grooving from the high-doping concentration region to the low-doping concentration region, and converting the negative bevel angle into the positive bevel angle. Firstly, developing a first-time corrosive liquid according to the impurity characteristics of a high-doping-concentration area, wherein the first-time corrosive liquid has a small transverse corrosion effect and mainly performs longitudinal corrosion, and the first-time corrosive liquid is used for corroding the high-doping-concentration area; and secondly, developing a second corrosion solution according to the impurity characteristics of the low-doping concentration region, wherein the transverse corrosion speed and the longitudinal corrosion speed of the second corrosion solution to the low-doping concentration region are the same, the corrosion speed is high, the corrosion speed to the high-doping concentration region is low, the second corrosion solution is used for corroding the low-doping concentration region, so that a positive oblique angle is obtained, and the area of the table top is large. The first step must control the trench depth precisely and the second step must control the etch temperature and time precisely to ensure that a positive bevel is formed without damaging the mesa.
In the step 1), the surface of the high-resistance silicon single crystal wafer is chemically cleaned through an acid, alkali and deionized water ultrasonic cleaning process.
In the step 4), the temperature of the first corrosive liquid is 3 +/-3 ℃, and the corrosion time is 20 minutes +/-30 seconds.
In the step 5), the temperature of the second etching solution is-5 +/-3 ℃, and the etching time is 3 minutes +/-30 seconds.
In the step 7), the high-resistance silicon single crystal wafer is soaked in the damage-removing etching solution for etching time of 10 +/-2 seconds.
In the step 7), the time for cooling the ionized water for each time of the high-resistance silicon single crystal wafer is 10 +/-1 min.
In the step 7), the high-resistivity silicon single crystal wafer is soaked in the washing solution for 2 +/-1 minutes.
Compared with the prior art, the high-voltage ultrafast recovery diode chip and the manufacturing method thereof have the following beneficial effects:
the positive and negative bevel angle deep grooves 7 are realized through step-by-step grooving, and in the positive bevel angle mesa structure, the smaller the bevel angle is, the wider the surface space charge region is pulled, and the electric field intensity on the surface is smaller; in addition, the maximum electric field on the surface is not on the PN junction 3, but on the side of the low-doping concentration area. The structure can reduce the surface electric field intensity and improve the voltage resistance. The positive oblique angle process is the most ideal process for high-voltage devices, obtains parallel plane junctions close to the ideal process, improves the reverse breakdown voltage of the devices, improves the effective area, reduces the forward voltage, and improves the stability and the reliability of the devices. The area of the whole effective platform is increased from about 60% to more than 85%, surge current and reverse breakdown voltage are both increased, forward voltage is reduced, and the process is easy to control and strong in operability.
It is to be understood that the above description is not intended to limit the present invention, and the present invention is not limited to the above examples, and those skilled in the art may make various changes, modifications, additions and substitutions within the spirit and scope of the present invention.
Although the front electrode layer 1 is used more herein; a high concentration diffusion layer 2; a PN junction 3; a silicon substrate layer 4; a back electrode layer 5; a passivation layer 6; trench 7, etc., without excluding the possibility of using other terms. These terms are used merely to more conveniently describe and explain the nature of the present invention; they are to be construed as being without limitation to any additional limitations that may be imposed by the spirit of the present invention.
Claims (7)
1. The manufacturing method of the high-voltage ultrafast recovery diode chip comprises a high-resistance silicon single crystal wafer, wherein a front electrode layer, a high-concentration diffusion layer, a PN junction, a silicon substrate layer and a back electrode layer are sequentially stacked on the high-resistance silicon single crystal wafer from top to bottom, a passivation layer is formed on the periphery of the PN junction, a groove is formed from the high-concentration diffusion layer to the silicon substrate layer in a corrosion mode, and the groove penetrates through the high-concentration diffusion layer, the PN junction and the upper portion of the silicon substrate layer;
the thicknesses of the front electrode layer and the back electrode layer are equal, and the components of the front electrode layer and the back electrode layer are consistent;
the high-concentration diffusion layer and the silicon substrate layer have different doping concentrations, the difference between the doping concentrations is more than two orders of magnitude, and a PN junction is formed by combining the high-concentration diffusion layer and the silicon substrate layer;
the method is characterized by comprising the following steps:
1) And pre-cleaning: cleaning the high-resistance silicon single crystal wafer;
2) And drying: putting the cleaned high-resistance silicon single crystal wafer into drying equipment for drying;
3) And photoetching: sequentially carrying out glue coating, pre-baking, exposure, development and film hardening on the cleaned high-resistance silicon single crystal wafer to etch a mesa graph;
4) And grooving for the first time: preparing acid by the first-time corrosive liquid according to the volume ratio: h2SO4 HNO3 CH3COOH HF = 9;
5) And grooving for the second time: preparing acid by the second corrosive liquid according to the volume ratio: h3, HNO 3COOH and HF = 5;
6) Flushing and removing glue: cleaning and photoresist removing treatment is carried out on the high-resistance silicon single crystal wafer subjected to groove etching;
7) And removing damage and cleaning: soaking the photoresist-removed high-resistance silicon single crystal wafer in a damage-removing corrosion solution with the volume ratio of HNO3 to HF = 10;
8) And drying: and drying the manufactured high-resistance silicon single crystal wafer in drying equipment.
2. The method for manufacturing a high-voltage ultrafast recovery diode chip as claimed in claim 1, wherein in step 1), a chemical cleaning process is performed on the surface of the high-resistance silicon single crystal wafer through an ultrasonic cleaning process with acid, alkali and deionized water.
3. The method for manufacturing a high voltage ultrafast recovery diode chip as claimed in claim 1, wherein in step 4), the temperature of the first etching solution is 3 ± 3 ℃ and the etching time is 20 minutes ± 30 seconds.
4. The method for manufacturing a high voltage ultrafast recovery diode chip as claimed in claim 1, wherein in step 5), the temperature of the second etching solution is-5 ± 3 ℃ and the etching time is 3 minutes ± 30 seconds.
5. The method for manufacturing a high-voltage ultrafast recovery diode chip as claimed in claim 1, wherein in step 7), the etching time of the high-resistance silicon single crystal wafer immersed in the de-damage etchant is 10 ± 2 seconds.
6. The method for manufacturing a high-voltage ultrafast recovery diode chip as claimed in claim 1, wherein in step 7), the time for cooling the ionized water per time of the high-resistance silicon single crystal wafer is 10 ± 1 minute.
7. The method for manufacturing a high-voltage ultrafast recovery diode chip as claimed in claim 1, wherein in step 7), the time for soaking the high-resistance silicon single crystal wafer in the washing solution is 2 ± 1 min.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0351677A2 (en) * | 1988-07-18 | 1990-01-24 | General Instrument Corporation Of Delaware | Passivated P-N junction in mesa semiconductor structure |
| CN103578978A (en) * | 2013-10-17 | 2014-02-12 | 北京时代民芯科技有限公司 | Method for manufacturing high-voltage fast recovery diodes based on silicon-based bonding materials |
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2021
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| EP0351677A2 (en) * | 1988-07-18 | 1990-01-24 | General Instrument Corporation Of Delaware | Passivated P-N junction in mesa semiconductor structure |
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| CN103578978A (en) * | 2013-10-17 | 2014-02-12 | 北京时代民芯科技有限公司 | Method for manufacturing high-voltage fast recovery diodes based on silicon-based bonding materials |
| CN105428216A (en) * | 2015-11-20 | 2016-03-23 | 如皋市大昌电子有限公司 | Acid-washing process for diode chip |
| CN106024865A (en) * | 2016-07-19 | 2016-10-12 | 如皋市大昌电子有限公司 | Mesa diode processing technology |
| CN108122755A (en) * | 2017-12-21 | 2018-06-05 | 杭州赛晶电子有限公司 | The preparation method of the positive table top silicon core of grooving etching taper and silicon diode |
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