CN112867992A - 检测地址错误的系统、方法及设备 - Google Patents

检测地址错误的系统、方法及设备 Download PDF

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Publication number
CN112867992A
CN112867992A CN201980069102.XA CN201980069102A CN112867992A CN 112867992 A CN112867992 A CN 112867992A CN 201980069102 A CN201980069102 A CN 201980069102A CN 112867992 A CN112867992 A CN 112867992A
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CN
China
Prior art keywords
parity
address information
data
address
memory
Prior art date
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Pending
Application number
CN201980069102.XA
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English (en)
Chinese (zh)
Inventor
D·P·福莱
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Texas Instruments Inc
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Texas Instruments Inc
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Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of CN112867992A publication Critical patent/CN112867992A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016—Error in accessing a memory location, i.e. addressing error
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/024—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/42—Response verification devices using error correcting codes [ECC] or parity check

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
CN201980069102.XA 2018-10-05 2019-10-04 检测地址错误的系统、方法及设备 Pending CN112867992A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/153,546 2018-10-05
US16/153,546 US11055172B2 (en) 2018-10-05 2018-10-05 Systems, methods, and apparatus to detect address faults
PCT/US2019/054784 WO2020072952A1 (en) 2018-10-05 2019-10-04 Systems, methods, and apparatus to detect address faults

Publications (1)

Publication Number Publication Date
CN112867992A true CN112867992A (zh) 2021-05-28

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980069102.XA Pending CN112867992A (zh) 2018-10-05 2019-10-04 检测地址错误的系统、方法及设备

Country Status (6)

Country Link
US (1) US11055172B2 (enExample)
EP (1) EP3861446B1 (enExample)
JP (1) JP7387725B2 (enExample)
KR (1) KR102950577B1 (enExample)
CN (1) CN112867992A (enExample)
WO (1) WO2020072952A1 (enExample)

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GB2548407A (en) * 2016-03-18 2017-09-20 Memoscale As Coding technique
US12321236B2 (en) 2020-05-11 2025-06-03 Samsung Electronics Co., Ltd. Systems, methods, and devices for fault resilient storage
US12298853B2 (en) 2020-05-11 2025-05-13 Samsung Electronics Co., Ltd. Systems, methods, and devices for data recovery with spare storage device and fault resilient storage device
US12306717B2 (en) * 2020-05-11 2025-05-20 Samsung Electronics Co., Ltd. Systems, methods, and devices for data recovery using parity space as recovery space
JP2022043635A (ja) * 2020-09-04 2022-03-16 キオクシア株式会社 メモリシステム
KR102317788B1 (ko) 2021-05-14 2021-10-26 삼성전자주식회사 스토리지 장치 및 스토리지 컨트롤러의 동작 방법
US11769567B2 (en) * 2021-07-19 2023-09-26 Nxp Usa, Inc. Devices and methods for preventing errors and detecting faults within a memory device
US11606099B1 (en) * 2021-09-23 2023-03-14 Texas Instruments Incorporated Fault detection within an analog-to-digital converter
US11853157B2 (en) * 2021-11-17 2023-12-26 Nxp B.V. Address fault detection system
WO2023091172A1 (en) * 2021-11-22 2023-05-25 Silicon Storage Technology, Inc. Address fault detection in a memory system
US11928021B2 (en) * 2022-03-31 2024-03-12 Micron Technology, Inc. Systems and methods for address fault detection
US12562213B2 (en) * 2023-07-24 2026-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. Memory devices configured with adaptive word line pulse adjustment and methods for operating the same

Citations (7)

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US5345582A (en) * 1991-12-20 1994-09-06 Unisys Corporation Failure detection for instruction processor associative cache memories
US5453999A (en) * 1994-04-26 1995-09-26 Unisys Corporation Address verification system using parity for transmitting and receiving circuits
CN102263555A (zh) * 2010-05-27 2011-11-30 罗伯特·博世有限公司 通过奇偶性预报识别ad-转换器中的故障的方法
US20120030531A1 (en) * 2010-07-30 2012-02-02 Infineon Technologies Ag Safe Memory Storage By Internal Operation Verification
US20130179758A1 (en) * 2012-01-11 2013-07-11 Micron Technology, Inc. Circuits, integrated circuits, and methods for interleaved parity computation
CN103988182A (zh) * 2011-12-16 2014-08-13 英特尔公司 使用奇偶校验和冗余行的动态错误处理
CN108121617A (zh) * 2016-11-30 2018-06-05 三星电子株式会社 存储器模块、存储器系统和操作存储器系统的方法

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US5392302A (en) * 1991-03-13 1995-02-21 Quantum Corp. Address error detection technique for increasing the reliability of a storage subsystem
JPH05225797A (ja) * 1992-02-14 1993-09-03 Hitachi Ltd 半導体メモリ回路
US5537425A (en) * 1992-09-29 1996-07-16 International Business Machines Corporation Parity-based error detection in a memory controller
GB0322597D0 (en) * 2003-09-26 2003-10-29 Texas Instruments Ltd Soft error correction
JP2013073653A (ja) 2011-09-28 2013-04-22 Elpida Memory Inc 半導体装置
US10541044B2 (en) * 2016-10-31 2020-01-21 Qualcomm Incorporated Providing efficient handling of memory array failures in processor-based systems

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5345582A (en) * 1991-12-20 1994-09-06 Unisys Corporation Failure detection for instruction processor associative cache memories
US5453999A (en) * 1994-04-26 1995-09-26 Unisys Corporation Address verification system using parity for transmitting and receiving circuits
CN102263555A (zh) * 2010-05-27 2011-11-30 罗伯特·博世有限公司 通过奇偶性预报识别ad-转换器中的故障的方法
US20120030531A1 (en) * 2010-07-30 2012-02-02 Infineon Technologies Ag Safe Memory Storage By Internal Operation Verification
CN103988182A (zh) * 2011-12-16 2014-08-13 英特尔公司 使用奇偶校验和冗余行的动态错误处理
US20130179758A1 (en) * 2012-01-11 2013-07-11 Micron Technology, Inc. Circuits, integrated circuits, and methods for interleaved parity computation
CN108121617A (zh) * 2016-11-30 2018-06-05 三星电子株式会社 存储器模块、存储器系统和操作存储器系统的方法

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US20200110659A1 (en) 2020-04-09
EP3861446B1 (en) 2025-05-14
US11055172B2 (en) 2021-07-06
KR102950577B1 (ko) 2026-04-10
KR20210058982A (ko) 2021-05-24
EP3861446A4 (en) 2021-12-15
EP3861446A1 (en) 2021-08-11
JP7387725B2 (ja) 2023-11-28
WO2020072952A1 (en) 2020-04-09
JP2022504328A (ja) 2022-01-13

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