CN112816850B - A burn-in test system, method and integrated circuit chip facilitating real-time monitoring - Google Patents

Abstract

The present application discloses an integrated circuit chip that facilitates real-time monitoring of aging test results, including a timer, a controller and a control program running on the controller; the integrated circuit chip is used for aging test, and is characterized in that: The controller controls the timer to output a first PWM signal representing the burn-in test item based on the operation of the control program, and a second PWM signal that is synchronized with the first PWM signal and used to represent test data ; The control program is defined as outputting the first PWM signal with different frequencies based on different aging test items.

Description

A burn-in test system, method and integrated circuit chip facilitating real-time monitoring

technical field

The present invention relates to integrated circuit testing, in particular to integrated circuit aging testing.

Background technique

The aging test project refers to the process of simulating the various factors involved in the actual use conditions of the product to carry out the corresponding conditions to strengthen the experiment for the aging of the product. The common aging mainly includes high and low temperature aging, light aging, moist heat cycle, hot air aging, etc. . The IC burn-in test items usually include flash memory erase/write test, clock switching test, reset test, sleep wake-up test, power-off restart test, etc.

For example, the patent No. CN105319494A provides an automatic aging test device for integrated circuit chips, the chip test results do not need to be output to the tester for verification, and the verification is automatically completed by the aging test program in the memory module, saving a lot of external The communication time can be verified in real time, which saves time and cost and can monitor the whole process of the test. The flashing frequency of the status display light indicates different test results, and the status of the chip in the aging process is monitored in real time, and the test results are clear at a glance.

However, the problem that the above-mentioned prior art cannot solve is that when there are multiple test items, the specific test item being performed at the moment cannot be determined from the test result, so the test result of each test item cannot be determined in real time.

SUMMARY OF THE INVENTION

In view of the above, in one aspect, the present invention provides an integrated circuit chip that facilitates real-time monitoring of burn-in test results, including a timer, a controller, and a control program running on the controller; the integrated circuit chip is used for burn-in test, The controller controls the timer to output a first PWM signal representing the burn-in test item based on the operation of the control program, and a first PWM signal that is synchronized with the first PWM signal and used to represent the test data. Two PWM signals;

The control program is defined to output the first PWM signals with different frequencies based on different burn-in test items.

Advantageously, the control program is defined as: each of the test items corresponds to a first PWM signal of a frequency.

Advantageously, the burn-in test items include flash memory erase/write function test or clock switching function test or sleep wake-up function test or reset function test or power-off restart function test.

Advantageously, the integrated circuit chip is an MCU or a DSP or an MPU.

On the other hand, the present invention also provides an aging test method that is convenient for real-time monitoring, which includes the steps of: initializing an integrated circuit chip controller, and defining a control program running on the controller according to the requirements of the aging test item to control the timer output The first PWM signal and the second PWM signal, wherein the first PWM signal corresponds to different frequencies under different aging test items, and the second PWM signal synchronously outputs the data of each aging test; the integration of the control program definition will be completed. A burn-in test device is installed on the circuit chip; the burn-in test item and sequence are selected on the burn-in test device to start the test; the frequency of the displayed first PWM signal waveform is observed to determine the ongoing test item; the second PWM output synchronously is observed signal, read out the test data value, and judge whether the test of the chip is abnormal.

Advantageously, the control program is defined as: each of the test items corresponds to a first PWM signal of a frequency.

Advantageously, the burn-in test item includes at least one of a flash memory erase/write function test, a clock switching function test, a sleep wake-up function test, a reset function test, and a power-off restart function test.

On the other hand, the present invention also provides a burn-in test system that facilitates real-time monitoring, comprising: the integrated circuit chip according to claim 1 to be subjected to burn-in test; and a burn-in device for conducting burn-in test on the integrated circuit chip A test device, the burn-in test device includes a chip mounting unit for connecting with the pins of the integrated circuit chip; a display unit for displaying the output signal waveform of the integrated circuit chip; and a setting unit for selecting the aging test items and sequence.

Advantageously, the system includes a plurality of integrated circuit chips, wherein the definition of the control program and the setting of the test items in each integrated circuit chip are independent of each other, and the display on the display unit corresponds to the plurality of integrated circuit chips multiple sets of first PWM and second PWM signal waveforms.

Advantageously, the test environment of the aging test is a high and low temperature aging test or a light aging test or a damp heat cycle test or a hot air aging test.

The beneficial effect of the burn-in test system or method or the integrated circuit chip for burn-in test provided by this embodiment is that, through software definition, the frequencies corresponding to each test item on the first PWM signal are all different, so that the frequency corresponding to each test item on the first PWM signal can be easily Determine which test the chip is in in real time according to the first PWM signal waveform, and obtain the test results of each test in combination with the synchronously output second PWM signal waveform data, so that it can be clearly known which test is abnormal. In addition, the software-defined approach also makes the structure simpler.

Description of drawings

The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the specification, and together with the embodiments of the present invention, are used to explain the present invention, and do not constitute a limitation to the present invention. In the attached image:

1 is a structural diagram of an aging test system that is convenient for real-time monitoring provided by an embodiment of the present invention;

2 is a structural diagram of an integrated circuit chip that facilitates real-time monitoring of aging test results provided by an embodiment of the present invention;

3 is a waveform diagram of an aging test that is convenient for real-time monitoring provided by an embodiment of the present invention;

FIG. 4 is a flowchart of an aging test method convenient for real-time monitoring provided by an embodiment of the present invention.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present application more clearly understood, the present application will be described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.

In the description of this application, unless otherwise clearly specified and limited, the terms "first" and "second" are only used for the purpose of description, and should not be construed as indicating or implying relative importance; unless otherwise specified or explained , the term "multiple" refers to two or more; the terms "connection", "installation", etc. should be understood in a broad sense, for example, "connection" can be a fixed connection, a detachable connection, or an integral Connection, or electrical connection; either directly or indirectly through an intermediary. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

Example 1

As shown in FIG. 1 , this embodiment provides an aging test system that is convenient for real-time monitoring. The burn-in test system includes an integrated circuit chip to be subjected to the burn-in test, as shown in FIG. 2 , which is a structural diagram of the integrated circuit chip in this embodiment. The chip includes a controller, a timer and a custom control program (hereinafter referred to as the control program) running on the controller. The controller controls the timer to output a PWM signal (Pulse width modulation, PWM, based on the operation of the custom control program). Pulse width modulation signal), wherein the control program is defined as controlling the first channel and the second channel of the timer to output the first PWM signal and the second PWM signal respectively based on the burn-in test item, and, under different burn-in test items, the first One PWM signal corresponds to different frequencies, and the second PWM signal synchronously outputs data of various aging tests. The system also includes a burn-in test device, the burn-in test device includes a chip mounting unit for mounting the above-mentioned integrated circuit chip and communicating with the pins of the integrated circuit chip; the burn-in test device also includes a display unit for displaying the integrated circuit chip. The output signal waveform or the self-parameter information of the burn-in test device; the burn-in test device also includes a setting unit for selecting the burn-in test items and sequence to be performed according to requirements.

Specifically, one of the implementation principles of the above burn-in test system is that the items to be sequentially performed the burn-in test are flash memory erasing and reading, clock switching, and sleep-wake-up tests. Then the above control program is defined as: during the flash memory erasing and reading test, the first PWM signal outputs the waveform of the first frequency f1; during the clock switching function test, the first PWM signal outputs the waveform of the second frequency f2 at this time; During the sleep-wake-up function test, the first PWM signal outputs the waveform of the third frequency f3; in addition, the first PWM signal is no longer output during the interval of each test or during the start or end of all tests. In synchronization with the above time, the second PWM signal outputs the test data of each test.

The waveforms of the first PWM signal and the second PWM signal are both displayed on the display unit of the burn-in test device. As shown in FIG. 2 , the waveforms of the chip burn-in test in this embodiment are shown.

Therefore, it can be seen from the waveform diagram that after the setting unit sequentially selects the test items of flash erasing and reading, clock switching, sleep wake-up and starts the test, when the first PWM signal with frequency f1 appears on the display unit, it can be determined that this It is in the flash memory erasing and reading test period, and the second PWM signal output synchronously is the test data of the flash memory erasing and reading test. According to the test data value, it is judged whether the chip's erasing and reading function is abnormal. Among them, the way to judge the abnormality can be: the width (frequency determination) of the PWM signal exceeds the standard range (equivalent to the value of the test data exceeding the standard range, the standard range of each test is different) or the waveform appears during the test Interrupt (equivalent to no data output). When the first PWM signal with frequency f2 appears on the display unit, it can be determined that it is in the clock switching function test period, and the second PWM signal output synchronously is the test data of the clock switching function test. According to the test data Determine whether the clock switching function of the chip is abnormal. When the first PWM signal with a frequency of f3 appears on the display unit, it can be determined that it is in the sleep-wake-up function test period, and the second PWM signal output synchronously is the test data of the sleep-wake-up function test. According to the test data Determine whether the chip's sleep wake-up function is abnormal. When the first PWM signal no longer appears on the display unit, it can be determined that the burn-in test has stopped running.

Optionally, during one test item, it is also possible to define a first PWM signal outputting multiple frequencies, for example, a specified frequency combination that is different from other test items.

Optionally, the above-mentioned aging test environment may be a high and low temperature aging test, a light aging test, a damp heat cycle test, or a hot air aging test.

Optionally, the above test item may also be a reset test or a power-off restart test.

Optionally, the above-mentioned integrated circuit chip for performing the burn-in test may be one or multiple. If there are multiple chips, the items to be tested for each chip are independent of each other, and the definitions of the control programs are also independent of each other (that is, the test items between the chips and the corresponding relationship between the test items and the frequency of the first PWM signal can be the same, or different), and the setting unit of the burn-in test device can independently set the test items and sequence of each chip, and the display unit displays multiple groups of the first PWM signal and the second PWM signal waveforms corresponding to the above chips, so that the corresponding The waveform diagram of the group reads out the test results of each chip.

This embodiment also provides an integrated circuit chip, which includes a controller, a timer, and the above-mentioned control program running on the controller.

Optionally, the above-mentioned integrated circuit chip may be an MCU chip (Microcontroller Unit; micro control unit), a DSP chip (Digital Signal Processing, digital signal processing) or an MPU chip (Microprocessor Unit, micro processing unit).

The beneficial effect of the burn-in test system or integrated circuit chip provided by this embodiment is that, through software definition, the frequencies corresponding to each test item on the first PWM signal are different, so that the first PWM signal can be easily real-time based on the waveform of the first PWM signal. Determine which test the chip is in, and then combine the synchronously output second PWM signal waveform data to obtain the test results of each test, so that it can be clearly known which test is abnormal. In addition, the software-defined approach also makes the structure simpler.

Embodiment 2

As shown in FIG. 3 , a flowchart of an aging test method convenient for real-time monitoring provided in this embodiment. The aging test method includes:

Step S1: Initialize the MCU, define the control program of the integrated circuit chip according to the aging test item to be carried out, and make the program run on the controller of the integrated circuit chip to control the first channel and the second channel of the timer to output the first channel and the second channel respectively. A PWM signal and a second PWM signal, and the first PWM signal corresponds to different frequencies under different aging test items, and the second PWM signal synchronously outputs the data of each aging test.

Step S2: Mount the integrated circuit chip defined by the control program on the chip mounting unit of the burn-in test device.

Step S3: Select the above-mentioned aging test items and sequence to be performed on the aging test device, and start the test.

Step S4: observe the first PWM signal waveform displayed on the display unit, and determine the ongoing test item.

Step S5: observe the second PWM signal of the corresponding stage of the synchronous output, read out the test data value, and judge whether the test of the chip is abnormal according to the test data value.

Specifically, one of the embodiments of the above process is that the items to be subjected to the burn-in test are flash memory erasing and reading, clock switching, and sleep-wake-up tests.

In step S1, the control program is defined as: during the flash memory erasing and reading test, the first PWM signal outputs the waveform of the first frequency f1; during the clock switching function test, the first PWM signal outputs the waveform of the second frequency f2 at this time. ; During the sleep-wake-up function test, the first PWM signal outputs the waveform of the third frequency f3; in addition, the first PWM signal is no longer output during the interval of each test or during the start or end of all tests. In synchronization with the above time, the second PWM signal outputs the test data of each test.

In step S2, the integrated circuit chip that has undergone the above step S1 is mounted on the chip mounting unit of the burn-in test device, so that the pins of the integrated circuit chip and the chip mounting unit are connected in communication.

In step S3, the flash memory erasing and reading, clock switching, and sleep wake-up tests are sequentially selected from the setting unit of the burn-in test device, and then the test is started.

In steps S4 and S5, when the first PWM signal with the frequency f1 appears on the display unit, it can be determined that the flash memory erasing and reading test period is at this time, and the second PWM signal output synchronously is the flash memory erasing and reading test. According to the test data value, it is judged whether the chip's erasing and reading function is abnormal. Among them, the way to judge the abnormality can be: the width (frequency determination) of the PWM signal exceeds the standard range (equivalent to the value of the test data exceeding the standard range, the standard range of each test is different) or the waveform appears during the test Interrupt (equivalent to no data output). When the first PWM signal with frequency f2 appears on the display unit, it can be determined that it is in the clock switching function test period, and the second PWM signal output synchronously is the test data of the clock switching function test. According to the test data Determine whether the clock switching function of the chip is abnormal. When the first PWM signal with a frequency of f3 appears on the display unit, it can be determined that it is in the sleep-wake-up function test period, and the second PWM signal output synchronously is the test data of the sleep-wake-up function test. According to the test data Determine whether the sleep wake-up function of the chip is abnormal. And when the first PWM signal no longer appears on the display unit, it can be determined that the burn-in test has stopped running.

Optionally, during one test item, it is also possible to define a first PWM signal outputting multiple frequencies, for example, a specified frequency combination that is different from other test items.

Optionally, the above-mentioned aging test environment may be a high and low temperature aging test, a light aging test, a damp heat cycle test, or a hot air aging test.

Optionally, the above test item may also be a reset test or a power-off restart test.

Optionally, the above-mentioned integrated circuit chip for performing the burn-in test may be one or multiple. If there are multiple chips, the items to be tested for each chip are independent of each other, and the definitions of the control programs are also independent of each other (that is, the test items between the chips and the corresponding relationship between the test items and the frequency of the first PWM signal can be the same, or different), and the setting unit of the burn-in test device can independently set the test items and sequence of each chip, and the display unit displays multiple groups of the first PWM signal and the second PWM signal waveforms corresponding to the above chips, so that the corresponding The waveform diagram of the group reads out the test results of each chip.

Optionally, the above-mentioned integrated circuit chip may be an MCU chip (Microcontroller Unit; micro control unit), a DSP chip (Digital Signal Processing, digital signal processing) or an MPU chip (Microprocessor Unit, micro processing unit).

The beneficial effect of the aging test method provided by this embodiment is that, through software definition, the frequencies corresponding to each test item on the first PWM signal are different, so that the chip can be easily determined in real time according to the waveform of the first PWM signal. test, and then combined with the synchronously output second PWM signal waveform data to obtain the test results of each test, so that it can be clearly known which test has an abnormality. In addition, the software-defined approach also makes the structure simpler.

The above are only the preferred specific embodiments of the present application, but the protection scope of the present application is not limited to this. Substitutions should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims (8)

1. An integrated circuit chip comprises a timer, a controller and a control program running on the controller; the integrated circuit chip is used for aging test, and is characterized in that:

the controller controls the timer to output a first PWM signal representing a burn-in test item and a second PWM signal synchronized with the first PWM signal and representing test data based on the operation of the control program;

the control program is defined to output the first PWM signal having different frequencies based on different burn-in test items;

the control program is defined as: each test item corresponds to a first PWM signal with one frequency;

the first PWM signal is used for determining a test item in which the integrated circuit chip is positioned, and the second PWM signal is used for representing a test result of the test item in which the integrated circuit chip is positioned.

2. The integrated circuit chip of claim 1, wherein the burn-in test items comprise at least one of a flash read-write function test, a clock switching function test, a sleep wake-up function test, a reset function test, and a power-down restart function test.

3. An integrated circuit chip according to claim 1 or 2, wherein the integrated circuit chip is an MCU or a DSP or MPU.

4. A aging test method convenient for real-time monitoring is characterized by comprising the following steps:

initializing an integrated circuit chip controller, defining a control program running in the controller according to the requirements of aging test items to control a timer to output a first PWM signal and a second PWM signal, wherein the first PWM signal corresponds to different frequencies under different aging test items, and the second PWM signal synchronously outputs data of each aging test item;

installing an aging test device on the integrated circuit chip which is defined by the control program;

selecting the aging test items and the sequence on an aging test device, and starting testing;

observing the frequency of the displayed first PWM signal waveform, and determining an ongoing test item;

observing the second PWM signal which is synchronously output, reading out a test data value, and judging whether the test of the chip is abnormal;

the control program is defined as: each of the test items corresponds to a first PWM signal with one frequency;

the first PWM signal is used for determining a test item in which the integrated circuit chip is positioned, and the second PWM signal is used for representing a test result of the test item in which the integrated circuit chip is positioned.

5. The method of claim 4, wherein the burn-in test items comprise a flash read-write function test or a clock switching function test or a sleep wake-up function test or a reset function test or a power-down restart function test.

6. An aging test system convenient for real-time monitoring, comprising:

an integrated circuit chip as claimed in claim 1 or 2 to be subjected to burn-in testing; and

the aging test device is used for performing aging test on the integrated circuit chip and comprises a chip mounting unit which is used for being connected with pins of the integrated circuit chip; the display unit is used for displaying the output signal waveform of the integrated circuit chip; the aging test system also comprises a setting unit used for selecting the aging test items and the sequence to be performed according to the requirements.

7. The system of claim 6, comprising a plurality of integrated circuit chips, wherein the definition of the control program and the setting of the test items in each integrated circuit chip are independent of each other, and wherein a plurality of sets of the first PWM and second PWM signal waveforms corresponding to the plurality of integrated circuit chips are displayed on the display unit.

8. The system of claim 6, wherein the test environment of the burn-in test is a high and low temperature burn-in test or a light burn-in test or a thermal-humid cycle test or a hot air burn-in test.

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