CN105319494A - Automatic aging testing device of integrated circuit chip - Google Patents
Automatic aging testing device of integrated circuit chip Download PDFInfo
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- CN105319494A CN105319494A CN201410687122.2A CN201410687122A CN105319494A CN 105319494 A CN105319494 A CN 105319494A CN 201410687122 A CN201410687122 A CN 201410687122A CN 105319494 A CN105319494 A CN 105319494A
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Abstract
The present invention provides an automatic aging testing device of an integrated circuit chip, and relates to the field of the integrated circuit test and the reliability assessment test. One implementation model provided by the invention comprises a driving module and a testing module disposed on the same test board. The driving module includes a restoration module, a clock signal module and a memory module. A plurality of testing units is arranged in order on the testing module, and each testing unit includes a chip stand configured to dispose a chip to be tested and a status display lamp. A power module on the driving module is configured to supply power for the restoration module, the clock signal module and the memory module, and the restoration module, the clock signal module, the memory module and the power module are respectively connected with each unit on the testing module. The restoration module and the clock signal module are connected with the memory module. The driving module is configured to automatically drive chips on the testing module to complete the aging testing process. The automatic aging testing device of an integrated circuit chip is able to test and verify chips in real time without an automatic tester, and has the advantages of saved cost, efficiency and accuracy.
Description
Technical field
The present invention relates to integrated circuit testing, Reliability Check field tests, especially for the burn-in screen test of integrated circuit and the device of reliability burn-in test.
Background technology
Along with the continuous increase of integrated circuit integrated level, the continuous expansion in Application of integrated circuit field, the more diversified of integrate circuit function, the functional performance screening of integrated circuit (IC) chip and reliability testing more and more come into one's own, and the technology innovation of integrated circuit (IC) design company on test screen and reliability and cost also more and more come into one's own.According to statistics, the cost of integrated circuit on test screen and reliability testing accounts for about 10% of integrated circuit (IC) chip cost, and along with the complexity of integrated circuit promotes, this cost also can increase.Aging of integrated circuit filler test and reliability burn-in test are the maximum test item of time, resources costs in integrated circuit filler test and reliability testing.
In prior art, aging of integrated circuit filler test and reliability burn-in test is more have employed tested chip and be positioned in ageing oven, ageing test box itself or outside auto testing instrument carry out burn-in test by the interface of ageing test box to chip.After burn-in test completes, take out chip and carry out result reading or other tests.Above-mentioned conventional test methodologies needs price auto testing instrument costly and the ageing oven of ageing oven or tape test function, and shortcoming is that cost is higher, and if tester carry out ageing results checking in real time time cost expense can be caused larger.
Summary of the invention
For above-mentioned the deficiencies in the prior art, the object of this invention is to provide a kind of integrated circuit (IC) chip automatic aging proving installation.It just can complete test and checking to chip in real time without the need to using auto testing instrument, have cost-saving and efficiently, feature accurately.
In order to reach foregoing invention object, technical scheme of the present invention realizes in the following two kinds mode:
A kind of integrated circuit (IC) chip automatic aging proving installation, its design feature is, it comprises and is placed in driving template on same test board and test template.Template is driven to comprise reseting module, clock signal module and memory module.The numerous test cell of proper alignment on test template, each test cell comprises respectively the chip carrier and state display lamp of placing chip to be measured.Drive the power module in template to power to reseting module, clock signal module and memory module respectively, reseting module, clock signal module, memory module and power module are connected respectively to each test cell on test template.Reseting module and clock signal model calling are to memory module.Template is driven automatically to drive each chip on test template to complete burn-in test flow process.
A kind of integrated circuit (IC) chip automatic aging proving installation, its design feature is, it comprises driving template and test template.Drive template and test template to communicate with one another respectively by respective interface unit to be connected.Template is driven to comprise reseting module, clock signal module and memory module.The power module in template is driven to power to reseting module, clock signal module and memory module respectively.Reseting module, clock signal module, memory module and power module are connected respectively to the interface unit driven in template.Reseting module and clock signal model calling are to memory module.The numerous test cell of proper alignment on test template, each test cell comprises respectively the chip carrier and state display lamp of placing chip to be measured.Interface unit on test template is connected with each test cell respectively, drives template automatically to drive each chip on test template to complete burn-in test flow process.
The present invention, owing to have employed said structure, is than the advantage of prior art:
1) do not use outside auto testing instrument, save cost.
2) chip testing result does not need to output to tester and verifies, automatically verification is completed by the burn-in test program in memory module, eliminate a large amount of PERCOM peripheral communication time and real-time verification can be accomplished, saved time cost and can monitor test whole process.
3) show different test results by the flicker frequency of state display lamp, monitor the state in chip ageing process in real time, test result is very clear.
4) test board area occupied is less, can use simple ageing oven.
Below in conjunction with the drawings and specific embodiments, the invention will be further described.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of monolithic construction of the present invention;
Fig. 2 is all-in-one-piece automatic aging proving installation in the embodiment of the present invention;
Fig. 3 is the circuit diagram of separated structure of the present invention;
Fig. 4 is discrete automatic aging proving installation in the embodiment of the present invention.
Embodiment
Embodiment one:
Referring to Fig. 1 and Fig. 2, monoblock type integrated circuit (IC) chip automatic aging proving installation of the present invention comprises and is placed in driving template 1 on same test board and test template 4.Template 1 is driven to comprise reseting module 1.1, clock signal module 1.2 and memory module 1.3.On test template 4, the numerous test cell 6 of proper alignment, each test cell 6 comprises the chip carrier 6.1 placing chip to be measured and state display lamp 6.2 respectively.Drive the power module 1.4 in template 1 to power to reseting module 1.1, clock signal module 1.2 and memory module 1.3 respectively, reseting module 1.1, clock signal module 1.2, memory module 1.3 and power module 1.4 are connected respectively to each test cell 6 on test template 4.Reseting module 1.1 and clock signal module 1.2 are connected to memory module 1.3.Template 1 is driven automatically to drive each chip on test template 4 to complete burn-in test flow process.
Embodiment two:
Referring to Fig. 3 and Fig. 4, discrete integrated circuit (IC) chip automatic aging proving installation of the present invention comprises driving template 1 and test template 4.Drive template 1 and test template 4 to communicate with one another respectively by respective interface unit 5 to be connected.Template 1 is driven to comprise reseting module 1.1, clock signal module 1.2 and memory module 1.3.The power module 1.4 in template 1 is driven to power to reseting module 1.1, clock signal module 1.2 and memory module 1.3 respectively.Reseting module 1.1, clock signal module 1.2, memory module 1.3 and power module 1.4 are connected respectively to the interface unit 5 driven in template 1.Reseting module 1.1 and clock signal module 1.2 are connected to memory module 1.3.On test template 4, the numerous test cell 6 of proper alignment, each test cell 6 comprises the chip carrier 6.1 placing chip to be measured and state display lamp 6.2 respectively, and the interface unit 5 on test template 4 is connected with each test cell 6 respectively.Template 1 is driven automatically to drive each chip on test template 4 to complete burn-in test flow process.
Adopt the method for testing step of the invention described above each embodiment automatic aging proving installation as follows:
1) automatic aging test procedure is downloaded in the memory module 1.3 driving template 1.
2) multiple chip to be measured is placed on the chip carrier 6.1 of test template 4.
3) if the device adopted is monoblock type, then test board is placed in ageing oven; If the device adopted is discrete, then drivings template 1 is placed on that ageing oven is outer, test template 4 is placed in ageing oven, both communicate connected by interface unit 5.
4) drive the power module 1.4 in template 1 to be connected to direct supply, set direct current power source voltage.
5) electrifying DC power supply, power module 1.4 is given respectively and is driven template 1 and test template 4 to power.
6) drive the reseting module 1.1 in template 1 to send reset signal to reset to memory module 1.3.
7) reset after memory module 1.3 according to automatic aging test procedure the time waiting for a certain setting is set after, send aging signal of communication to chip to be measured.
8) test template 4 receives instruction and operates accordingly, and result is outputted to state display lamp 6.2 and glimmer, and result feedback is carried out result verification and record to memory module 1.3 simultaneously.Memory module 1.3 is record burn-in test cycle index automatically, automatically according to the external timing signal record burn-in test time.
9) when reaching the digestion time of setting, memory module 1.3 stops sending aging signal, automatically stops burn-in test, jumps out ageing cycle.
10) according to the flashing state of state display lamp 6.2, judge chip aging all by or other problems.Also all chips can be taken off the ageing test result read in memory module 1.3.
11) according to ageing test result, judge the burn-in screen test of chip or reliability burn-in test by or failure.
Above are only specific embodiments of the invention, those of ordinary skill in the art can have many distortion and change on the basis not departing from the technology of the present invention thinking, and these technical schemes obviously formed are also contained in the technical scope of the present invention's protection.
Claims (2)
1. an integrated circuit (IC) chip automatic aging proving installation, it is characterized in that, it comprises and is placed in driving template (1) on same test board and test template (4), template (1) is driven to comprise reseting module (1.1), clock signal module (1.2) and memory module (1.3), the upper numerous test cell of proper alignment (6) of test template (4), each test cell (6) comprises respectively the chip carrier (6.1) and state display lamp (6.2) of placing chip to be measured, power module (1.4) in driving template (1) gives reseting module (1.1) respectively, clock signal module (1.2) and memory module (1.3) power supply, reseting module (1.1), clock signal module (1.2), memory module (1.3) and power module (1.4) are connected respectively to each test cell (6) on test template (4), reseting module (1.1) and clock signal module (1.2) are connected to memory module (1.3), template (1) is driven automatically to drive each chip on test template (4) to complete burn-in test flow process.
2. an integrated circuit (IC) chip automatic aging proving installation, it is characterized in that, it comprises driving template (1) and test template (4), drive template (1) and test template (4) to communicate with one another respectively by respective interface unit (5) to be connected, template (1) is driven to comprise reseting module (1.1), clock signal module (1.2) and memory module (1.3), power module (1.4) in driving template (1) gives reseting module (1.1) respectively, clock signal module (1.2) and memory module (1.3) power supply, reseting module (1.1), clock signal module (1.2), memory module (1.3) and power module (1.4) are connected respectively to the interface unit (5) driven in template (1), reseting module (1.1) and clock signal module (1.2) are connected to memory module (1.3), the upper numerous test cell of proper alignment (6) of test template (4), each test cell (6) comprises respectively the chip carrier (6.1) and state display lamp (6.2) of placing chip to be measured, interface unit (5) on test template (4) is connected with each test cell (6) respectively, template (1) is driven automatically to drive each chip on test template (4) to complete burn-in test flow process.
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| CN201410687122.2A CN105319494A (en) | 2014-11-26 | 2014-11-26 | Automatic aging testing device of integrated circuit chip |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106383304A (en) * | 2016-10-24 | 2017-02-08 | 上海华力微电子有限公司 | Aging test board |
| WO2018227475A1 (en) * | 2017-06-15 | 2018-12-20 | 深圳市汇顶科技股份有限公司 | Fingerprint chip detection method, device and system |
| CN109633406A (en) * | 2018-11-27 | 2019-04-16 | 珠海欧比特宇航科技股份有限公司 | A kind of chip life-span test system and its chip detecting method |
| CN112816850A (en) * | 2020-12-29 | 2021-05-18 | 珠海极海半导体有限公司 | Aging test system and method convenient for real-time monitoring and integrated circuit chip |
| CN113049939A (en) * | 2019-12-27 | 2021-06-29 | 中移物联网有限公司 | Chip aging self-testing method and system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106383304A (en) * | 2016-10-24 | 2017-02-08 | 上海华力微电子有限公司 | Aging test board |
| WO2018227475A1 (en) * | 2017-06-15 | 2018-12-20 | 深圳市汇顶科技股份有限公司 | Fingerprint chip detection method, device and system |
| CN109633406A (en) * | 2018-11-27 | 2019-04-16 | 珠海欧比特宇航科技股份有限公司 | A kind of chip life-span test system and its chip detecting method |
| CN113049939A (en) * | 2019-12-27 | 2021-06-29 | 中移物联网有限公司 | Chip aging self-testing method and system |
| CN112816850A (en) * | 2020-12-29 | 2021-05-18 | 珠海极海半导体有限公司 | Aging test system and method convenient for real-time monitoring and integrated circuit chip |
| CN112816850B (en) * | 2020-12-29 | 2022-06-17 | 珠海极海半导体有限公司 | Aging test system and method convenient for real-time monitoring and integrated circuit chip |
| CN114839505A (en) * | 2020-12-29 | 2022-08-02 | 珠海极海半导体有限公司 | Aging test device for MCU chip and integrated circuit chip |
| CN114839505B (en) * | 2020-12-29 | 2023-09-19 | 珠海极海半导体有限公司 | Aging test device for MCU chip and integrated circuit chip |
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