CN201096847Y - A chip aging testing system - Google Patents

A chip aging testing system Download PDF

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Publication number
CN201096847Y
CN201096847Y CNU2007201224039U CN200720122403U CN201096847Y CN 201096847 Y CN201096847 Y CN 201096847Y CN U2007201224039 U CNU2007201224039 U CN U2007201224039U CN 200720122403 U CN200720122403 U CN 200720122403U CN 201096847 Y CN201096847 Y CN 201096847Y
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CN
China
Prior art keywords
circuit
chip
microcontroller
aging testing
control circuit
Prior art date
Application number
CNU2007201224039U
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Chinese (zh)
Inventor
黄林
朱祥
Original Assignee
比亚迪股份有限公司
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Priority to CNU2007201224039U priority Critical patent/CN201096847Y/en
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Publication of CN201096847Y publication Critical patent/CN201096847Y/en

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Abstract

The utility model is applicable for the chip-testing field, which provides a chip aging test system. The system comprises a microcontroller, and an input control circuit, a voltage source control circuit, a signal detection circuit and a memory that are in electric connection with the micro controller. In the utility model, the make-and-break of the voltage of the voltage source circuit is controlled under the control of the microcontroller, thus a testing environment that the chip continuously experiences the power-down and power-up processes within a short period of time is provided for the aging testing of chips. The chip aging testing data is detected through the signal detection circuit. Through the analysis of the test data, the aging properties of chips can be obtained. Therefore, the service life of chips can be acquired.

Description

A kind of chip aging testing system
Technical field
The utility model belongs to the chip testing field, relates in particular to a kind of chip aging testing system.
Background technology
In the use of chip, LCD chip for driving (being also referred to as LCD Driver) etc. for example because this kind chip needs constantly experience to power on and the state of power down substitutes, in the course of time, can make chip aging, thereby consequence such as inefficacy takes place.Impact number of times for powering on of can bearing of test chip and power down, to obtain the serviceable life of chip, being necessary to provide a kind of can allow chip power on fast and the test macro of (be several seconds interval time) is impacted in power down, for the chip burn-in test provides one to allow the test environment of chip quick aging, thereby test out the ageing properties of chip.
The utility model content
The purpose of this utility model is to provide a kind of chip aging testing system, is intended to solve that prior art exists owing to be difficult to the ageing properties of test chip, and can't learns the problem in the serviceable life of chip.
The utility model is to realize like this, a kind of chip aging testing system, described system comprises microcontroller, and the input control circuit, voltage control circuit, signal deteching circuit and the storer that are electrically connected with described microcontroller, and the voltage source circuit that is electrically connected with described voltage control circuit, described input control circuit is to the pattern steering order of described microcontroller input test parameter and described microcontroller; Described microcontroller is controlled the output voltage of described voltage source circuit by described voltage control circuit according to described test parameter; The test data that described signal deteching circuit collection produces according to the output voltage of described voltage source circuit, and described test data is stored to described storer by described microcontroller.
In the utility model, voltage control circuit is under the control of microcontroller, the switching of control voltage source circuit output, the size of voltage source signal in the regulation voltage source circuit simultaneously, make chip at short notice constantly experience power on and the process of power down, thereby provide a test environment for the burn-in test of chip, signal deteching circuit detects this chip burn-in test data, by this test data is analyzed, can obtain the ageing properties of chip, thereby obtain the physical life of chip.
Description of drawings
Fig. 1 is the block scheme of the aging testing system of the chip that provides of the utility model;
Fig. 2 is the electrical connection schematic diagram of the aging testing system of the chip that provides of the utility model.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
In utility model, under the control of microcontroller, according to the test parameter that is provided with, make chip constantly experience the process that powers on power down, thereby provide one to make the aging rapidly test environment of chip, the chip aging testing system that provides by the utility model can test out the ageing properties of chip.
Fig. 1 shows the square frame of the aging testing system of the chip that the utility model provides and forms, and for convenience of explanation, only shows the part relevant with the utility model.
The output terminal of input control circuit 10 is electrically connected with the input end of microcontroller 20, in order to the required supplemental characteristic of microcontroller 20 transmission chip burn-in tests, and the mode of operation of control microcontroller 20.Input control circuit 10 comprises input port, input signal Acquisition Circuit and filtering circuit, the interface that input port provides the input signal Acquisition Circuit to be connected with the button of chip aging testing system shell, by input port, the input signal Acquisition Circuit can be gathered the user by the supplemental characteristic of button input and the mode of operation steering order of microcontroller 20.Filtering circuit carries out Filtering Processing to the supplemental characteristic of gathering.The required supplemental characteristic of its chips burn-in test comprises last piezoelectric voltage, chip power retention time and the chip power down retention time of chip.
Microcontroller 20 is electrically connected with input control circuit 10, voltage control circuit 30, signal deteching circuit 50, storer 60, display driver circuit 70 and transmission control circuit 80 respectively, allocates control in order to the work to the foregoing circuit unit of chip aging testing system.Microcontroller 20 is adjusted into the mode of operation corresponding with this mode of operation steering order according to the mode of operation steering order of input control circuit 10 transmission with its mode of operation.Again according to the required supplemental characteristic of chip burn-in test of input control circuit 10 transmission, the circuit state of regulation voltage source control circuit 30, and read the test data of gathering in the signal deteching circuit 50, this test data is stored to storer 60.
The input end of voltage control circuit 30 is electrically connected with the output terminal of microcontroller 20, and its output terminal is electrically connected with the input end of voltage source circuit 40.Microcontroller 20 changes the output voltage of voltage source circuit 40 by the circuit state of regulation voltage source control circuit 30.Voltage source circuit 40 is in order to provide the chip burn-in test required operating voltage, and its output terminal is electrically connected with the input end of signal deteching circuit 50, and the voltage output of this voltage source circuit 40 can change by the adjusting of external circuit.
The input end of signal deteching circuit 50 is electrically connected with the output terminal of voltage source circuit 40, and its output terminal is electrically connected with the input end of microcontroller 20.Signal deteching circuit 50 collecting test data, and the test data of gathering transferred to microcontroller 20.
The input end of display driver circuit 70 is electrically connected with the output terminal of microcontroller 20, its under the control of microcontroller 20, the duty of display chip aging testing system.
Transmission control circuit 80 is carriers that the chip aging testing system is connected with PC, and it is connected the chip aging testing system by the RS232 serial ports with PC, in order to the test data in the storer 60 is uploaded.
Fig. 2 shows the electrical connection principle of the aging testing system of the chip that the utility model provides, and is example with LCD chip for driving burn-in test in the utility model, describes.
Single-chip microcomputer is corresponding with microcontroller 20 shown in Figure 1; Digitial controller constitutes voltage control circuit 30 shown in Figure 1, and this digital regulation resistance is a Nonvolatile digital potentiometer; Voltage source is corresponding with voltage source circuit 40 shown in Figure 1, and the output voltage of this voltage source can change by the adjusting of external circuit (as voltage control circuit); Signal sample circuit, signal amplification circuit and A/D convertor circuit constitute signal deteching circuit 50 shown in Figure 1; Storer 60 shown in Figure 1 adopts the FLSAH storer; The LCD driving circuit is corresponding with LCD driving display circuit 70 shown in Figure 1; RS232 transmission control circuit and RS232 interface constitute transmission control circuit 80 shown in Figure 1.
Below the principle of work of chip aging testing system that the utility model is provided be elaborated.
After the energising of chip aging testing system, single-chip microcomputer at first carries out the initialization setting, as himself buffer status is set, empty spaces such as inner counter and RAM, simultaneously, single-chip microcomputer shows " initially " state by control signals such as its R/W, CS control LCD driving circuit, by the control of its CTRL control signal to digital regulation resistance, the ENABLE of digital regulation resistance being output as " 0 ", is 0V thereby make the output voltage of voltage source.Initialization after setting completed, the chip aging testing system is waited for the input control of the button of input control circuit, carries out the setting of working state of system.
The user is by button operation, can select the mode of operation of system to be set to " test job " pattern or " data transmission " pattern.As when button 1 is pressed, the chip aging testing system is in " test job " pattern, and at this moment, Single-chip Controlling LCD driving circuit shows the status indicator of " TEST MODE " in real time; When button 2 was pressed, the chip aging testing system was in " data transmission " pattern, and at this moment, Single-chip Controlling LCD display driver circuit shows the status indicator of " DATA TRANSFER " in real time.
When the chip aging testing system is in " test job " pattern, at first test the setting of desired parameters.Wherein testing desired parameters comprises piezoelectric voltage, powers on retention time and down electric retention time.The user can be by " adding " or " subtracting " button that is connected with input control circuit, the size of the last piezoelectric voltage when the chip aging testing system being set carrying out test job, powers on retention time and power down retention time.
After setting up the test parameter of chip aging testing system, press " beginning " button that is connected with input control circuit, the chip aging testing system begins to test.Its testing process (being powering on and the power down process of chip aging testing system) is as described below:
Single-chip microcomputer is regulated its state according to the last piezoelectric voltage that the user is provided with by CTRL control signal control figure potentiometer, thereby makes the last piezoelectric voltage of output voltage for being provided with of voltage source, and the chip aging testing system begins to power on.Digital regulation resistance under the control of single-chip microcomputer, the voltage in regulation voltage source output, thus under the control of single-chip microcomputer, can realize adjusting to the voltage source signal size of the switching control of voltage source output or voltage source by digital regulation resistance.Do not stop in the utility model to power on to satisfy, descend the parameter of electricity that demand is set.
The voltage of voltage source output is worked normally in order to drive LCD Driver.Simultaneously, the working current of voltage source by amplifying circuit and AD converter after, its current value is converted into test data, this test data is transferred to single-chip microcomputer simultaneously.Single-chip microcomputer stores this test data in the FLASH storer into.After the process retention time that powers on of above-mentioned setting, the chip aging testing system begins power down, single-chip microcomputer is " 0 " by the ENABLE control signal of CTRL control signal control figure potentiometer, is 0 thereby make the output voltage of voltage source, makes test enter power-down state.After the process power down retention time of above-mentioned setting, the chip aging testing system restarts to power on, make that the circulation of this chip aging testing system is carried out above-mentionedly powering on repeatedly, the power down process, and the test data that single-chip microcomputer is obtained by current conversion when constantly the chip aging testing system being powered on is stored in the FLASH storer.After the volume write of this FLASH storer is full, perhaps by the calculating of single-chip microcomputer, detect electric current in the test mode and occur when unusual test data, the test of chip aging testing system is promptly finished.
In the test process of chip aging testing system, the LCD display driver circuit is the state of display chip aging testing system work in real time then, and for example certain is " powering on " or " power down " state constantly, and test job has continued the time how long etc.
When the chip aging testing system is in " data transmission " pattern, the chip aging testing system is connected on the PC by the RS232 serial ports.By pressing " beginning " key, single-chip microcomputer reads the test data of preserving in the FLASH storer, and by serial ports transmission chip, test data is transferred in the PC.By the RS232 serial ports, the chip aging testing system can carry out two-way communication with PC, makes this chip aging testing system can pass through required test parameter and the system works pattern steering order of PC input test.Simultaneously by the application software in the PC, can be to the analysis that converts of this test data, thus obtain test result.The user also can be by the test data of checking that PC is preserved or shown, can check the variation of chip burn-in test process chips electric current, also can analyze and add up this test data, perhaps by simultaneously, test data in the FLASH storer is dumped to PC, avoided the test data quilt test data next time in the FLASH storer to cover.
The chip aging testing system that the utility model provides, voltage control circuit is under the control of microcontroller, output that can the regulation voltage source circuit, thereby can realize adjusting, thereby chip constantly be experienced power on and the process of power down voltage source signal size in the switching control of voltage source circuit output or the voltage source circuit.By output control circuit, the chip aging testing system can carry out two-way communication with PC, makes this chip aging testing system by required test parameter and the system works pattern steering order of PC input test.Can analyze this test data by the application software on the PC simultaneously, draw the ageing properties of tested chip.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection domain of the present utility model.

Claims (7)

1, a kind of chip aging testing system, it is characterized in that, described system comprises microcontroller, and the input control circuit, voltage control circuit, signal deteching circuit and the storer that are electrically connected with described microcontroller, and the voltage source circuit that is electrically connected with described voltage control circuit, described input control circuit is to the pattern steering order of described microcontroller input test parameter and described microcontroller; Described microcontroller is controlled the output voltage of described voltage source circuit by described voltage control circuit according to described test parameter; The test data that described signal deteching circuit collection produces according to the output voltage of described voltage source circuit, and described test data is stored to described storer by described microcontroller.
2, chip aging testing system as claimed in claim 1, it is characterized in that, described system also comprises the transmission control circuit that carries out two-way communication with described microcontroller, and described microcontroller is uploaded to PC by described transmission control circuit with the test data in the described storer.
3, chip aging testing system as claimed in claim 2 is characterized in that, described transmission control circuit comprises RS232 transmission control circuit and RS232 interface.
4, chip aging testing system as claimed in claim 1, it is characterized in that, described system also comprises the driving display circuit that is electrically connected with described microcontroller, and described driving display circuit shows the duty of described chip aging testing system in real time under the control of described microcontroller.
5, chip aging testing system as claimed in claim 1 is characterized in that, described voltage control circuit is a Nonvolatile digital potentiometer.
6, chip aging testing system as claimed in claim 1 is characterized in that, the voltage of described voltage source circuit can change by the adjusting of external circuit.
7, chip aging testing system as claimed in claim 1 is characterized in that, described signal deteching circuit comprises signal sample circuit, signal amplification circuit and A/D convertor circuit.
CNU2007201224039U 2007-08-22 2007-08-22 A chip aging testing system CN201096847Y (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102394111A (en) * 2011-08-03 2012-03-28 珠海天威技术开发有限公司 Method for testing consumable chip
CN103376797A (en) * 2012-04-13 2013-10-30 珠海格力电器股份有限公司 Test device for controller and controller aging experimental box
CN104535874A (en) * 2015-01-16 2015-04-22 三星半导体(中国)研究开发有限公司 Device and method for testing aging of multi-key input function of electronic device
CN104808131A (en) * 2015-04-30 2015-07-29 湖北丹瑞新材料科技有限公司 Aging testing device and aging testing method for chip of nitrogen and oxygen sensor
CN105319495A (en) * 2014-11-26 2016-02-10 北京同方微电子有限公司 Built-in automatic aging testing device of integrated circuit chips
CN105319494A (en) * 2014-11-26 2016-02-10 北京同方微电子有限公司 Automatic aging testing device of integrated circuit chip
CN107466369A (en) * 2017-06-15 2017-12-12 深圳市汇顶科技股份有限公司 Fingerprint chip detecting method, apparatus and system
CN107942237A (en) * 2017-12-28 2018-04-20 天津芯海创科技有限公司 Excitation plate and chip ageing monitoring system

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102394111A (en) * 2011-08-03 2012-03-28 珠海天威技术开发有限公司 Method for testing consumable chip
CN103376797A (en) * 2012-04-13 2013-10-30 珠海格力电器股份有限公司 Test device for controller and controller aging experimental box
CN103376797B (en) * 2012-04-13 2016-02-24 珠海格力电器股份有限公司 The proving installation of controller and controller senile experiment case
CN105319495A (en) * 2014-11-26 2016-02-10 北京同方微电子有限公司 Built-in automatic aging testing device of integrated circuit chips
CN105319494A (en) * 2014-11-26 2016-02-10 北京同方微电子有限公司 Automatic aging testing device of integrated circuit chip
CN104535874A (en) * 2015-01-16 2015-04-22 三星半导体(中国)研究开发有限公司 Device and method for testing aging of multi-key input function of electronic device
CN104535874B (en) * 2015-01-16 2018-03-20 三星半导体(中国)研究开发有限公司 The ageing tester and method of the more key-press inputs of electronic equipment
CN104808131A (en) * 2015-04-30 2015-07-29 湖北丹瑞新材料科技有限公司 Aging testing device and aging testing method for chip of nitrogen and oxygen sensor
CN107466369A (en) * 2017-06-15 2017-12-12 深圳市汇顶科技股份有限公司 Fingerprint chip detecting method, apparatus and system
WO2018227475A1 (en) * 2017-06-15 2018-12-20 深圳市汇顶科技股份有限公司 Fingerprint chip detection method, device and system
CN107942237A (en) * 2017-12-28 2018-04-20 天津芯海创科技有限公司 Excitation plate and chip ageing monitoring system

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C14 Grant of patent or utility model
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080806

Termination date: 20150822

EXPY Termination of patent right or utility model