CN112767839B

CN112767839B - Display panel and display device

Info

Publication number: CN112767839B
Application number: CN202110129372.4A
Authority: CN
Inventors: 秦旭; 常苗; 张露; 胡思明
Original assignee: Kunshan Govisionox Optoelectronics Co Ltd
Current assignee: Kunshan Govisionox Optoelectronics Co Ltd
Priority date: 2021-01-29
Filing date: 2021-01-29
Publication date: 2022-08-19
Anticipated expiration: 2041-01-29
Also published as: CN112767839A

Abstract

The application provides a display panel and display device, has solved the problem that the pixel density of the transparent region of full face screen is difficult to promote among the prior art. The display panel comprises a first display area, the first display area comprises a plurality of first light-emitting units which are arranged along a first direction, and a first pixel driving circuit for driving the first light-emitting units is arranged outside the first display area; the display panel has a wiring layer, and the first pixel driving circuit is electrically connected to the first light emitting unit through a wire in the wiring layer. Each wire comprises a first via hole connection area electrically connected with the first light-emitting unit through a via hole, and the width of the first via hole connection area is larger than the line width of the wire; and in the wiring layer, the first via connection areas of the at least two wires are arranged in a staggered mode in the first direction.

Description

Display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a display panel and display equipment.

Background

In the display field, in order to meet the current consumption demand, the idea of a full screen is brought forward. In order to realize a real full-face screen, one of the ideas is to arrange a transparent area in a display screen, wherein the transparent area has a display function and has higher light transmittance than a conventional display area, so that photosensitive elements such as a camera can be arranged below the transparent area without influencing the function realization of the photosensitive elements, and further the real full-face screen is realized. However, due to the limitation of engineering capability, on the premise that the area of the transparent area is fixed, more pixels are difficult to arrange, and the increase of the pixel density of the transparent area is greatly limited.

Content of application

In view of the above, embodiments of the present application are directed to providing a display panel and a display device to solve the problem that the pixel density of the transparent area of the full-screen is difficult to increase in the prior art.

A first aspect of the present application provides a display panel, including a first display area, where the first display area includes a plurality of first light emitting units arranged along a first direction, and a first pixel driving circuit configured to drive the first light emitting units is disposed outside the first display area; the display panel has a wiring layer, and the first pixel driving circuit is electrically connected to the first light emitting unit through a wire in the wiring layer. The wire comprises a first via hole connecting area which is electrically connected with the first light-emitting unit through a via hole, and the width of the first via hole connecting area is greater than the line width of the wire; and in the wiring layer, the first via connection areas of the at least two wires are arranged in a staggered mode in the first direction.

In one possible implementation, the wiring layer includes a plurality of wires arranged in parallel along a first direction, and a gap is formed between adjacent wires.

In a possible implementation manner, the first display area includes a plurality of first pixel units, and the first pixel units include a plurality of first light-emitting units; the first light emitting unit is selected from one of a pixel unit red light emitting unit, a pixel unit green light emitting unit, a pixel unit white light emitting unit and a pixel unit blue light emitting unit; the first pixel units are arranged in a second direction forming a preset included angle with the first direction; preferably, the predetermined included angle is 90 degrees.

In one possible implementation manner, the direction of the conducting wire electrically connected with each first light-emitting unit of the same first pixel unit is parallel to the second direction, and a plurality of conducting wires respectively electrically connected with a plurality of first light-emitting units in the same pixel unit are arranged along the first direction; preferably, the arrangement of the first light emitting units in the first pixel unit is selected from one of an RGB arrangement, a pentile arrangement, and a delta arrangement.

In a possible implementation manner, the first light emitting unit includes a first electrode, the first electrode includes a second via connection region, and the first light emitting unit is connected to the via hole through the second via connection region on the first electrode. Preferably, the projection distance of the second via hole connection areas of two adjacent first light-emitting units in the same pixel unit in the second direction is an integral multiple of the line width; and/or the projected pitches of the second via connection areas of two adjacent first light-emitting units in the same pixel unit in the second direction are equal.

In one possible implementation, the orthographic edge of the via on the routing layer and the edge of the first via landed region are spaced a predetermined distance.

In one possible implementation, the first via connection region is circular, and the via is a rectangular hole or a circular hole.

In one possible implementation manner, the first pixel unit further includes a plurality of dummy light emitting units that are not conductive to the wires in the wiring layer, and the dummy light emitting units are located between two first light emitting units or between the first light emitting units and the dummy light emitting units, so that the plurality of first light emitting units are spaced from each other.

In one possible implementation, the display panel further includes a transition display area at least partially enclosed outside the first display area and a second display area at least partially surrounding the transition display area; the first pixel driving circuit is located in the transition display area, the second display area and/or the transition display area comprise a plurality of second light-emitting units, the second light-emitting units form second pixel units, and the arrangement of the second pixel units is the same as that of the first light-emitting units in the first display area.

A second aspect of the present application provides a display device including the display panel provided in any one of the above embodiments.

According to the display panel that this application provided, through the position relation of the first via hole joining region on the many wires of reasonable setting, can reduce the area occupied of many wires. This has the advantage that, firstly, more conductive lines can be arranged in a predetermined space on the premise that the line width and the line pitch satisfy predetermined requirements, and accordingly, more light emitting units can be arranged in the first display area a, thereby increasing the pixel density of the first display area a. Secondly, on the premise that the pixel density is certain, the line width can be increased, so that the impedance on the conducting wire is reduced, and further the loss is reduced. Thirdly, on the premise of certain pixel density, the line distance can be increased, so that the risk of short circuit among wires is reduced, and the reliability of the system is improved.

Drawings

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention.

FIG. 2 is a view of the edge A of the display panel shown in FIG. 1 ₁ A ₂ The cross-sectional structure of the wire is schematic.

Fig. 3 is a schematic partial structure diagram of a wiring layer in a first display region according to a first embodiment of the present invention.

Fig. 4 is a partial structural view of the wiring layer shown in fig. 2.

Fig. 5 is a schematic partial structure diagram of a wiring layer in a first display region according to a second embodiment of the present invention.

Fig. 6a is a schematic partial structure diagram of an electrode layer according to an embodiment of the invention.

Fig. 6b is a schematic partial structure diagram of an electrode layer according to the second embodiment of the present invention.

Fig. 6c is a schematic view of a partial structure of an electrode layer according to three embodiments of the present invention.

Fig. 6d is a schematic partial structure diagram of an electrode layer according to four embodiments of the present invention.

Fig. 7 is a schematic structural diagram of a first via connection region according to an embodiment of the invention.

Fig. 8 is a schematic partial structure view of an electrode layer of a second display area according to an embodiment of the disclosure.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention. As shown in fig. 1, the display panel 100 includes a first display area a, a second display area D, and a transition display area B located between the first display area a and the second display area D and at least partially surrounding the first display area a. The display panel 100 may be a full-screen display panel, the first display area a and the second display area D both have a display function, and the light transmittance of the first display area a is greater than that of the second display area D, that is, the first display area a is equivalent to a transparent area, and the second display area D is equivalent to a normal display area. The implementation manner that the light transmittance of the first display area a is greater than that of the second display area D includes multiple manners, for example, the pixel density of the first display area a is set to be greater than that of the second display area D; for another example, a via hole is formed at the non-light emitting cell of the first display area a, and a high light transmittance material is filled in the via hole. The high light transmittance material mentioned herein may be a resin, acryl, or the like.

The first display area a may be disposed at any position of the display panel 100. The first display area A is provided with a first light-emitting unit, the transition display area B is provided with a driving circuit, and the first light-emitting unit is connected with the driving circuit through a transparent conducting wire so as to drive the first light-emitting unit to realize a display function. FIG. 2 is a view of the edge A of the display panel shown in FIG. 1 ₁ A ₂ The cross-sectional structure of the wire is schematically shown. As shown in fig. 2, the display panel 100 includes a substrate 111. In one embodiment, the substrate 111 is any one of ultra-thin glass, a metal thin film, and an organic polymer thin film. When the substrate 111 is an organic polymer thin film, the material of the substrate 111 includes polyimide, polyethylene, polypropylene, polystyrene, or the like.

In the transition display region B, a driver circuit is formed over the substrate 111, and the driver circuit is composed of a transistor 12 and a capacitor, and may be, for example, 2T1C, 3T1C, or the like. Specifically, in one embodiment, an active layer 121, a gate insulating layer 112, a first metal layer (including a gate electrode 122 and a first electrode), a first interlayer dielectric layer 113, a second metal layer (including a source/drain electrode 123 and a second electrode), a second interlayer dielectric layer 114, a third metal layer (including a third electrode), and a planarization layer 115 are sequentially disposed on the substrate 111 of the transition display region B. Wherein the first electrode and the second electrode form a first capacitor C ₁ The second electrode and the third electrode form a second capacitor C ₂ The source and drain electrodes 123 are connected to the active layer 121 through the first via 151. The source-drain electrodes 123 referred to herein refer to the source and drain electrodes of the transistor.

In the first display region a, a first light emitting unit 13 is formed on the substrate 111. The first Light Emitting unit 13 may be an Organic Light-Emitting Diode (OLED) or a Quantum dot Light-Emitting Diode (QLED). In one embodiment, the transition display region B includes a common layer extending into the first display region a. In one embodiment, the common layer includes a gate insulating layer 112, a first interlayer dielectric layer 113, a second interlayer dielectric layer 114, a third metal layer (including a third electrode), and a planarization layer 115. In this case, the first display region a includes the wiring layer 14 stacked on the planarization layer 115, and the wiring layer 14 is connected to the source and drain electrodes in the transitional display region B through the second via 152. The insulating layer 116 and the anode layer 131 are sequentially disposed on the wiring layer 14, and the anode layer 131 is connected to the wiring layer 14 through the third via 153. The anode layer 131 is sequentially provided with a light emitting layer 132 and a cathode layer 133. In one embodiment, an encapsulation layer may also be disposed on the cathode layer 133.

Fig. 3 is a schematic partial structure diagram of a wiring layer in a first display area according to a first embodiment of the present invention. Fig. 4 is a partial structural view of the wiring layer shown in fig. 2. As shown in fig. 2, 3, and 4, the wiring layer 14 includes a plurality of conductive lines arranged in parallel along the first direction X. The parallel arrangement of the plurality of wires means that the line distances D between two adjacent wires are equal, namely, the distances between two adjacent wires at any position are equal. Each of the conductive lines includes a first via connection region Q, at which the conductive line is connected to the first light emitting unit 13 through a third via 153. The width L of the first via connection region Q is greater than the line width D of the conductive line. The width L of the first via connection region Q refers to a length of the first via connection region Q in a width direction of the wire. It should be understood that, in this case, in order to implement parallel arrangement of a plurality of wires, at the first via connection region Q of a certain wire, other wires need to provide a space for avoiding the first via connection region Q, so as to ensure that the distance between two adjacent wires at any position is equal.

For example, as shown in fig. 4, the plurality of conductive lines includes a first conductive line 141 and a second conductive line 142 which are adjacently disposed. The first conductive line 141 includes a first via connection region Q. The first conductive line 141 further includes a first straight line segment 1411 and a second straight line segment 1412 on both sides of the first via land Q, the first straight line segment 1411 and the second straight line segment 1412 being collinear. The second wire 142 includes a third straight line segment 1421, an avoidance segment 1422, and a fourth straight line segment 1423 connected in sequence. The first straight line segment 1411 is parallel to the third straight line segment 1421, the second straight line segment 1412 is parallel to the fourth straight line segment 1423, and the avoidance segment 1422 surrounds the first via connection region Q to ensure that the distance between the first via connection region Q and the avoidance segment 1422 is equal everywhere and equal to the distance between the first straight line segment 1411 and the third straight line segment 1421 or between the second straight line segment 1412 and the fourth straight line segment 1423. It should be appreciated that the first via land Q and the bypass segment 1422 are shaped accordingly. For example, when the first via land Q is circular, the escape segment 1422 is arc-shaped; when the first via connection region Q is square, the avoiding section 1422 is zigzag. The shape of the first via hole connection region Q and the avoidance section 1422 is not limited in the present application, as long as the distance between the first via hole connection region Q and the avoidance section 1422 is equal everywhere.

In an actual product, when the requirement for precision is not high, when the first via connection region Q is circular, the avoiding section 1422 may also be a zigzag. In this case, it is sufficient to ensure that the shortest distance between the first via land Q and the escape section 1422 is equal to the line distance D.

For the display panel provided in the above embodiment, in order to improve the production capacity, the first display area a is usually provided with only one wiring layer 14. On the premise of meeting the requirements of line width and line distance, the wiring quantity is difficult to increase due to the limitation of engineering capacity, so that more pixels are difficult to arrange on the premise of ensuring the area of the first display area A, and the pixel density of the first display area A is greatly limited to be improved.

The inventor researches and discovers that one of the reasons for limiting the pixel density increase of the first display area A is as follows: as shown in fig. 2, 3 and 4, there are at least two first via connection regions Q collinear in the first direction X, and the collinear arrangement of the plurality of first via connection regions Q occupies too much space in the first direction X. By properly positioning the first via land Q in the wiring layer 14, space can be saved.

Fig. 5 is a schematic partial structure diagram of a wiring layer in a first display region according to a second embodiment of the present invention. As shown in fig. 5, the wiring layer 24 is different from the wiring layer 14 shown in fig. 3 only in that the wiring layer 24 includes a plurality of conductive lines, and the first via land regions Q of at least two conductive lines of a portion of the conductive lines connected in one-to-one correspondence with the plurality of first light emitting cells 13 arranged in the first direction X in the first display region a are arranged offset in the first direction X, i.e., not collinear. The plurality of wires refers to a plurality of wires arranged in parallel in sequence, and may be a part of or all of the wires in the wiring layer 24. In one embodiment, the wiring layer 24 includes a plurality of repeating units, each repeating unit including a plurality of conductive lines, the first via connection regions Q of the partial conductive lines in each repeating unit being non-collinear in the first direction X.

For example, the plurality of conductive lines 24 in the wiring layer 24 are arranged in parallel in the first direction X, the number of the plurality of conductive lines is 27, the line width D and the line distance D are both 3 micrometers, and the width L of the first via land Q is 10 micrometers. Then in the wiring layer 24 shown in fig. 5, the plurality of wires occupy a space length L in the first direction X ₁ 27 × 3+ (27-1) × 3+ (10-3) ═ 166 micrometers. In the wiring layer 14 shown in fig. 3, the plurality of wires occupy a space length L in the first direction X ₂ 27 × 3+ (27-1) × 3+ (10-3) × 3 ═ 180 micrometers. As can be seen by comparison, the display panel provided according to the present embodiment has a wiring space reduced by 14 μm as compared with the display panel shown in fig. 3.

It should be understood that the present embodiment uses the first via connection regions Q of some wires not being collinear in the first direction X, that is, the first via connection regions Q of some wires being not collinear in the arrangement direction of the plurality of wires, so that the space occupied by the wiring can be minimized. In the practical application process, as long as it is ensured that the first via hole connection regions Q of the partial wires are not collinear, the first via hole connection regions Q are not collinear in which direction, and the first via hole connection regions Q can be reasonably arranged according to actual needs.

According to the display panel provided by the embodiment, the position relation of the first via hole connection region Q on the plurality of wires is reasonably set, so that the occupied area of the plurality of wires can be reduced. This is advantageous in that, firstly, on the premise that the line width and the line pitch satisfy the predetermined requirements, more conductive lines can be arranged in the predetermined space, and accordingly, more first light emitting units 13 can be arranged in the first display area a, thereby increasing the pixel density of the first display area a. Secondly, on the premise that the pixel density is certain, the line width d can be increased, so that the impedance on the conducting wire is reduced, and further the loss is reduced. Thirdly, on the premise of certain pixel density, the line distance D can be increased, so that the risk of short circuit between the wires is reduced, and the reliability of the system is improved.

In one embodiment, the first display area a having the wiring layer shown in fig. 5 includes a number of first pixel units each including a number of first light emitting units 13. The first light emitting unit 13 is one selected from a red light emitting unit, a green light emitting unit, a white light emitting unit, and a blue light emitting unit. The first pixel units are arranged in a second direction Y which forms a preset included angle with the first direction X. Preferably, the preset included angle is 90 degrees. The arrangement of the first light emitting units 13 in each first pixel unit 21 can be reasonably selected according to actual needs. In one embodiment, the arrangement of the first light emitting units in the first pixel unit is selected from one of an RGB arrangement, a pentile arrangement, and a delta arrangement. The arrangement of the first light emitting unit 13 may be modified as necessary according to the display requirements. For example, in the pentile arrangement, the red light emitting unit, the green light emitting unit and the white light emitting unit can be arranged in a trapezoid or other quadrilateral shape; the number of the first light-emitting units 13 in the first pixel unit 21 is not only 3 or 4, but may be more, for example, 6, where there are two red light-emitting units, two green light-emitting units, and two blue light-emitting units, where 1 red light-emitting unit, 1 green light-emitting unit, and 1 blue light-emitting unit form a triangular arrangement (or a delta arrangement), and the arrangement of the two triangles may be set as required, such as a typical diagonal arrangement.

For example, fig. 6a is a schematic partial structure diagram of an electrode layer according to a first embodiment of the present invention. The second column of light-emitting cells in fig. 6a corresponds to the wiring layer shown in fig. 5. As shown in fig. 5 and 6a, the first display area a includes a plurality of first pixel units 21, and each of the first pixel units 21 includes three first light emitting units 13, i.e., a red light emitting unit R, a green light emitting unit G, and a blue light emitting unit B. The first pixel units 21 are arranged in a second direction Y, which forms an angle of 90 degrees with the first direction X.

For another example, fig. 6b is a schematic partial structure diagram of an electrode layer according to a second embodiment of the present invention. As shown in fig. 6b, the first light emitting cells 13 in the first display region a adopt an RGB arrangement. In this case, each first pixel unit 21 includes three first light emitting units 13, that is, a red light emitting unit R, a green light emitting unit G, and a blue light emitting unit B, three first light emitting units 13 in the same pixel unit 21 are arranged in a triangle, a plurality of first pixel units 21 are arranged along a second direction Y, the second direction Y and the first direction X form an included angle of 90 degrees, and vertex angles of two adjacent first pixel units are opposite to each other, for example, a vertex angle of a first pixel unit 21 faces upward, and a vertex angle of a second pixel unit 21 faces downward.

For another example, fig. 6c is a schematic partial structure diagram of an electrode layer according to a third embodiment of the present invention. As shown in fig. 6c, the first light emitting cells 13 in the first display area a adopt an RGBG arrangement. In this case, the first pixel unit 21 includes two kinds, i.e., a red-green pixel unit and a blue-green pixel unit. The red and green pixel units include a red light emitting unit R and a green light emitting unit G. The cyan pixel unit includes a blue light emitting unit B and a green light emitting unit G. The red and green pixel units and the blue and green pixel units are alternately arranged along the second direction Y. The second direction Y forms an included angle of 90 degrees with the first direction X.

For another example, fig. 6d is a schematic partial structure diagram of an electrode layer according to a fourth embodiment of the present invention. As shown in fig. 6d, the first light emitting cells 13 in the first display region a adopt a delta arrangement. In this case, each of the first pixel units 21 includes three first light emitting units 13, i.e., a red light emitting unit R, a green light emitting unit G, and a blue light emitting unit B, and the three first light emitting units 13 in the same pixel unit 21 are arranged in a rectangular shape. Specifically, the blue light-emitting unit B is parallel to a line connecting the red light-emitting unit R and the green light-emitting unit G. The plurality of first pixel units 21 are arranged along a second direction Y, and the second direction Y and the first direction X form an included angle of 90 degrees.

The foregoing embodiments exemplarily illustrate several common arrangements of the first light emitting unit 13, and it should be understood that the wiring layer provided in the embodiments of the present application is also applicable to other arrangements in the prior art, and details are not described herein again.

In one embodiment, the conductive wires electrically connected to each first light emitting unit 13 of the same first pixel unit 21 run parallel to the second direction Y, and the conductive wires electrically connected to the first light emitting units 13 of the same first pixel unit 21 are arranged along the first direction X.

Taking the wiring layer shown in fig. 5 and the electrode layer shown in fig. 6a as an example, the second column of light emitting cells in fig. 6a corresponds to the wiring layer shown in fig. 5, i.e., the first wire 221 is connected to the red light emitting cell R, the second wire 222 is connected to the green light emitting cell G, and the third wire 223 is connected to the blue light emitting cell B. As can be seen from fig. 5 and 6, the wires electrically connected to the three first light emitting units 13, i.e., the red light emitting unit R, the green light emitting unit G, and the blue light emitting unit B, in the same first pixel unit 21 run parallel to the second direction Y, respectively. And, the wires electrically connected to the three first light emitting cells 13, respectively, are arranged in the first direction X.

According to the display panel provided by the embodiment, the arrangement regularity of the plurality of wires in the wiring layer is high, the wiring difficulty is simplified, and the industrial implementation is easy.

In one embodiment, referring to FIG. 6a, the first light emitting unit 13 includes a first electrode, such as an anode 131. The first electrode includes a second via connection region 130, and the first light emitting unit 13 is connected to the third via 153 through the second via connection region 130 on the first electrode. The second via connection regions 130 in the plurality of first light emitting cells are arranged in a staggered manner in the first direction X. For example, with the first direction X as a reference line, the second via hole land 130 of a first light emitting unit is located on the reference line, the second via hole land 130 of a second first light emitting unit is located on the left side of the reference line, and the second via hole land 130 of a third first light emitting unit is located on the right side of the reference line. It should be understood that the second via land 130 may be disposed at any position of the first electrode thereof for one first light emitting cell 13 as long as it is ensured that the second via lands 130 of the plurality of first light emitting cells linearly arranged are not collinear in the first direction X. It is considered that the area of the first electrode of each first light emitting cell 13 is limited, i.e., the selectable position of the second via connection region 130 is limited. When the number of the first light emitting units 13 in the display panel is too large, it is not ensured that the second via connection regions 130 of all the first light emitting units 13 are shifted in the first direction X. In this case, by dividing all the wires into a plurality of repeating units, each repeating unit includes a plurality of wire groups 22, it can be ensured that the second via hole connection regions 130 in the first light emitting units 13 corresponding to some wires in each repeating unit are staggered in the first direction X, the layout difficulty of the second via hole connection regions 130 is reduced, and the implementation is facilitated.

In one embodiment, referring to fig. 6a, the projected distance of the second via connection areas 130 of two adjacent first light emitting units 13 in the same pixel unit 21 in the second direction Y is an integer multiple of the line width d; and/or the projected pitches of the second via connection areas 130 of two adjacent first light-emitting units 13 in the same pixel unit 21 in the second direction Y are equal. The distance between the projections of the second via connection regions 130 in the second direction Y refers to the shortest distance between the edge lines of the projections of the second via connection regions 130. For example, when the projections of the second via connection region 130 are circular, the distance between the projections is the length obtained by subtracting the diameter of the projection from the length of a straight line connecting the centers of the two projections. Thus, the space on the wiring layer 14 can be fully utilized, the situation of non-integral line widths is avoided, and the utilization rate of the wiring space is improved.

Fig. 7 is a schematic structural diagram of a first via connection area according to an embodiment of the present invention. So that the edge of the orthographic projection of the via 23 on the wiring layer and the edge of the first via land Q are spaced apart by a preset distance, i.e., the orthographic projection of the via 23 on the wiring layer falls inside the first via land Q, as shown in fig. 7. The arrangement is to use the first via hole connection area Q to edge the via hole 23, and use the width of the edge to compensate the fluctuation degree of the manufacturing process, so as to ensure that the via hole 23 is not deviated from the first via hole connection area Q even when the manufacturing process is fluctuated, thereby ensuring a reliable electrical connection relation. In one embodiment, the via 23 is a rectangular hole having a side length m of 4 microns. The first via land Q is circular and has a diameter L of 10 microns. That is, the first via land Q has a margin of at least 3 micrometers to the via 23. In one embodiment, the edge of the orthographic projection of the via 23 on the first light emitting unit 13 is spaced a distance from the edge of the second via land 130. The certain distance may also be 3 micrometers.

It should be understood that the shape of the via 23 is not limited in the present application, and may be any shape such as a circle, a polygon, and the like.

In one embodiment, as shown in fig. 6a, the first pixel unit 21 further includes a plurality of dummy light emitting units 16 that are not conductive to the wires in the wiring layer, and the dummy light emitting units 16 are located between two first light emitting units 13 or the first light emitting units 13 and the dummy light emitting units 16 so that the plurality of first light emitting units 13 are spaced apart from each other. The virtual light emitting unit 16 is different from the first light emitting unit 13 only in that the virtual light emitting unit 16 does not include an anode layer in a film structure, so that the virtual light emitting unit 16 does not emit light, which can maximally implement a transparent region using an existing device.

Fig. 8 is a schematic partial structure view of an electrode layer of a second display region according to an embodiment of the disclosure. As shown in fig. 1 and 8, in one embodiment, the display panel further includes a second display region D at least partially surrounding the transitional display region B, the second display region D includes a plurality of second light emitting units 30, the plurality of second light emitting units 30 form a second pixel unit, and the arrangement of the second pixel unit is the same as that of the first pixel unit 21 in the first display region a. I.e. the first display area a is placed on the second display area D, the orthographic projection of the first light emitting units 13 and the virtual units 16 in the first display area a on the second display area D just coincides with the second light emitting units 30. And the color arrangement of the light emitting layers in the first display region a and the second display region D is also the same, that is, the first light emitting unit 13 emitting red light and the first light emitting unit 13 having a red light emitting layer each correspond to the second light emitting unit emitting red light, the first light emitting unit 13 emitting green light and the first light emitting unit 13 having a green light emitting layer each correspond to the second light emitting unit emitting green light, and the first light emitting unit 13 emitting blue light and the first light emitting unit 13 having a blue light emitting layer each correspond to the second light emitting unit emitting blue light. With this arrangement, the light emitting unit layer in the second display region D can be simultaneously manufactured while the first display region a is manufactured, thereby simplifying the process and improving the production efficiency.

In one embodiment, the transitional display area B is also provided with a plurality of second pixel units, and the arrangement of the second pixel units in the transitional display area B is the same as that of the first pixel units in the first display area a.

The application further provides a display device comprising the display panel provided by any one of the above embodiments. The display device can be any terminal product with a display function, such as a notebook computer, a mobile phone, a display, an electronic instrument and the like.

The foregoing description has been presented for purposes of illustration and description. Furthermore, the description is not intended to limit embodiments of the application to the form disclosed herein. While a number of example aspects and embodiments have been discussed above, those of skill in the art will recognize certain variations, modifications, alterations, additions and sub-combinations thereof.

Claims

1. A display panel is characterized by comprising a first display area;

the first display area comprises a plurality of first light-emitting units arranged along a first direction, and a first pixel driving circuit for driving the first light-emitting units is arranged outside the first display area;

the display panel is provided with a wiring layer, and the first pixel driving circuit is electrically connected with the first light-emitting unit through a wire in the wiring layer;

the wire comprises a first via hole connection area which is electrically connected with the first light-emitting unit through a via hole, and the width of the first via hole connection area is greater than the line width of the wire; and in the wiring layer, the first via connection areas of at least two wires are arranged in a staggered manner in the first direction.

2. The display panel according to claim 1, wherein the wiring layer includes a plurality of the conductive lines arranged in parallel in the first direction with a gap between adjacent conductive lines.

3. The display panel according to claim 2, wherein the first display region includes a plurality of first pixel units including a plurality of the first light emitting units, the first light emitting units being selected from one of a red light emitting unit, a green light emitting unit, a white light emitting unit, and a blue light emitting unit; the first pixel units are arranged in a second direction forming a preset included angle with the first direction.

4. The display panel according to claim 3, wherein the predetermined included angle is 90 degrees.

5. The display panel according to claim 3, wherein the conductive lines electrically connected to each of the first light emitting cells of the same first pixel unit run parallel to the second direction, and the plurality of conductive lines electrically connected to the plurality of first light emitting cells in the same pixel unit are arranged along the first direction.

6. The display panel according to claim 5, wherein the arrangement of the first light emitting units in the first pixel unit is selected from one of an RGB arrangement, a pentile arrangement, and a delta arrangement.

7. The display panel according to any one of claims 3 to 6, wherein the first light emitting unit comprises a first electrode comprising a second via connection area, and wherein the first light emitting unit is connected to the via through the second via connection area on the first electrode.

8. The display panel according to claim 7, wherein a pitch of projections of the second via connection areas of two adjacent first light emitting units in the same pixel unit in the second direction is an integer multiple of the line width; and/or

The projection pitches of the second via hole connecting areas of two adjacent first light-emitting units in the same pixel unit in the second direction are equal.

9. The display panel according to any one of claims 1 to 6, wherein an edge of an orthographic projection of the via on the wiring layer and an edge of the first via land are spaced by a predetermined distance.

10. The display panel according to claim 9, wherein the first via connection region is circular, and the via is a rectangular hole or a circular hole.

11. The display panel according to claim 3, wherein the first pixel unit further comprises a plurality of dummy light emitting units that are not conductive to wires in a wiring layer, and the dummy light emitting units are located between two of the first light emitting units or between the first light emitting units and the dummy light emitting units so that the plurality of first light emitting units are spaced apart from each other.

12. The display panel of claim 11, further comprising a transitional display region at least partially enclosed outside the first display region and a second display region at least partially surrounding the transitional display region; the first pixel driving circuit is located in the transition display area, the second display area and/or the transition display area comprise a plurality of second light emitting units, the second light emitting units form second pixel units, and the arrangement of the second pixel units is the same as that of the first pixel units in the first display area.

13. A display device characterized by comprising a display panel as claimed in any one of claims 1 to 12.