CN112750935B - LED chip and manufacturing method thereof - Google Patents
LED chip and manufacturing method thereof Download PDFInfo
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- CN112750935B CN112750935B CN202011626111.5A CN202011626111A CN112750935B CN 112750935 B CN112750935 B CN 112750935B CN 202011626111 A CN202011626111 A CN 202011626111A CN 112750935 B CN112750935 B CN 112750935B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 76
- 238000000034 method Methods 0.000 claims abstract description 37
- 239000010410 layer Substances 0.000 claims description 204
- 229910052751 metal Inorganic materials 0.000 claims description 75
- 239000002184 metal Substances 0.000 claims description 75
- 238000005530 etching Methods 0.000 claims description 59
- 239000011241 protective layer Substances 0.000 claims description 11
- 238000009616 inductively coupled plasma Methods 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 5
- 238000001259 photo etching Methods 0.000 claims description 4
- 238000004151 rapid thermal annealing Methods 0.000 claims description 4
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 3
- 208000013201 Stress fracture Diseases 0.000 claims description 2
- 239000000463 material Substances 0.000 description 9
- 239000007789 gas Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910015844 BCl3 Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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Abstract
The embodiment of the invention discloses an LED chip and a manufacturing method thereof, wherein the LED chip comprises: the chip comprises a chip main body and connecting bridges, wherein the connecting bridges are arranged on two opposite sides of the chip main body, and the bottom surfaces of the connecting bridges and the chip main body are in the same plane; when the chip main body is stressed, the connecting bridge is broken under stress. According to the embodiment of the invention, the connection bridge is arranged, so that the LED chip is in surface falling rather than single chip falling when being peeled from the substrate, mutual collision in the chip falling process is prevented, the chip quality is improved, and the yield of the LED chip batch transfer process is further improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of semiconductors, in particular to an LED chip and a manufacturing method thereof.
Background
The Micro-LED display technology is a display technology which is characterized in that a traditional LED chip structure is subjected to Micro-scaling and arraying, a drive circuit is manufactured by adopting a CMOS integrated circuit process, and arrayed LED chips are transferred to the drive circuit in batches, so that addressing control and independent driving of each pixel point are realized.
In the batch transfer process of the LED chips, the arrayed LED chips are first peeled off from the substrate. Generally, the LED chips are manufactured on the substrate, each LED chip is independent from the other LED chip, and the distance between the LED chips is very close. When the LED chips are peeled off, the LED chips are peeled off from the substrate one by one, so that the peeled LED chips are likely to collide with each other, and the yield of batch transfer of the LED chips is affected.
Disclosure of Invention
In view of this, embodiments of the present invention provide an LED chip and a manufacturing method thereof to improve the yield of the batch transfer process of the LED chips.
In a first aspect, an embodiment of the present invention provides an LED chip, including a chip main body and a connection bridge, where the connection bridge is disposed on two opposite sides of the chip main body, and a bottom surface of the connection bridge and a bottom surface of the chip main body are in the same plane; when the chip main body is stressed, the connecting bridge is broken under stress.
Further, the connecting bridge comprises a bridge body and a bridge arm, and the bridge body is connected with the bridge arm and the chip main body; when the chip main body is stressed, the bridge body is subjected to stress fracture.
Furthermore, the chip main body sequentially comprises a substrate layer, a light emitting layer, a channel layer, a transparent protective layer and a metal electrode, and the bridge body is connected with the substrate layer.
In a second aspect, an embodiment of the present invention provides a method for manufacturing an LED chip, including:
providing a chip epitaxial structure, wherein the chip epitaxial structure sequentially comprises a substrate, a buffer layer, a substrate layer and a channel layer;
etching a first etching area defined on the channel layer until reaching the substrate layer so as to enable the chip epitaxial structure to form a first table-board and a second table-board, wherein the first table-board is the channel layer, and the second table-board is the substrate layer;
forming a first metal electrode on the first mesa and a second metal electrode on the second mesa;
etching a second etching area defined on the base layer until reaching the substrate to form a chip main body and form connecting bridges on two opposite sides of the chip main body;
and stripping the buffer layer to separate the base layer from the substrate to obtain the LED chip.
Further, etching the first etching region defined on the channel layer to the substrate layer to form a first mesa and a second mesa of the chip epitaxial structure includes:
defining a first etching area on the channel layer through photoetching;
depositing a mask layer in the area outside the first etching area;
and etching the region outside the mask layer to the substrate layer by an ICP (inductively coupled plasma) etching method so as to form a first table-board and a second table-board on the epitaxial structure of the chip.
Further, forming a first metal electrode on the first mesa and a second metal electrode on the second mesa includes:
forming a transparent conductive layer on the first mesa;
and forming a first metal layer on the transparent conductive layer and the second table-board, so that a first metal electrode is formed on the first table-board, and a second metal electrode is formed on the second table-board.
Further, forming a transparent conductive layer on the first mesa includes:
and depositing indium tin oxide on the first table-board by a magnetron sputtering method to form a transparent conductive layer.
Further, after forming the transparent conductive layer on the first mesa, the method further includes:
and forming ohmic contact between the transparent conducting layer and the surface of the channel layer through rapid thermal annealing treatment.
Further, after forming the first metal layer on the transparent conductive layer and on the second mesa, the method further includes:
and forming a transparent protective layer on the epitaxial structure of the chip after the first metal layer is formed by a PECVD method.
Further, after etching a second etching region defined on the base layer to the substrate to form a chip body and form connecting bridges on two opposite sides of the chip body, the method further includes:
forming a first hole exposing the first metal layer at the transparent protection layer at the first mesa, and forming a second hole exposing the first metal layer at the transparent protection layer at the second mesa;
and forming a second metal layer at the first hole and the second hole.
According to the LED chip provided by the embodiment of the invention, through the arrangement of the connecting bridge, the LED chip is not separated from a single chip but is separated from a surface when being peeled off from the substrate, so that mutual collision in the process of separating the chips is prevented, the quality of the chips is improved, and the yield of the batch transfer process of the LED chips is further improved.
Drawings
Fig. 1 is a schematic structural diagram of a single LED chip according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of a chip main body according to a first embodiment of the present invention;
fig. 3 is a schematic structural diagram of an LED chip array according to an embodiment of the present invention;
fig. 4 is a schematic flow chart illustrating a method for manufacturing an LED chip according to a second embodiment of the present invention;
fig. 5 is a schematic flow chart of a method for manufacturing an LED chip according to a third embodiment of the present invention;
fig. 6A is a schematic structural diagram of a chip epitaxial structure according to a third embodiment of the present invention;
fig. 6B is a schematic view of a chip epitaxial structure after the first etching according to the third embodiment of the present invention;
FIG. 6C is a top view of FIG. 6B;
fig. 6D is a schematic view of a chip epitaxial structure after a first metal layer is formed according to a third embodiment of the present invention;
fig. 6E is a schematic view of a chip epitaxial structure after a transparent protection layer is formed according to a third embodiment of the present invention;
fig. 6F is a schematic view of a chip epitaxial structure after the second etching according to the third embodiment of the present invention;
fig. 6G is a schematic view of a chip epitaxial structure after the transparent protection layer provided by the third embodiment of the present invention is opened;
fig. 6H is a schematic view of an epitaxial structure of the chip after forming the second metal layer according to the third embodiment of the present invention;
FIG. 6I is a top view of FIG. 6H;
fig. 7 is a schematic diagram of batch transfer of LED chips according to a third embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting of the invention.
Furthermore, features defined as "first" and "second" may explicitly or implicitly include one or more of the features for distinguishing between descriptive features, non-sequential, non-trivial and non-trivial. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Example one
The following describes a specific structure of an LED chip provided in an embodiment of the present invention with reference to fig. 1 to 3.
As shown in fig. 1, an LED chip provided in an embodiment of the present invention includes: the chip comprises a chip body 10 and connecting bridges 20, wherein the connecting bridges 20 are arranged on two opposite sides of the chip body 10. In this embodiment, the connecting bridge 20 and the chip body 10 together form an "H" shaped structure.
When the chip body 10 is subjected to a force, the connecting bridges 20 are broken by the stress. Further, the connecting bridge 20 includes a bridge body 21 and a bridge arm 22, wherein the bridge body 21 is directly connected to the chip main body 10, the bridge arm 22 is connected to the chip main body 10 through the bridge body 21, and the bridge arm 22 plays a supporting role. When transferring the LED chip, as shown in fig. 7, the LED chip is first placed on a carrier 70 with a groove 71, wherein the chip main body 10 is disposed opposite to the groove 71, and the bridge arms 22 are placed on two sides of the groove 71 of the carrier 70, so that the chip main body 10 is suspended in the groove 71. Then, the chip main body 10 is adsorbed by the transfer head 80 of the transfer device and pressure is applied to the chip main body 10, the bridge 21 is broken by stress, and the chip main body 10 is adsorbed by the transfer head 80 and transferred to the corresponding driving substrate.
Generally, the LED chips are disposed on a substrate before use, and a plurality of LED chips are arranged in an array on the substrate. When the LED chip is required to be used, the substrate is separated from the LED chip, and a single LED chip is obtained. In this embodiment, the bottom surface of the connecting bridge 20 and the bottom surface of the chip main body 10 are the same plane, and when a plurality of LED chips are arranged in an array, the bridge arms 22 of the plurality of LED chips are connected together, as shown in fig. 3. Then, when the LED chip is separated from the substrate, the plurality of LED chips exhibit face-off, rather than the individual LED chips of the prior art. Meanwhile, the connecting bridge 20 enables the chip main bodies 10 to have a certain distance therebetween, so that collision between the chip main bodies 10 when the LED chips fall off can be prevented, the quality of the LED chips is improved, and the yield of the LED chips during batch transfer is ensured.
Further, referring to fig. 1-2, the chip body 10 includes a base layer 11, a light emitting layer 12, a channel layer 13, a transparent conductive layer 14, a transparent protective layer 15, and a metal electrode 16. The connecting bridge 20 is connected with the substrate layer 11, and the connecting bridge 20 and the substrate layer 11 are both made of N-GaN material. The light emitting layer 12 is a QW quantum well, blue light emitting material. The channel layer 13 is made of P-GaN material. The transparent protective layer 15 is SiO2Or SiN4The material protects the internal structure of the chip body 10. The metal electrode 16 includes a P electrode 161 and an N electrode 162, and generally, the metal electrode 16 is composed of a first metal layer 17 located inside the transparent protection layer 15, and is led out to the transparent protection layer 15 from a second metal layer 18 penetrating the transparent protection layer 15 and connected to the first metal layer 17When the LED chip is used, the external leads formed by connecting the second metal layer 18 can be connected to the corresponding metal electrodes. The material of the first metal layer 17 is Ti/Al/Ti/Au, and other metals (Ni/Fe/Pt/Pd, etc.) or conductive materials can be used. The material of the second metal layer 18 is indium metal.
The LED chip provided by the embodiment of the invention comprises the chip main body and the connecting bridge, and the LED chip is enabled to be in surface falling instead of single chip falling when being peeled from the substrate through the arrangement of the connecting bridge, so that mutual collision in the chip falling process is prevented, the chip quality is improved, and the yield of the LED chip batch transfer process is further improved.
Example two
Fig. 4 is a schematic flow chart of a manufacturing method of an LED chip according to a second embodiment of the present invention, and the manufacturing method of an LED chip according to the second embodiment of the present invention can be used for manufacturing an LED chip according to any embodiment of the present invention.
As shown in fig. 4, a method for manufacturing an LED chip according to a second embodiment of the present invention includes:
s410, providing a chip epitaxial structure, wherein the chip epitaxial structure sequentially comprises a substrate, a buffer layer, a substrate layer and a channel layer.
Specifically, a substrate, which may be sapphire (Al), is first provided2O3) And common semiconductor substrates made of silicon (Si), silicon carbide (SiC), and the like. And then growing a buffer layer, a substrate layer and a channel layer on the substrate in sequence. Referring to FIG. 6A, in the present embodiment, taking the sapphire substrate 60 as an example, the buffer layer 61 is u-GaN, the base layer 11 is n-GaN, and the channel layer 13 is p-GaN. Further, a light emitting layer 12 is further included between the base layer 11 and the channel layer 13, and the light emitting layer 12 is a QW quantum well and is configured to emit blue light.
And S420, etching a first etching area defined on the channel layer until the substrate layer so as to enable the epitaxial structure of the chip to form a first table top and a second table top, wherein the first table top is the channel layer, and the second table top is the substrate layer.
Specifically, the first etching region is etched, and the channel layer 13 and the light emitting layer 12 in the first etching region are removed until the substrate layer 11 is exposed, so that two mesas are formed in the etched chip epitaxial structure, the second mesa 63 is the substrate layer 11 exposed by etching, and the first mesa 62 is the channel layer 13 that is not etched, as shown in fig. 6B, and a top view is shown in fig. 6C. The first mesa 62 is a region other than the first etched region, i.e., an unetched region, where a light emitting mesa is formed by the base layer 11, the light emitting layer 12, and the channel layer 13.
And S430, forming a first metal electrode on the first table top, and forming a second metal electrode on the second table top.
Specifically, referring to fig. 6D, before forming the first metal electrode on the first mesa 62, the transparent conductive layer 14 is further formed on the first mesa 62, and then the first metal electrode is formed on the transparent conductive layer 14, where the first metal electrode is the P-electrode 161. A second metal electrode, which is an N-electrode 162, is formed on the second mesa 63.
S440, etching a second etching area defined on the base layer until reaching the substrate to form a chip main body and form connecting bridges on two opposite sides of the chip main body.
Specifically, the second etching region is a region of the chip epitaxial structure except for the chip main body and the connecting bridge. The second etching region is etched until the substrate 60 is exposed, so that the LED chip composed of the chip body 10 and the connecting bridge 20 is formed on the chip epitaxial structure, and the connecting bridge 20 and the chip body 10 together form an "H" shaped structure, as shown in fig. 6H. The connecting bridge 20 comprises a bridge body 21 and a bridge arm 22, wherein the bridge body 21 is directly connected with the chip main body 10, and the bridge arm 22 is connected with the chip main body 10 through the bridge body 21. The connecting bridges 20 are formed in the same layer as the base layer 11 of the chip body 10.
S450, stripping the buffer layer to separate the base layer from the substrate, and obtaining the LED chip.
Specifically, the buffer layer 61 between the base layer 11 and the substrate 60 is decomposed by laser light, and the LED chips are peeled off the substrate 60 in a planar manner, thereby obtaining LED chips that can be transferred in batch. Typically, a plurality of LED chips in an arrayed arrangement as shown in fig. 2 is obtained.
The manufacturing method of the LED chip provided by the embodiment of the invention comprises the steps of providing a chip epitaxial structure, wherein the chip epitaxial structure sequentially comprises a substrate, a buffer layer, a substrate layer and a channel layer; etching a first etching area defined on the channel layer until reaching the substrate layer so as to enable the chip epitaxial structure to form a first table-board and a second table-board, wherein the first table-board is the channel layer, and the second table-board is the substrate layer; forming a first metal electrode on the first mesa and a second metal electrode on the second mesa; etching a second etching area defined on the base layer until reaching the substrate to form a chip main body and form connecting bridges on two opposite sides of the chip main body; and stripping the buffer layer to separate the base layer from the substrate to obtain the LED chip. The LED chips are enabled to fall off when being peeled off from the substrate instead of falling off of a single chip through the arrangement of the connecting bridge, so that mutual collision of the chips in the falling-off process is prevented, the quality of the chips is improved, and the yield of the LED chips in the batch transfer process is further improved.
EXAMPLE III
Fig. 5 is a schematic flow chart of a method for manufacturing an LED chip according to a third embodiment of the present invention, which is further detailed in the embodiment of the present invention. As shown in fig. 5, a method for manufacturing an LED chip provided by the third embodiment of the present invention includes:
s501, providing a chip epitaxial structure, wherein the chip epitaxial structure sequentially comprises a substrate, a buffer layer, a substrate layer and a channel layer.
Referring to fig. 6A, in the present embodiment, a buffer layer 61, a base layer 11, a light emitting layer 12, and a channel layer 13 are sequentially grown on a sapphire substrate 60 to form a chip epitaxial structure. The buffer layer 61 is made of u-GaN, the substrate layer 11 is made of n-GaN, and the channel layer 13 is made of p-GaN. Further, a light emitting layer 12 is further included between the base layer 11 and the channel layer 13, and the light emitting layer 12 is a QW quantum well and is configured to emit blue light.
And S502, defining a first etching area on the channel layer through photoetching.
Specifically, the epitaxial structure of the chip is sequentially subjected to the steps of spin coating, prebaking, photoetching, developing, postbaking and the like, and a first etching region is defined on the channel layer, wherein the first etching region is a region outside the second mesa (namely outside the light-emitting boss).
S503, depositing a mask layer in the area outside the first etching area.
Specifically, the mask layer is used to protect the regions not to be etched, and the mask layer may be photoresist, metal, ferroelectric oxide (e.g. SiO)2) And the like, or combinations of such materials.
S504, etching the region outside the mask layer to the substrate layer through an ICP etching method so that a first table top and a second table top are formed on the epitaxial structure of the chip, wherein the first table top is the channel layer, and the second table top is the substrate layer.
Specifically, the chip epitaxial structure with the deposited mask layer is placed in an ICP etching apparatus, and etching gas is introduced to etch the region of the chip epitaxial structure not coated with the mask layer, that is, the first etching region, until the substrate layer 11 is etched, so that the chip epitaxial structure forms a first mesa 62 and a second mesa 63, and the first mesa 63 forms a light-emitting boss, as shown in fig. 6B. The shape of the first mesa 63 may be square, circular, polygonal, oval, or other different shapes, and in this embodiment, a square is taken as an example, as shown in fig. 6C.
The etching gas used in the step is Cl2、BCl3And SF6. Etching gases differ depending on the substrate material, e.g. BCl for GaAs and GaN substrates3And Cl2Etching with gas, using SF for Si substrate6As an etching gas.
And S505, forming a transparent conductive layer on the first table-board.
Specifically, ITO (Indium Tin Oxides) is deposited on the first mesa 62 by magnetron sputtering, so as to form the transparent conductive layer 14, as shown in fig. 6D. The transparent conductive layer 14 makes the current spreading more uniform.
Further, after the formation of the transparent conductive layer, the transparent conductive layer 14 is brought into ohmic contact with the surface of the channel layer 13 by RTA (Rapid Thermal Annealing) treatment.
And S506, forming a first metal layer on the transparent conductive layer and the second table-board, so that a first metal electrode is formed on the first table-board, and a second metal electrode is formed on the second table-board.
Specifically, the first metal layer 17 is vapor-deposited on the first mesa 62 and the second mesa 63 by an electron beam vapor deposition method, as shown in fig. 6D. The first metal layer 17 is made of Ti/Al/Ti/Au, and other metals (Ni/Fe/Pt/Pd, etc.) or conductive materials can be used. The first metal layer 17 on the first mesa 62 is a first metal electrode, which is a P-electrode 161; the first metal layer 17 on the second mesa 63 is a second metal electrode, which is an N-electrode 162. The shape of the first metal electrode and the second metal electrode may be square, circular, rounded square, etc., and the square is taken as an example in this embodiment.
And S507, forming a transparent protective layer on the epitaxial structure of the chip after the first metal layer is formed by a PECVD method.
Specifically, a layer of SiO is deposited on the surface of the epitaxial structure of the chip after the first metal layer 17 is formed by PECVD (Plasma Enhanced Chemical Vapor Deposition)2And a transparent protective layer 15 is formed as shown in fig. 6E. The material of the transparent protective layer 15 may be SiN4. The transparent protective layer 15 not only protects the internal structure of the LED chip, but also can be used as a mask layer for next ICP etching, and meanwhile, the damage of the mask removing process to the electrode is avoided, and the performance of the device is protected. The thickness of the transparent protective layer 15 is about 1.6 um.
S508, etching the second etching area defined on the base layer until reaching the substrate to form a chip main body and form connecting bridges on two opposite sides of the chip main body.
Specifically, the second etching region is a region of the chip epitaxial structure except for the chip main body and the connecting bridge. Placing the chip epitaxial structure obtained in the above step into ICP etching equipment, and introducing etching gas (Cl)2、BCl3And SF6) The second etching region is etched until the substrate 60 is exposed, thereby making it possible to etch the substrateAn LED chip composed of a chip body 10 and a connecting bridge 20 is formed on the chip epitaxial structure, and the connecting bridge 20 and the chip body 10 together form an "H" shaped structure, as shown in fig. 6F. The connecting bridge 20 comprises a bridge body 21 and a bridge arm 22, wherein the bridge body 21 is directly connected with the chip main body 10, and the bridge arm 22 is connected with the chip main body 10 through the bridge body 21. The connecting bridges 20 are formed in the same layer as the base layer 11 of the chip body 10.
S509, forming a first hole exposing the first metal layer at the transparent protection layer at the first mesa, and forming a second hole exposing the first metal layer at the transparent protection layer at the second mesa.
Specifically, a first hole 151 exposing the first metal layer 17 is formed at the transparent protection layer 15 at the first mesa 62 and a second hole 152 exposing the first metal layer 17 is formed at the transparent protection layer 15 at the second mesa 63 by an ICP or RIE (Reactive Ion Etching) method, as shown in fig. 6G. The main etching gas used is SF6、CF4Or CHF3The first and second holes 151 and 152 are circular or square in shape as long as the corresponding metal electrodes are exposed so as to be in contact with the subsequent second metal layer.
And S510, forming a second metal layer at the first hole and the second hole.
Specifically, the second metal layer 18 is formed by depositing indium metal at the first and second holes 151 and 152 by thermal evaporation or electron beam evaporation, as shown in fig. 6H and 6I. The second metal layer 18 corresponds to the leads of the first metal electrode and the second metal electrode, and may have a rounded square shape, a circular shape, or the like.
And S511, stripping the buffer layer to separate the base layer from the substrate to obtain the LED chip.
Specifically, the buffer layer 61 between the base layer 11 and the substrate 60 is decomposed by laser light, and the LED chips are peeled off the substrate 60 in a planar manner, thereby obtaining LED chips that can be transferred in batch. Generally, a plurality of LED chips arranged in an array as shown in fig. 2 is obtained, and the structure of a single LED chip is shown in fig. 1.
When the LED chips are transferred in batch, as shown in fig. 7, the electrode surfaces of the LED chips are first transferred downward to a carrier 70 having a groove 71 structure, the chip main body 10 is placed in the groove 71, and the connecting bridge 20 supports the chip main body 10 to suspend. Then, the chip main body 10 is adsorbed by the transfer head 80 of the transfer device and pressure is applied to the chip main body 10, the bridge body 21 is broken under stress, and the chip main body 10 is adsorbed by the transfer head 80 and transferred to the corresponding driving substrate, so that batch transfer of the LED chips is completed.
According to the manufacturing method of the LED chip provided by the embodiment of the invention, the connection bridge is arranged, so that the LED chip is in surface falling rather than single chip falling when being peeled from the substrate, mutual collision in the chip falling process is prevented, the chip quality is improved, and the yield of the LED chip batch transfer process is further improved.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (8)
1. An LED chip is characterized by comprising a chip main body and connecting bridges, wherein the connecting bridges are arranged on two opposite sides of the chip main body, and the bottom surfaces of the connecting bridges and the chip main body are in the same plane; when the chip main body is stressed, the connecting bridge is broken under stress;
the connecting bridge and the substrate layer of the chip main body are the same layer;
the connecting bridge comprises a bridge body and a bridge arm, and the bridge arm is connected with the chip main body through the bridge body; when the chip main body is stressed, the bridge body is subjected to stress fracture;
the bridge arms are arranged on two sides of the groove of the bearing object; the bridge arms of the LED chips are connected together;
the connecting bridge and the chip main body jointly form an H-shaped structure;
the chip main body sequentially comprises a substrate layer, a light emitting layer, a channel layer, a transparent protective layer and a metal electrode, and the bridge body is connected with the substrate layer.
2. A manufacturing method of an LED chip is characterized by comprising the following steps:
providing a chip epitaxial structure, wherein the chip epitaxial structure sequentially comprises a substrate, a buffer layer, a substrate layer and a channel layer;
etching a first etching area defined on the channel layer until reaching the substrate layer so as to enable the chip epitaxial structure to form a first table-board and a second table-board, wherein the first table-board is the channel layer, and the second table-board is the substrate layer;
forming a first metal electrode on the first mesa and a second metal electrode on the second mesa;
etching a second etching area defined on the base layer until reaching the substrate to form a chip main body and form connecting bridges on two opposite sides of the chip main body;
the second etching area is an area except the chip main body and the connecting bridge on the chip epitaxial structure;
the connecting bridge and the substrate layer of the chip main body are the same layer;
the connecting bridge comprises a bridge body and a bridge arm, and the bridge arm is connected with the chip main body through the bridge body;
the bridge arms are arranged on two sides of the groove of the bearing object; the bridge arms of the LED chips are connected together;
the connecting bridge and the chip main body jointly form an H-shaped structure;
and stripping the buffer layer to separate the base layer from the substrate to obtain the LED chip.
3. The method for manufacturing the LED chip according to claim 2, wherein etching the first etched region defined on the channel layer to the base layer so that the chip epitaxial structure forms a first mesa and a second mesa includes:
defining a first etching area on the channel layer through photoetching;
depositing a mask layer in the area outside the first etching area;
and etching the region outside the mask layer to the substrate layer by an ICP (inductively coupled plasma) etching method so as to form a first table-board and a second table-board on the epitaxial structure of the chip.
4. The method of claim 2, wherein forming a first metal electrode on the first mesa and a second metal electrode on the second mesa comprises:
forming a transparent conductive layer on the first mesa;
and forming a first metal layer on the transparent conductive layer and the second table-board, so that a first metal electrode is formed on the first table-board, and a second metal electrode is formed on the second table-board.
5. The method of fabricating an LED chip according to claim 4, wherein forming a transparent conductive layer on the first mesa comprises:
and depositing indium tin oxide on the first table-board by a magnetron sputtering method to form a transparent conductive layer.
6. The method of fabricating an LED chip according to claim 5, further comprising, after forming the transparent conductive layer on the first mesa:
and forming ohmic contact between the transparent conducting layer and the surface of the channel layer through rapid thermal annealing treatment.
7. The method of claim 4, wherein after forming the first metal layer on the transparent conductive layer and on the second mesa, further comprising:
and forming a transparent protective layer on the epitaxial structure of the chip after the first metal layer is formed by a PECVD method.
8. The method of claim 7, wherein etching the second etched region defined on the base layer to the substrate to form a chip body and forming connecting bridges on opposite sides of the chip body, further comprises:
forming a first hole exposing the first metal layer at the transparent protection layer at the first mesa, and forming a second hole exposing the first metal layer at the transparent protection layer at the second mesa;
and forming a second metal layer at the first hole and the second hole.
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