CN112750922A - Light-emitting diode with variable patterns and preparation method thereof - Google Patents
Light-emitting diode with variable patterns and preparation method thereof Download PDFInfo
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- CN112750922A CN112750922A CN201911052075.3A CN201911052075A CN112750922A CN 112750922 A CN112750922 A CN 112750922A CN 201911052075 A CN201911052075 A CN 201911052075A CN 112750922 A CN112750922 A CN 112750922A
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- 238000001704 evaporation Methods 0.000 claims description 19
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 16
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F41—WEAPONS
- F41G—WEAPON SIGHTS; AIMING
- F41G1/00—Sighting devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
Abstract
The invention discloses a light-emitting diode with a variable graph and a preparation method thereof, wherein the diode comprises an epitaxial wafer, the upper surface of the epitaxial wafer is evaporated with an ITO film, the ITO film is provided with a plurality of luminous areas and etching areas, each luminous area is correspondingly provided with a P-surface electrode, and adjacent P-surface electrodes are insulated and separated; an insulating layer is deposited on the surface of the etching area, and an N-surface electrode is evaporated on the end face, far away from the ITO film, of one side of the epitaxial wafer. The LED manufacturing method is simple in structure and reasonable in step design, the manufactured LED can be used independently, and can be used for emitting a required pattern without being matched with a reticle, so that the advantages of simple structure and low power consumption are guaranteed while the utilization rate of a light source is improved; meanwhile, the luminous pattern of the diode prepared by the technical scheme has variability, can be transformed according to the distance between the reflecting sighting telescope and the target, and has higher practicability.
Description
Technical Field
The invention relates to the technical field of photoelectron, in particular to a light-emitting diode with a variable graph and a preparation method thereof.
Background
The reflecting sighting telescope is an optical sighting telescope without magnification, which utilizes the principle of spherical reflection to make the reflected light incident to eyes parallelly incident into the eyes of an observer, so that the eyes of the observer can see red dots without the need of seeing the red dots on the central axis of the lens, and the shooting precision of a moving target or a body can be improved when the moving target or the body moves. The light source part of the reflecting sighting telescope comprises an LED/LD light source, an isotope radiation light source and the like at present.
Isotope radioactive sources use visible light emitted from a radioactive element as a light source, and have a long life but a high cost. The LED/LD light source is a reticle with a circular or other patterns placed in front of the LED/LD, light emitted by the light source is emitted to the reflector after being limited by the reticle, and the reflector reflects the light into parallel light to be emitted. Its advantages are simple structure, low power consumption and wide application. However, most of the light emitted by the light source is blocked by the reticle, and only a small amount of light is emitted, so that the utilization rate of the light source is low.
In view of the above problems, we have devised a light emitting diode with variable patterns and a method for manufacturing the same, which is applied to a reflective sighting telescope, and this is one of the problems that we need to solve.
Disclosure of Invention
The present invention is directed to a light emitting diode with a variable pattern and a method for manufacturing the same, which solves the problems of the prior art.
In order to achieve the purpose, the invention provides the following technical scheme:
a light-emitting diode with a variable pattern comprises an epitaxial wafer, wherein an ITO film is evaporated on the upper surface of the epitaxial wafer, a plurality of light-emitting areas and etching areas are arranged on the ITO film, a P-surface electrode is correspondingly arranged on each light-emitting area, and adjacent P-surface electrodes are insulated and separated; an insulating layer is deposited on the surface of the etching area, and an N-surface electrode is evaporated on the end face, far away from the ITO film, of one side of the epitaxial wafer.
Preferably, the number of the light emitting areas is m, the number of the P-side electrodes is n, and the number of the light emitting patterns that can be generated by the diode is q, then: m is n, q is 2n-1。
The invention designs a light-emitting diode with variable patterns and a preparation method thereof, and the light-emitting diode with the patterns can replace the combination of a light source and a reticle in the traditional sighting telescope by manufacturing the light-emitting diode with the patterns, generate light rays with set patterns when in use, improve the utilization rate of the light source on the basis of keeping simple structure and low power consumption and reduce the cost; in practical use, a dot pattern or a cross pattern is generally used for aiming a target, but the setting of the pattern has an inevitable defect that the pattern cannot be changed according to the distance between the target and the reflecting sighting telescope; aiming at the problem, the light-emitting diode is improved on the basis of the original design, the light-emitting graph of the light-emitting diode is variable, the light-emitting diode is suitable for various use environments, and the practicability is better.
The LED chip comprises an epitaxial wafer, an ITO film, an etching area, a plurality of luminous areas, a plurality of P-surface electrodes and N-surface electrodes, wherein the epitaxial wafer comprises a substrate, an N-type ohmic contact layer, an N-type limiting layer, an active area, a P-type limiting layer and a P-type ohmic contact layer; a plurality of luminous areas are designed on the surface of the ITO film, each luminous area corresponds to the design of a luminous pattern, and a P-surface electrode is designed on each luminous area and used for controlling the luminous area to emit light; the adjacent P-surface electrodes are insulated and separated, so that the independence of each luminous pattern is ensured, and the mutual influence among luminous areas is avoided; the part except the luminous area is an etching area, ICP etching can be carried out on the etching area, the etching depth extends from the ITO film to the N-type limiting layer all the time, the active area is etched together, and the luminous area can form a required luminous pattern.
The number of the luminous areas of the diode prepared by the invention is m, the number of the P-surface electrodes is n, and the number of the luminous patterns which can be generated is q, then: n, q 2 n-1; each P-surface electrode has a corresponding luminous zone, and the number n of the P-surface electrodes determines the number of patterns which can be generated; in practice, the P-side electrode may be made of two or more metal film systems of Cr, Ti, Pd, Pt, Al, Au.
Preferably, the light emitting region includes a light emitting region a and a light emitting region B, and the P-side electrode includes a P-side electrode A, P and a surface electrode B; the P-surface electrode A controls the light emitting area A to emit light, and the P-surface electrode B controls the light emitting area B to emit light.
Preferably, the light-emitting pattern of the light-emitting region a is circular, and the light-emitting pattern of the light-emitting region B is circular.
One embodiment of the invention (as shown in fig. 3 and fig. 4 in the specification) is that the invention has a P-side electrode a and a P-side electrode B, where the P-side electrode a corresponds to a light emitting area a and the P-side electrode B corresponds to a light emitting area B; the luminous pattern of the luminous zone A can be designed into a circle, and the luminous pattern of the luminous zone B can be designed into a ring; when the diode is manufactured, the P-surface electrode A is conducted, and the generated luminous pattern is a circular point; when the P-face electrode B is conducted, the generated luminous pattern is a circular ring; when the P-side electrode A, P and the side electrode B are simultaneously turned on, the light emission pattern is a dot or a circle.
Preferably, the epitaxial wafer comprises a substrate, and an N-type ohmic contact layer, an N-type limiting layer, an active region, a P-type limiting layer and a P-type ohmic contact layer are sequentially grown on the surface of the substrate from bottom to top;
the substrate is any one of GaAs, GaN, SiC and silicon; the P-type ohmic contact layer is made of any one of ITO, ZnO and GZO; preferably, the etching depth of the etching area is the distance from the ITO film to the N-type limiting layer.
A method for preparing a light emitting diode with a variable pattern comprises the following steps:
1) growing an epitaxial wafer;
2) evaporating an ITO film;
3) photoetching and ICP etching to prepare a light emitting area;
4) manufacturing a P-surface electrode;
5) manufacturing an N-face electrode;
6) and cutting to obtain the tube core.
Preferably, the method comprises the following steps:
1) and (3) growing the epitaxial wafer: taking a substrate, and growing an N-type ohmic contact layer, an N-type limiting layer, an active region, a P-type limiting layer and a P-type ohmic contact layer on the surface of the substrate in sequence by adopting an MOCVD (metal organic chemical vapor deposition) method to obtain an epitaxial wafer; growing an epitaxial wafer in the step 1), wherein the growth of the epitaxial layer is a conventional process in the field and is not described herein again;
2) and (3) evaporation of an ITO film: placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating and plating an ITO film on the P-type ohmic contact layer, wherein the ITO film covers the whole surface of the epitaxial wafer; wherein the thickness of the ITO film is
In the step 2), an ITO film is evaporated by using an electron beam evaporation table and is used as a current expansion layer, so that the conductivity is improved;
3) photoetching and ICP etching to prepare a light emitting area;
a) placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film, and photoresist covers the surfaces of the luminous area A and the luminous area B; step a) of the step 3) firstly, carrying out exposure according to a set light-emitting pattern through a photoetching process, then carrying out development corrosion to form a light-emitting area A and a light-emitting area B, wherein photoresist covers the surfaces of the light-emitting area A and the light-emitting area B, and carrying out mask protection through the photoresist; the rest part of the photoresist is corroded by the developing corrosive liquid, so that the subsequent ICP etching is facilitated;
b) placing the P surface of the epitaxial wafer upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film, and etching the area till the area penetrates through the active area to the N-type limiting layer to form an etching area; in the step b), ICP etching is carried out on the part which is not covered by the photoresist, the etching depth is up to the N-type limiting layer, an etching area is formed, the active area of the etching area is etched in the step, and the accuracy of the subsequent light-emitting pattern is guaranteed;
c) placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution at 80-82 ℃ and the photoresist removing time at 10-15 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of the acetone is 50-52 ℃, and the time is 5-7 min; then putting the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 70-73 ℃, the time is 5-7min, cleaning with pure water, and drying with nitrogen; removing the photoresist on the P surface of the epitaxial wafer by using the photoresist removing liquid in the step c), and then putting the epitaxial wafer into acetone to remove the residual photoresist removing liquid on the epitaxial wafer; according to the principle of 'similarity and compatibility', the technical scheme utilizes ethanol to wash off residual acetone on the chip, and finally the ethanol is dissolved in water to clean the P surface of the whole epitaxial wafer thoroughly;
4) manufacturing a P-surface electrode:
a) taking the epitaxial wafer treated in the step 3), manufacturing an insulating layer on the surface of the etching area, and manufacturing a P-surface electrode A on the ITO film by adopting a lift-off process; in the step a) of the step 4), an insulating layer is prepared firstly, the insulating layer is positioned on the surface of the ICP etching area in the step 3), namely the surface of the etching area, the insulating layer can play an insulating protection role and can be used for isolating the P, N electrode; preparing a P-surface electrode A, wherein the P-surface electrode A is manufactured on the surface of the luminous zone A;
b) after the P-face electrode A is manufactured, SiO is evaporated on the surface of the epitaxial layer in a PECVD mode2Etching a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B by a photoetching process, and then manufacturing the P-type electrode B by a lift-off process; in the step B) of the step 4), a SiO2 layer is evaporated on the surface of the manufactured P-surface electrode, so that the electrodes B on the surface of the P-surface electrode A, P are mutually separated, the accurate pattern during subsequent light emitting is ensured, and the interference between light emitting areas is avoided; etching the pad region of the P-face electrode A and the ohmic contact region of the P-type electrode B by a photoetching process to perform PManufacturing a surface electrode B, and drawing the P surface electrode B and a luminous zone B for controlling the luminous zone B to emit light;
5) manufacturing an N-face electrode: after the growth of the P-surface electrode B is finished, thinning the substrate of the epitaxial wafer to 140-170um, and evaporating an N-surface electrode on the back surface of the thinned substrate, wherein the N-surface electrode covers the back surface of the whole substrate; step 5), manufacturing an N-surface electrode;
6) and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core. And 6) cutting to obtain the tube core.
Preferably, the method comprises the following steps: during the operation of the step a) in the step 4), coating an insulating dielectric film on the epitaxial wafer after the ICP etching is finished in an etching area, and curing for 28-32min at the temperature of 340-; wherein the insulating dielectric film is any one of BCB and PI.
In the step a) of the step 4) of the invention, SiO can be deposited on the surface of the ITO film2Then covering the surfaces of the luminous areas A and B with SiO2Peeling off to make SiO2An insulating layer is covered on the surface of the area etched by the ICP, namely the surface of the etching area, so that the insulating layer can play a role in insulating protection; in practice, SiO can also be used2Layer replacement with SiNxAnd (6) carrying out deposition.
Preferably, the method comprises the following steps: during the operation of the step a) of the step 4), taking the epitaxial wafer after ICP etching is finished, and depositing SiO on the surface of the ITO film by adopting a PECVD method2Wherein SiO is2Has a thickness of
Then, a stripping process is adopted to remove SiO covered on the luminous areas A and B on the surface of the ITO2SiO on the surface of the etching area is reserved2And forming an insulating layer.
In the step a) of the step 4), an insulating dielectric film can be coated on the surface of the etching area, and the insulating dielectric film can be any one of BCB (benzocyclobutene) and PI (polyimide), so that compared with silicon dioxide, the BCB (benzocyclobutene) and PI (polyimide) not only can play a role in insulation protection, but also can be used for carrying out planarization operation on the surface of the etching area, so that the height of the insulating layer is consistent with that of the ITO film layer, the subsequent P-surface electrode manufacturing is facilitated, and the practicability is better.
Compared with the prior art, the invention has the beneficial effects that: when the invention is manufactured, firstly, an epitaxial wafer is grown, an ITO film is evaporated on the surface of the epitaxial wafer, then, photoresist is coated on the surface of the ITO film, a target luminous pattern is exposed by utilizing the photoresist, and a luminous zone (a luminous zone A and a luminous zone B) is formed by developing and corroding; at the moment, photoresist exists on the surfaces of the light emitting areas (the light emitting areas A and B) to play a role of mask protection, at the moment, ICP etching is carried out on the areas which are not covered by the photoresist, the etching depth reaches the N-type limiting layer, and an etching area is formed; and preparing an insulating layer on the surface of the etching area, wherein the insulating layer plays a role in insulating protection, and finally preparing a P-surface electrode (a P-surface electrode A, P surface electrode B) and an N-surface electrode, and cutting to obtain the tube core.
When the P-surface electrodes are manufactured, because the variability of the luminous patterns needs to be realized, each P-surface electrode is provided with a corresponding luminous zone; when a luminous zone A and a luminous zone B exist on the surface of the epitaxial wafer, a P-surface electrode A is firstly manufactured and is conducted with the luminous zone A to control the luminescence of the luminous zone A, and then a layer of SiO is firstly evaporated on the surface of the P-surface electrode A to avoid the influence between the P-surface electrode A, P and the surface electrode B and also to ensure the integrity and accuracy of a subsequent luminous pattern2And (4) separating the layers, exposing a region for manufacturing the P-surface electrode B by utilizing a photoetching process, and manufacturing the P-surface electrode B.
The invention discloses a light-emitting diode with variable patterns and a preparation method thereof, the light-emitting diode is simple in structure and reasonable in step design, the prepared light-emitting diode can be used independently without being matched with a reticle, the light-emitting diode can be used for emitting the required patterns, and the advantages of simple structure and low power consumption are ensured while the utilization rate of a light source is improved; meanwhile, the luminous pattern of the diode prepared by the technical scheme has variability, can be transformed according to the distance between the reflecting sighting telescope and the target, and has higher practicability.
Drawings
In order that the present invention may be more readily and clearly understood, a more particular description of the invention briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings.
FIG. 1 is a schematic view of an overall structure of a light emitting diode with variable patterns according to the present invention;
FIG. 2 is a schematic view of an overall structure of a light emitting diode with variable patterns according to the present invention;
FIG. 3 is a schematic diagram of a light-emitting pattern of an embodiment of a light-emitting diode with a variable pattern according to the present invention;
FIG. 4 is a schematic diagram of a light emitting pattern of an LED with a variable pattern according to an embodiment of the present invention.
In the figure: the thin film transistor comprises a 1-substrate, a 2-N type ohmic contact layer, a 3-N type limiting layer, a 4-active region, a 5-P type limiting layer, a 6-P type ohmic contact layer, a 7-ITO film, an 8-insulating layer, a 9-P surface electrode and a 10-N surface electrode.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1:
s1: taking a substrate 1, and growing an N-type ohmic contact layer 2, an N-type limiting layer 3, an active region 4, a P-type limiting layer 5 and a P-type ohmic contact layer 6 on the surface of the substrate 1 in sequence by adopting an MOCVD (metal organic chemical vapor deposition) method to obtain an epitaxial wafer;
s2: placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating an ITO film 7 on the P-type ohmic contact layer 6, wherein the ITO film 7 covers the whole surface of the epitaxial wafer; wherein the thickness of the ITO film 7 is
S3: placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film 7 at the moment, and photoresist covers the surfaces of the luminous area A and the luminous area B;
s4: placing the epitaxial wafer P face upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film 7, and etching the area till the area penetrates through the active area 4 to the N-type limiting layer 3 to form an etching area;
s5: placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution at 80 ℃ and the photoresist removing time to be 10 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of the acetone is 50 ℃ and the time is 5 min; then placing the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 70 ℃ and the time is 5min, washing with pure water, and drying with nitrogen;
s6: coating an insulating dielectric film on the epitaxial wafer subjected to ICP etching in an etching area, and curing for 28min at 340 ℃, wherein the thickness of the insulating dielectric film is the same as the depth of the ICP etching, so as to form an insulating layer 8; wherein the insulating dielectric film is BCB; then a lift-off process is adopted to manufacture a P-surface electrode A on the ITO film 7;
s7: after the P-face electrode A is manufactured, SiO is evaporated on the surface of the epitaxial layer in a PECVD mode2Etching a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B by a photoetching process, and then manufacturing the P-type electrode B by a lift-off process;
s8: manufacturing an N-face electrode 10: after the growth of the P-surface electrode B is finished, thinning the substrate 1 of the epitaxial wafer to 140um, and evaporating an N-surface electrode 10 on the back surface of the thinned substrate 1, wherein the N-surface electrode 10 covers the back surface of the whole substrate 1;
s9: and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core.
In this embodiment, the substrate 1 is a GaAs substrate 1; the material of the P-type ohmic contact layer 6 is ITO.
Example 2:
s1: taking a substrate 1, and growing an N-type ohmic contact layer 2, an N-type limiting layer 3, an active region 4, a P-type limiting layer 5 and a P-type ohmic contact layer 6 on the surface of the substrate 1 in sequence by adopting an MOCVD (metal organic chemical vapor deposition) method to obtain an epitaxial wafer;
s2: placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating an ITO film 7 on the P-type ohmic contact layer 6, wherein the ITO film 7 covers the whole surface of the epitaxial wafer; wherein the thickness of the ITO film 7 is
S3: placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film 7 at the moment, and photoresist covers the surfaces of the luminous area A and the luminous area B;
s4: placing the epitaxial wafer P face upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film 7, and etching the area till the area penetrates through the active area 4 to the N-type limiting layer 3 to form an etching area;
s5: placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution to be 81 ℃ and the photoresist removing time to be 12 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of acetone is 51 ℃ and the time is 6 min; then placing the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 72 ℃ and the time is 6min, cleaning with pure water, and drying with nitrogen;
s6: coating an insulating dielectric film on the epitaxial wafer subjected to ICP etching in an etching area, and curing for 30min at 350 ℃, wherein the thickness of the insulating dielectric film is the same as the depth of the ICP etching, so as to form an insulating layer 8; wherein the insulating dielectric film is PI; then a lift-off process is adopted to manufacture a P-surface electrode A on the ITO film 7;
s7: after the P-face electrode A is manufactured, SiO is evaporated on the surface of the epitaxial layer in a PECVD mode2Etching a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B by a photoetching process, and then manufacturing the P-type electrode B by a lift-off process;
s8: manufacturing an N-face electrode 10: after the growth of the P-surface electrode B is finished, thinning the substrate 1 of the epitaxial wafer to 150um, and evaporating an N-surface electrode 10 on the back surface of the thinned substrate 1, wherein the N-surface electrode 10 covers the back surface of the whole substrate 1;
s9: and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core.
In this embodiment, the substrate 1 is a GaN substrate 1; the P-type ohmic contact layer 6 is made of ZnO.
Example 3:
s1: taking a substrate 1, and growing an N-type ohmic contact layer 2, an N-type limiting layer 3, an active region 4, a P-type limiting layer 5 and a P-type ohmic contact layer 6 on the surface of the substrate 1 in sequence by adopting an MOCVD (metal organic chemical vapor deposition) method to obtain an epitaxial wafer;
s2: placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating an ITO film 7 on the P-type ohmic contact layer 6, wherein the ITO film 7 covers the whole surface of the epitaxial wafer; wherein the thickness of the ITO film 7 is
S3: placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film 7 at the moment, and photoresist covers the surfaces of the luminous area A and the luminous area B;
s4: placing the epitaxial wafer P face upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film 7, and etching the area till the area penetrates through the active area 4 to the N-type limiting layer 3 to form an etching area;
s5: placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution at 82 ℃ and the photoresist removing time at 15 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of acetone is 52 ℃ and the time is 7 min; then, putting the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 73 ℃ and the time is 7min, washing with pure water, and drying with nitrogen;
s6: coating an insulating dielectric film on the epitaxial wafer subjected to the ICP etching in an etching area, and curing for 32min at 360 ℃, wherein the thickness of the insulating dielectric film is the same as the depth of the ICP etching, so as to form an insulating layer 8; wherein the insulating dielectric film is BCB; then a lift-off process is adopted to manufacture a P-surface electrode A on the ITO film 7;
s7: after the P-face electrode A is manufactured, SiO is evaporated on the surface of the epitaxial layer in a PECVD mode2Etching a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B by a photoetching process, and then manufacturing the P-type electrode B by a lift-off process;
s8: manufacturing an N-face electrode 10: after the growth of the P-surface electrode B is finished, thinning the substrate 1 of the epitaxial wafer to 170um, and evaporating an N-surface electrode 10 on the back surface of the thinned substrate 1, wherein the N-surface electrode 10 covers the back surface of the whole substrate 1;
s9: and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core.
In the present embodiment, the substrate 1 is a SiC substrate 1; the material of the P-type ohmic contact layer 6 is GZO.
Example 4:
s1: taking a substrate 1, and growing an N-type ohmic contact layer 2, an N-type limiting layer 3, an active region 4, a P-type limiting layer 5 and a P-type ohmic contact layer 6 on the surface of the substrate 1 in sequence by adopting an MOCVD (metal organic chemical vapor deposition) method to obtain an epitaxial wafer;
s2: placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating an ITO film 7 on the P-type ohmic contact layer 6, wherein the ITO film 7 covers the whole surface of the epitaxial wafer; wherein the thickness of the ITO film 7 is
S3: placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film 7 at the moment, and photoresist covers the surfaces of the luminous area A and the luminous area B;
s4: placing the epitaxial wafer P face upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film 7, and etching the area till the area penetrates through the active area 4 to the N-type limiting layer 3 to form an etching area;
s5: placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution at 80 ℃ and the photoresist removing time to be 10 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of the acetone is 50 ℃ and the time is 5 min; then placing the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 70 ℃ and the time is 5min, washing with pure water, and drying with nitrogen;
s6: taking the epitaxial wafer after the ICP etching is finished, and depositing SiO on the surface of the ITO film 7 by adopting a PECVD method2Wherein SiO is2Has a thickness of
Then, a stripping process is adopted to remove SiO covered on the luminous areas A and B on the surface of the ITO2SiO on the surface of the etching area is reserved2Forming an insulating layer 8; then a lift-off process is adopted to manufacture a P-surface electrode A on the ITO film 7;
s7: after the P-surface electrode A is manufactured, a SiO2 layer is evaporated on the surface of the epitaxial layer in a PECVD (plasma enhanced chemical vapor deposition) mode, a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B are corroded through a photoetching process, and then the P-type electrode B is manufactured through a lift-off process;
s8: manufacturing an N-face electrode 10: after the growth of the P-surface electrode B is finished, thinning the substrate 1 of the epitaxial wafer to 140um, and evaporating an N-surface electrode 10 on the back surface of the thinned substrate 1, wherein the N-surface electrode 10 covers the back surface of the whole substrate 1;
s9: and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core.
In this embodiment, the substrate 1 is a silicon substrate 1; the material of the P-type ohmic contact layer 6 is ITO.
Example 5:
s1: taking a substrate 1, and growing an N-type ohmic contact layer 2, an N-type limiting layer 3, an active region 4, a P-type limiting layer 5 and a P-type ohmic contact layer 6 on the surface of the substrate 1 in sequence by adopting an MOCVD (metal organic chemical vapor deposition) method to obtain an epitaxial wafer;
s2: placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating an ITO film 7 on the P-type ohmic contact layer 6, wherein the ITO film 7 covers the whole surface of the epitaxial wafer; wherein the thickness of the ITO film 7 is
S3: placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film 7 at the moment, and photoresist covers the surfaces of the luminous area A and the luminous area B;
s4: placing the epitaxial wafer P face upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film 7, and etching the area till the area penetrates through the active area 4 to the N-type limiting layer 3 to form an etching area;
s5: placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution to be 81 ℃ and the photoresist removing time to be 12 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of acetone is 51 ℃ and the time is 6 min; then placing the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 72 ℃ and the time is 6min, cleaning with pure water, and drying with nitrogen;
s6: taking the epitaxial wafer after the ICP etching is finished, and depositing SiO on the surface of the ITO film 7 by adopting a PECVD method2Wherein SiO is2Has a thickness of
Then, a stripping process is adopted to remove SiO covered on the luminous areas A and B on the surface of the ITO2SiO on the surface of the etching area is reserved2Forming an insulating layer 8; then a lift-off process is adopted to manufacture a P-surface electrode A on the ITO film 7;
s7: after the P-surface electrode A is manufactured, a SiO2 layer is evaporated on the surface of the epitaxial layer in a PECVD (plasma enhanced chemical vapor deposition) mode, a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B are corroded through a photoetching process, and then the P-type electrode B is manufactured through a lift-off process;
s8: manufacturing an N-face electrode 10: after the growth of the P-surface electrode B is finished, thinning the substrate 1 of the epitaxial wafer to 155um, and evaporating an N-surface electrode 10 on the back surface of the thinned substrate 1, wherein the N-surface electrode 10 covers the back surface of the whole substrate 1;
s9: and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core.
In this embodiment, the substrate 1 is a GaAs substrate 1; the P-type ohmic contact layer 6 is made of ZnO.
Example 6:
s1: taking a substrate 1, and growing an N-type ohmic contact layer 2, an N-type limiting layer 3, an active region 4, a P-type limiting layer 5 and a P-type ohmic contact layer 6 on the surface of the substrate 1 in sequence by adopting an MOCVD (metal organic chemical vapor deposition) method to obtain an epitaxial wafer;
s2: placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating an ITO film 7 on the P-type ohmic contact layer 6, wherein the ITO film 7 covers the whole surface of the epitaxial wafer; wherein the thickness of the ITO film 7 is
S3: placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film 7 at the moment, and photoresist covers the surfaces of the luminous area A and the luminous area B;
s4: placing the epitaxial wafer P face upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film 7, and etching the area till the area penetrates through the active area 4 to the N-type limiting layer 3 to form an etching area;
s5: placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution at 82 ℃ and the photoresist removing time at 15 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of acetone is 52 ℃ and the time is 7 min; then, putting the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 73 ℃ and the time is 7min, washing with pure water, and drying with nitrogen;
s6: taking the epitaxial wafer after the ICP etching is finished, and depositing SiO on the surface of the ITO film 7 by adopting a PECVD method2Wherein SiO is2Has a thickness of
Then, a stripping process is adopted to remove SiO covered on the luminous areas A and B on the surface of the ITO2SiO on the surface of the etching area is reserved2Forming an insulating layer 8; then a lift-off process is adopted to manufacture a P-surface electrode A on the ITO film 7;
s7: after the P-surface electrode A is manufactured, a SiO2 layer is evaporated on the surface of the epitaxial layer in a PECVD (plasma enhanced chemical vapor deposition) mode, a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B are corroded through a photoetching process, and then the P-type electrode B is manufactured through a lift-off process;
s8: manufacturing an N-face electrode 10: after the growth of the P-surface electrode B is finished, thinning the substrate 1 of the epitaxial wafer to 170um, and evaporating an N-surface electrode 10 on the back surface of the thinned substrate 1, wherein the N-surface electrode 10 covers the back surface of the whole substrate 1;
s9: and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core.
In this embodiment, the substrate 1 is a GaAs substrate 1; the material of the P-type ohmic contact layer 6 is GZO.
And (4) conclusion: the light emitting diodes prepared in the embodiments 1 to 6 can generate specific light emitting patterns after being lighted, and the replacement of the light emitting patterns can be selected according to the conduction selection of the P-surface electrode when the light emitting diodes are used, so that the light emitting diodes have excellent use effect when applied to a reflective sighting telescope.
As shown in fig. 3 and 4, which are schematic diagrams of one embodiment, when the diode is manufactured, and the P-side electrode a is turned on, the generated light emitting pattern is a dot (fig. 4, left drawing); when the P-face electrode B is conducted, the generated luminous pattern is a circular ring (the middle graph in FIG. 4); when the P-side electrode A, P and the side electrode B are simultaneously turned on, the light emission pattern is a dot or a circle (fig. 4, right). When the distance of the aiming target is short, the P-surface electrode A can be conducted, and the dot is used for aiming; when the aiming target is far away, the P-surface electrode B can be conducted, and the aiming is carried out through a circular ring; meanwhile, the round points and the circular rings can be used for aiming at the same time according to the requirement, and the aiming precision is further improved.
The invention discloses a light-emitting diode with variable patterns and a preparation method thereof, the light-emitting diode is simple in structure and reasonable in step design, the prepared light-emitting diode can be used independently without being matched with a reticle, the light-emitting diode can be used for emitting the required patterns, and the advantages of simple structure and low power consumption are ensured while the utilization rate of a light source is improved; meanwhile, the luminous pattern of the diode prepared by the technical scheme has variability, can be transformed according to the distance between the reflecting sighting telescope and the target, and has higher practicability.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (10)
1. A light emitting diode having a variable pattern, comprising: the diode comprises an epitaxial wafer, an ITO film (7) is evaporated on the upper surface of the epitaxial wafer, a plurality of luminous areas and etching areas are arranged on the ITO film (7), a P-surface electrode (9) is correspondingly arranged on each luminous area, and adjacent P-surface electrodes (9) are insulated and separated; an insulating layer (8) is deposited on the surface of the etching area, and an N-surface electrode (10) is evaporated on the end face of one side of the epitaxial wafer, which is far away from the ITO film (7).
2. The led of claim 1, wherein: the number of the luminous areas is m, the number of the P-surface electrodes (9) is n, and the luminous patterns which can be generated by the diode are q, then: m is n, q is 2n-1。
3. The led of claim 1, wherein: the luminous zone comprises a luminous zone A and a luminous zone B, and the P-surface electrode (9) comprises a P-surface electrode A, P surface electrode B; the P-surface electrode A controls the light emitting area A to emit light, and the P-surface electrode B controls the light emitting area B to emit light.
4. The light-emitting diode with variable patterns according to claim 3, wherein: the luminous pattern of the luminous zone A is circular, and the luminous pattern of the luminous zone B is circular.
5. The led of claim 1, wherein: the epitaxial wafer comprises a substrate (1), wherein an N-type ohmic contact layer (2), an N-type limiting layer (3), an active region (4), a P-type limiting layer (5) and a P-type ohmic contact layer (6) are sequentially grown on the surface of the substrate (1) from bottom to top;
the substrate (1) is any one of GaAs, GaN, SiC and silicon; the material of the P-type ohmic contact layer (6) is any one of ITO, ZnO and GZO.
6. The light-emitting diode with variable patterns according to claim 5, wherein: the etching depth of the etching area is the distance from the ITO film (7) to the N-type limiting layer (3).
7. A method for preparing a light emitting diode with a variable pattern is characterized in that: the method comprises the following steps:
1) growing an epitaxial wafer;
2) evaporation of the ITO film (7);
3) photoetching and ICP etching to prepare a light emitting area;
4) manufacturing a P-surface electrode (9);
5) manufacturing an N-face electrode (10);
6) and cutting to obtain the tube core.
8. The method of claim 7, wherein the step of forming the light emitting diode comprises: the method comprises the following steps:
1) and (3) growing the epitaxial wafer: taking a substrate (1), and growing an N-type ohmic contact layer (2), an N-type limiting layer (3), an active region (4), a P-type limiting layer (5) and a P-type ohmic contact layer (6) on the surface of the substrate (1) in sequence by adopting an MOCVD method to obtain an epitaxial wafer;
2) deposition of ITO film (7): placing the epitaxial wafer into an electron beam evaporation table with the N surface facing downwards and the P surface facing upwards, and evaporating an ITO film (7) on the P-type ohmic contact layer (6)The ITO film (7) covers the whole epitaxial wafer surface; wherein the thickness of the ITO film (7) is
3) Photoetching and ICP etching to prepare a light emitting area;
a) placing the P surface of the epitaxial wafer on a sucker of a spin coater upwards, coating photoresist, and exposing a luminous pattern of a luminous area A and a luminous pattern of a luminous area B; developing and corroding are carried out, a luminous area A and a luminous area B are formed on the surface of the ITO film (7), and photoresist covers the surfaces of the luminous area A and the luminous area B;
b) placing the P surface of the epitaxial wafer upwards in an etching machine, carrying out ICP (inductively coupled plasma) etching on the area, which is not covered by the photoresist, on the surface of the ITO film (7), and etching to a depth which penetrates through the active region (4) to the N-type limiting layer (3) to form an etching region;
c) placing the etched epitaxial wafer into a photoresist removing solution, controlling the temperature of the photoresist removing solution at 80-82 ℃ and the photoresist removing time at 10-15 min; then placing the epitaxial wafer into an acetone solution, wherein the temperature of the acetone is 50-52 ℃, and the time is 5-7 min; then putting the epitaxial wafer into ethanol, wherein the temperature of the ethanol is 70-73 ℃, the time is 5-7min, cleaning with pure water, and drying with nitrogen;
4) manufacturing a P-face electrode (9):
a) taking the epitaxial wafer processed in the step 3), manufacturing an insulating layer (8) on the surface of the etching area, and manufacturing a P-surface electrode A on the ITO film (7) by adopting a lift-off process;
b) after the P-face electrode A is manufactured, SiO is evaporated on the surface of the epitaxial layer in a PECVD mode2Etching a pad area of the P-surface electrode A and an ohmic contact area of the P-type electrode B by a photoetching process, and then manufacturing the P-type electrode B by a lift-off process;
5) production of an N-face electrode (10): after the growth of the P-surface electrode B is finished, thinning the substrate (1) of the epitaxial wafer to 140-170um, and evaporating an N-surface electrode (10) on the back surface of the thinned substrate (1), wherein the N-surface electrode (10) covers the whole back surface of the substrate (1);
6) and placing the epitaxial wafer P face upwards on a sawing machine, and performing full cutting to obtain a tube core.
9. The method of claim 8, wherein the step of forming the light emitting diode comprises: the method comprises the following steps: during the operation of the step a) in the step 4), coating an insulating dielectric film on the epitaxial wafer after the ICP etching is finished in an etching area, and curing for 28-32min at the temperature of 340-; wherein the insulating dielectric film is any one of BCB and PI.
10. The method of claim 8, wherein the step of forming the light emitting diode comprises: the method comprises the following steps: during the operation of the step a) of the step 4), taking the epitaxial wafer after ICP etching is finished, and depositing SiO on the surface of the ITO film (7) by adopting a PECVD method2Wherein SiO is2Has a thickness of
Then, a stripping process is adopted to remove SiO covered on the luminous areas A and B on the surface of the ITO2SiO on the surface of the etching area is reserved2An insulating layer (8) is formed.
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