CN112701090A

CN112701090A - Packaging structure and packaging method

Info

Publication number: CN112701090A
Application number: CN202011496107.1A
Authority: CN
Inventors: 卢玉溪; 曾昭孔; 陈武伟; 马晓波
Original assignee: Suzhou Tongfu Chaowei Semiconductor Co ltd
Current assignee: Suzhou Tongfu Chaowei Semiconductor Co ltd
Priority date: 2020-12-17
Filing date: 2020-12-17
Publication date: 2021-04-23

Abstract

The application discloses packaging structure and packaging method, wherein, packaging structure includes: the chip and the passive elements are fixedly arranged on the substrate; the heat dissipation structure comprises a heat dissipation plate and a protection plate which are stacked up and down; the heat dissipation plate is in contact with the chip and is used for providing a heat dissipation surface for the packaging structure; the protective plate comprises a side wall and a transverse wall arranged at the top of the side wall, and the side wall is arranged between the chip and the passive element and surrounds the chip; the transverse wall is arranged above the passive element; the exhaust passage, the heat dissipation plate and the protection plate are in non-sealing contact and form the exhaust passage. The packaging structure that this application embodiment provided keeps apart chip and passive component through the protection shield, shelters from the top of passive component simultaneously, during follow-up melting solder layer, can prevent that the material of fused solder layer from sputtering to passive component, is favorable to preventing passive component and chip to take place the short circuit, improves packaging structure's performance.

Description

Packaging structure and packaging method

Technical Field

The present application relates generally to the field of semiconductor manufacturing technology, and more particularly, to a package structure and a package method.

Background

In the semiconductor industry, high-end processors generally have high power consumption and high requirements for heat dissipation. Compared with the conventional silicone grease material, the metal material (indium, indium alloy, silver alloy, etc.) is the material with the best heat dissipation performance in the industry at present. In order to reduce the substrate cost, reduce the signal transmission delay, miniaturize the device, and gradually replace the conventional Pin Grid Array (PGA) Package for packaging high-end processor chips, Ball Grid Array (BGA) packages are being developed.

Compared with other metal materials, the heat conductivity and physical properties of indium metal make the heat dissipation performance of indium metal much better than that of other metal materials. But the melting point of indium is only (156 ℃) and is far lower than that of tin (232 ℃), and in BGA packaging (ball mounting process), the indium can not bear the melting overflow of an excessively high reflow soldering temperature. Reflow using an indium heat sink typically requires the use of a flux. The indium sheet is welded by reducing the soldering flux at present, the soldering flux can generate gas when reducing the oxide films on the welded surface and the solder surface during welding, the gas can extrude the indium sheet, and the gas volatilized at high temperature can sputter the melted indium sheet onto a passive component to cause the failure of a chip.

Original FCPGA (Flip Chip Pin Grid Array Package) product uses epoxy glue to coat on the electric capacity as the protective layer, prevent the indium splash, and FCBGA product need pass through high temperature reflow soldering process (ball planting technology), this kind of glue can't bear high temperature (>240 ℃), except that gluing itself can the fracture, electric capacity bottom remaining gas and scaling powder can expand when passing through high temperature, make the protective effect of glue inefficacy, so even select other high temperature resistant glues also can't use the product at BGA FCBGA.

Disclosure of Invention

In view of the above-mentioned defects or shortcomings in the prior art, it is desirable to provide a package structure and a package method, which can avoid the short circuit problem of the passive component caused by the metal solder in the high-temperature reflow soldering process.

In one aspect, the present application provides a package structure comprising

The chip-type packaging structure comprises a substrate, wherein a chip and a plurality of passive elements are fixedly arranged on the substrate;

the heat dissipation structure comprises a heat dissipation plate and a protection plate which are vertically stacked;

the heat dissipation plate is in contact with the chip and is used for providing a heat dissipation surface for the packaging structure;

the protective plate comprises a side wall and a transverse wall arranged at the top of the side wall, and the side wall is arranged between the chip and the passive element and surrounds the chip; the transverse wall is arranged above the passive element;

and the heat dissipation plate is in non-sealing contact with the protection plate and forms the exhaust channel.

Further, a first opening is formed around the side wall, a first passage is formed between the heat dissipation plate and the protection plate at the position of the first opening, and the chip is in contact with the heat dissipation plate through the first passage.

Further, a metal heat conduction layer is arranged between the chip and the heat dissipation plate, and the metal heat conduction layer is selected from one or more of indium, indium alloy and silver alloy.

Further, the projection of the side wall on the substrate surface surrounds the chip, and the projection on the substrate surface covers the passive element.

Optionally, the projection shape of the side wall on the substrate surface includes a circle, a rectangle or a square.

Optionally, the heat dissipation plate is fixedly connected with the protection plate through a side plate, and the protection plate is fixedly disposed on the substrate through the side wall.

Further, the side plate is arranged around the first channel, and the exhaust channel is arranged on the side plate.

Further, the side plate comprises a plurality of upright posts, and the exhaust channel is formed between the upright posts.

Furthermore, a plurality of reinforcing plates parallel to the heat dissipation plate are fixedly arranged on the side plate, and the reinforcing plates are arranged between the heat dissipation plate and the protection plate and avoid the first channel.

In another aspect, the present application further provides a packaging method for the above-mentioned package structure, including:

providing a substrate, wherein a chip is arranged on part of the surface of the substrate, a passive element positioned around the chip is further arranged on the surface of the substrate, and the passive element and the chip are mutually separated;

forming a metal heat conduction layer on the top surface of the chip, wherein soldering flux is arranged in the metal heat conduction layer;

providing a heat dissipation structure, wherein the side wall of the protection plate contains the chip, the transverse wall covers the passive element, and the heat dissipation plate is in contact with the metal heat conduction layer on the chip;

fixing the side wall of the heat dissipation structure on the substrate through an adhesive;

performing high-temperature reflow soldering, wherein the temperature adopted by the high-temperature reflow soldering is higher than the melting point of the metal heat conduction layer;

discharging airflow generated in the high-temperature reflow soldering process from the exhaust channel;

and welding the heat dissipation plate, the chip and the metal heat conduction layer together through a high-temperature reflow soldering process.

The technical scheme provided by the embodiment of the application can have the following beneficial effects:

the packaging structure that this application embodiment provided keeps apart chip and passive component through the protection shield, shelters from the top of passive component simultaneously, during follow-up melting solder layer, can prevent that the material of fused solder layer from sputtering to passive component, is favorable to preventing passive component and chip to take place the short circuit, improves packaging structure's performance.

The packaging structure that this application embodiment provided, through the exhaust passage who sets up between protective plate and heating panel, directly discharge packaging structure with the air current that flux produced or the metallic solder that splashes among the high temperature reflow soldering process, further prevent the corrosion of metallic solder that splashes to passive component.

The packaging structure that this application embodiment provided, through the heat radiation structure of protection shield and heating panel integration, save the die sinking technology, and the laminating position of heat radiation structure and base plate only sets up in lateral wall position department, need not to increase extra laminating process, saves the cost of generating.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:

fig. 1 is a schematic structural diagram of a package structure according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a heat dissipation structure according to an embodiment of the present application;

fig. 3 is a bottom view of a heat dissipation structure provided in an embodiment of the present application;

FIG. 4 is a schematic perspective view of a first side plate projected on a surface of a protective plate according to an embodiment of the present application;

FIG. 5 is a schematic perspective view of a second side plate provided in an embodiment of the present application on a surface of a protective plate;

FIG. 6 is a schematic perspective view of a third side panel provided in an embodiment of the present application on a surface of a protective panel;

fig. 7 is a schematic structural diagram of another package structure according to an embodiment of the present application.

1. A substrate; 2. a chip; 3. a passive element; 4. a metal heat conducting layer; 5. a heat dissipation structure; 6. a heat dissipation plate; 7. a protection plate; 8. a side wall; 9. a transverse wall; 10. an exhaust passage; 11. a first opening; 12. a first channel; 13. a column; 14. a plate material; 15. salient points; 16. a solder ball; 17. bottom sealing glue; 18. a binder; 19. a side plate; 20. and a reinforcing plate.

Detailed Description

The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.

It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.

Referring to fig. 1-3 in detail, the present application provides a package structure comprising

The chip-type packaging structure comprises a substrate 1, wherein a chip 2 and a plurality of passive elements 3 are fixedly arranged on the substrate 1;

the heat dissipation structure 5 comprises a heat dissipation plate 5 and a protection plate 7 which are stacked up and down;

the heat dissipation plate 5 is in contact with the chip 2 and is used for providing a heat dissipation surface for the packaging structure;

the protective plate 7 comprises a side wall 8 and a transverse wall 9 arranged on the top of the side wall 8, wherein the side wall 8 is arranged between the chip 2 and the passive element 3 and surrounds the chip 2; the transverse wall 9 is arranged above the passive element 3;

and an exhaust passage 10, which is in non-sealing contact between the heat dissipation plate 5 and the protection plate 7 and forms the exhaust passage 10.

Wherein the side wall 8 surrounds and forms a first opening 11, a first passage 12 is formed between the heat dissipation plate 5 and the protection plate 7 at the position of the first opening 11, and the chip 2 is in contact with the heat dissipation plate 5 through the first passage 12. A metal heat conduction layer 4 is arranged between the chip 2 and the heat dissipation plate 5, and the metal heat conduction layer 4 is selected from one or more of indium, indium alloy and silver alloy.

It should be noted that the side wall forms an annular space around the side wall, the top end of the annular space is provided with an opening, the opening is the first opening 11, the first opening extends upwards to extend from the top end of the side wall to the bottom surface of the heat dissipation plate 6, the empty area is the first channel 12, the top of the chip 2 may be higher than the top of the side wall 8 or lower than the top of the side wall 8, and after the metal heat conduction layer is arranged on the top surface of the chip, the metal heat conduction layer passes through the first channel and extends from the top surface of the chip to the bottom surface of the heat dissipation plate to contact with the heat dissipation.

It should be noted that, in order to increase the area of the metal heat conduction layer, the transverse wall 9 extends from the top of the side wall 8 to the periphery, and does not extend to the inside of the annular space formed by the side wall, and the extending direction and the extending length of the transverse wall 9 can be adaptively selected according to the passive element 3 around the chip 2.

And subsequently, the metal heat conduction layer 4 is subjected to melting treatment, so that the chip 2 and the heat dissipation structure 5 are melted together, and heat generated by the chip 2 can be released out through the heat dissipation structure 5, thereby being beneficial to improving the reliability of the packaging structure.

In a specific arrangement, the projection of the sidewall 8 on the surface of the substrate 1 surrounds the chip 2, and the projection on the surface of the substrate 1 covers the passive component 3. Optionally, the projection shape of the sidewall 8 on the surface of the substrate 1 includes a circle, a rectangle or a square. The passive element 3 includes: one or more combinations of resistors, capacitors and inductors.

In the specific arrangement, the side wall 8 surrounds and forms a ring structure, at least one chip 2 is accommodated in the ring structure in a surrounding mode, the side wall 8 separates the chip 2 from the surrounding passive elements 3, the top end of the side wall 8 is provided with a transverse wall 9, and the transverse wall 9 at least covers the upper portion of one passive element 3. It should be noted that the transverse wall 9 is not in contact with the passive component 3, and if the solder points on the surface of the passive component 3 are in contact with the transverse wall 9, the solder points on the surface of the passive component 3 will easily flow along the surface of the transverse wall 9 during the high temperature reflow process, resulting in connection between the solder points on the surface of the passive component 3. The solder layer and the passive element 3 are prevented from being bridged, the chip 2 is prevented from being short-circuited, and the performance of the packaging structure is improved.

The heat sink 5 and the protective plate 7 are fixedly connected by a side plate 19, and the protective plate 7 is fixedly provided on the substrate 1 by the side wall 8. The side plate 19 is arranged around the first channel 12, and the projection of the side plate 19 on the surface of the protection plate 7 does not completely surround the first channel 12. The side wall 8 and the substrate 1 are fixedly connected by an adhesive 18.

In some embodiments, as shown in fig. 4, the side plate 19 includes a plurality of pillars 13, and the pillars 13 form the exhaust passage 10 therebetween.

In some embodiments, as shown in fig. 5, the side plate 19 is two opposite plates 14, and the exhaust channel 10 is formed between the two plates 14.

In some embodiments, as shown in fig. 6, the side plate 19 is a semi-circular plate 14 disposed around the first channel 12, and the exhaust channel 10 is formed between two ends of the plate 14.

It should be noted that the arrangement of the side plate 19 may be selected according to a specific application scenario, and the arrangement of the side plate 19 determines the position of the exhaust channel 10, for example, when there are few passive components 3 around the chip 2 or the exhaust channel is concentrated in a certain area, the position of the first channel 12 in the direction may be shielded by the side plate 19, so as to prevent solder from splashing onto the passive components 3 in the subsequent high-temperature reflow soldering process.

In addition, the arrangement of the side plate 19 also determines the contact area between the heat sink 5 and the protective plate 7, and can increase the rigidity of the heat sink structure 5 and relieve the shear stress caused by the difference in thermal expansion coefficient between the chip 2 and the heat sink 5. Since the substrate 1 may be warped due to a difference between the thermal expansion coefficients of the heat dissipation structure 5 and the substrate 1 when heat is applied in a subsequent process, warpage of the substrate 1 is reduced by increasing the rigidity of the heat dissipation structure 5.

Further, since the metal solder melts, warping occurs between the heat dissipation plate 5 and the substrate 1 in the direction opposite to each other, and a contraction force is generated at the soldered portion, so that the solder applied to the substrate 1 does not come into contact with the heat dissipation plate 5, and the influence of warping of the substrate 1 on the metal solder can be reduced by increasing the rigidity of the heat dissipation structure 5.

In order to further reduce the warpage of the substrate 1, a plurality of reinforcing plates 20 are fixedly disposed on the side plates 19 in parallel with the heat dissipation plate 5, and as shown in fig. 7, the reinforcing plates 20 are disposed between the heat dissipation plate 5 and the protection plate 7 and are spaced from the first channel 12.

s1, providing a substrate 1, wherein a chip 2 is arranged on a part of the surface of the substrate 1, a passive element 3 positioned around the chip 2 is further arranged on the surface of the substrate 1, and the passive element 3 and the chip 2 are mutually separated;

s2, forming a metal heat conduction layer 4 on the top surface of the chip 2, wherein the metal heat conduction layer 4 is internally provided with soldering flux;

s3, providing a heat dissipation structure 5, wherein the side wall 8 of the protection board 7 accommodates the chip 2, the transverse wall 9 covers the passive component 3, and the heat dissipation board 5 is in contact with the metal heat conduction layer 4 on the chip 2;

s4, fixing the side wall 8 of the heat dissipation structure 5 on the substrate 1 by an adhesive;

s5, performing high-temperature reflow soldering, wherein the temperature adopted by the high-temperature reflow soldering is higher than the melting point of the metal heat conduction layer 4; the gas flow generated in the high-temperature reflow soldering process is discharged from the exhaust passage 10;

and S6, welding the heat dissipation plate 5, the chip 2 and the metal heat conduction layer 4 together through a high-temperature reflow soldering process.

It should be noted that, in some embodiments, the material of the heat dissipation structure 5 is glass, rubber or resin.

In other embodiments, the material of the heat dissipation structure 5 is metal, and the surface of the heat dissipation structure 5 further has an insulating isolation layer. The insulating isolation layer can prevent the solder on the surface of the passive element 3 from contacting the heat dissipation structure 5 to cause short circuit.

For example, the heat dissipation structure 5 may be made of copper material. The manufacturing method of the heat dissipation structure 5 includes:

forming the copper base material in a corresponding grinding tool under high-pressure heating by adopting a forging process; the multiple assemblies are connected by solder paste welding or heat conducting paste in a combination mode; by adopting a cutting and polishing mode, the gap between planes is realized by cutting and polishing (high-speed cutting, laser cutting and the like) processes, and turning, drilling, milling, grinding and other machine tools are realized.

It should be noted that, the contact position between the chip 2 and the substrate 1 is provided with a bump 15, which is beneficial to electrically connecting the chip 2 and the substrate 1. After the formation of the bump 15, the method further includes: and forming an underfill adhesive 17 on the bottom surface of the chip 2, and fixing the chip on the substrate by the underfill adhesive filling and curing process. The underfill adhesive 17 surrounds the bumps 15 and exposes the top surfaces of the bumps 15, which is beneficial for the electrical connection between the bumps 15 and the bottom surface of the chip. The underfill is used to relieve shear stress between the chip 2 and the substrate 1 due to a difference in thermal expansion coefficient.

The specific reflow soldering process comprises two steps, wherein in the first step, the heat dissipation plate 5, the chip 2 and the metal heat conduction layer 4 are soldered together through a high-temperature reflow soldering process; the second step is to solder the solder balls 16 to the bottom of the substrate 1 using a high temperature reflow process. The temperature of the first high-temperature reflow soldering process is higher than the melting point of the metal heat conduction layer 4, and the temperature of the second high-temperature reflow soldering process is higher than the melting point of the solder balls 16. The solder ball 16 is made of tin, tin-silver alloy, tin-silver-copper alloy, tin-lead alloy or gold-containing alloy.

It should be noted that the above package structure or chip may be applied to electronic devices such as mobile phones, tablet computers, electronic books, computers, and devices that need to mount a chip or a gold-backed chip. The above different embodiments may be cross-referenced. For example, while one embodiment has been described with some technical details of one aspect, reference may be made to the description of other embodiments.

It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

It should also be understood that the above-listed embodiments of the chip packaging method may be performed by a robot or a numerical control machining method, and that the device software or processes for performing the chip packaging method may be performed by executing computer program code stored in a memory.

It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, as used herein, refer to an orientation or positional relationship indicated in the drawings that is solely for the purpose of facilitating the description and simplifying the description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and is therefore not to be construed as limiting the invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.

Unless defined otherwise, technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Terms such as "disposed" and the like, as used herein, may refer to one element being directly attached to another element or one element being attached to another element through intervening elements. Features described herein in one embodiment may be applied to another embodiment, either alone or in combination with other features, unless the feature is otherwise inapplicable or otherwise stated in the other embodiment.

The present invention has been described in terms of the above embodiments, but it should be understood that the above embodiments are for purposes of illustration and description only and are not intended to limit the invention to the scope of the described embodiments. It will be appreciated by those skilled in the art that many variations and modifications may be made to the teachings of the invention, which fall within the scope of the invention as claimed.

Claims

1. A package structure, comprising:

2. The package structure according to claim 1, wherein the side wall surrounds a first opening, a first passage is formed between the heat dissipation plate and the protection plate at a position of the first opening, and the chip is in contact with the heat dissipation plate through the first passage.

3. The package structure according to claim 1, wherein a metal heat conduction layer is disposed between the chip and the heat dissipation plate, and the metal heat conduction layer is selected from one or more of indium, indium alloy, and silver alloy.

4. The package structure according to claim 1, wherein a projection of the sidewall on the substrate surface surrounds the chip, and the projection on the substrate surface covers the passive component.

5. The package structure of claim 4, wherein a projected shape of the sidewall on the surface of the substrate comprises a circle, a rectangle, or a square.

6. The package structure of claim 2, wherein the heat dissipation plate is fixedly connected to the protection plate through a side plate, and the protection plate is fixedly disposed on the substrate through the side wall.

7. The package structure of claim 6, wherein the side plate is disposed around the first channel, and the exhaust channel is disposed on the side plate.

8. The package structure of claim 7, wherein the side plate comprises a plurality of posts, the posts forming the exhaust channel therebetween.

9. The package structure of claim 6, wherein the side plate is fixedly disposed with a plurality of reinforcing plates parallel to the heat dissipation plate, the reinforcing plates being disposed between the heat dissipation plate and the protection plate and avoiding the first channel.

10. A packaging method for a package structure as claimed in any one of claims 1 to 9, comprising: