CN112698364B - Compatible modern GNSS signal ranging code generation method - Google Patents
Compatible modern GNSS signal ranging code generation method Download PDFInfo
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- CN112698364B CN112698364B CN202011436153.2A CN202011436153A CN112698364B CN 112698364 B CN112698364 B CN 112698364B CN 202011436153 A CN202011436153 A CN 202011436153A CN 112698364 B CN112698364 B CN 112698364B
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- 238000013461 design Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
- G01S19/13—Receivers
- G01S19/24—Acquisition or tracking or demodulation of signals transmitted by the system
- G01S19/30—Acquisition or tracking or demodulation of signals transmitted by the system code related
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
- G01S19/13—Receivers
- G01S19/35—Constructional details or hardware or software details of the signal processing chain
- G01S19/37—Hardware or software details of the signal processing chain
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- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
The invention discloses a compatible modern GNSS signal ranging code generation method, which comprises the following steps: storing the L sequence, the phase difference, the cut-off point and the ranging code to a CPU end; performing write initialization configuration on the Ram according to the storage content of the CPU end; performing read operation on the Ram; if the Ram is stored as an L sequence, inputting the L sequence into a digital circuit end, and generating a pilot frequency branch ranging code and a data branch ranging code through a time division multiplexing calculation unit; and if the Ram stores the ranging codes, outputting the ranging codes of the pilot frequency branch and the data branch. The invention transfers the generation of Weil code to the digital circuit end, and generates the needed pilot frequency branch ranging code and data branch ranging code in a time division multiplexing mode, thereby reducing the calculation amount of the CPU end and saving the storage resource.
Description
Technical Field
The invention relates to the field of satellite navigation positioning, in particular to a compatible modern GNSS signal ranging code generation method.
Background
The method for generating the ranging code is different from the original Gold code generation mode, wherein the B1C and L1C signals are generated in a Weil code cutting mode, and the E1 signal is a Ram code. The pilot and data branch ranging code periods of the B1C and L1C signals are 10ms, the chip length is 10230 chips, the pilot and data branch ranging code periods of the E1 are 4ms, and the chip length is 4092 chips. The code loop and carrier loop of the B1C, L1C, E1 signal track pilot frequency branches, and the demodulation text uses data branches. The conventional method is that a digital circuit end stores the ranging codes of the pilot frequency branch and the ranging codes of the data branch in a Ram and then outputs the ranging codes in a query mode; by configuring different ranging codes, one channel can be compatible with the ranging code output of three signals, and the conventional method for generating the ranging codes is shown in fig. 1. In the method, each channel occupies 20460bits of storage resources, and if the number of the tracking channels is 64, the storage resources of a 64X 20460bits digital circuit end are required to be occupied.
Another disadvantageous aspect is that, because the B1C and L1C signal ranging codes are generated in a Weil code cut-off manner, the Weil codes are generated as L sequences, if the L sequences are stored at the CPU end, the Weil codes of the corresponding satellites need to be calculated before each channel is opened, which can occupy a large amount of CPU computing resources; if the CPU end stores the ranging codes for each satellite, a large amount of storage resources of the CPU are occupied.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a compatible modern GNSS signal ranging code generation method.
The aim of the invention is realized by the following technical scheme:
a compatible modern GNSS signal ranging code generation method comprises the following steps:
storing the L sequence, the phase difference, the cut-off point and the ranging code to a CPU end;
performing write initialization configuration on the Ram according to the storage content of the CPU end;
performing read operation on the Ram;
if the Ram is stored as an L sequence, inputting the L sequence into a digital circuit end, and generating a pilot frequency branch ranging code and a data branch ranging code through a time division multiplexing calculation unit;
if the Ram stores the ranging codes, outputting pilot branch ranging codes and data branch ranging codes;
the design of the time division multiplexing calculation unit comprises the following steps:
determining the time period between every two code clocks of the time division multiplexing calculation unit according to the code rate of the ranging code corresponding to the L sequence and the working rate of the system clock;
at the moment of the count value 0, adding a pilot frequency branch phase difference as a read address on the basis of the chip count value; outputting a corresponding L sequence value lp_w from the Ram;
at the moment of count value 1, adding the pilot frequency branch phase difference and the interception point on the basis of the chip count value, and then taking the modulus of the byte length of the L sequence as a read address; outputting a corresponding L sequence value lp_wp from the Ram;
at the moment of count value 2, carrying out exclusive OR on lp_w and lp_wp to obtain a pilot frequency branch ranging code; meanwhile, on the basis of the chip count value, adding the phase difference of the data branch as a read address, and outputting a corresponding L sequence value Ld_w from the Ram;
at the moment of count value 3, adding the phase difference of the data branch and the interception point on the basis of the chip count value, then taking a modulus of the byte length of the L sequence, taking the modulus value as a read address, and outputting a corresponding L sequence value Ld_wp from the Ram;
and at the moment of the count value 4, carrying out exclusive OR on Ld_w and Ld_wp to obtain a data branch ranging code, and entering the next time period.
Further, the L sequence comprises a 10243bit L sequence and a 10223bit L sequence.
Further, the 10243bit L sequence is used for generating a ranging code of the B1C signal; the 10223bitsL sequence is used to generate a ranging code for the L1C signal.
Further, the ranging code is 8184bits ranging code, and is used for generating the ranging code of the E1 signal.
Further, the Ram is 10243bits in total, and the Ram includes a first portion and a second portion.
Further, the storage length of the first part is 4096bits, and the storage content is pilot frequency branch ranging code.
Further, the second part has a storage length of 6147bits, and the storage content is a data branch ranging code.
The invention has the beneficial effects that: the invention transfers the generation of Weil code to the digital circuit end, and generates the needed pilot frequency branch ranging code and data branch ranging code in a time division multiplexing mode, thereby reducing the calculation amount of the CPU end and saving the storage resource.
Drawings
Fig. 1 is a block diagram of a conventional ranging code generation method.
Fig. 2 is a schematic diagram of a ranging code generation method according to the present invention.
Fig. 3 is a timing diagram of B1C signal ranging code generation in the present invention.
Fig. 4 is a schematic diagram of E1 ranging code generation in the present invention.
Detailed Description
For a clearer understanding of technical features, objects, and effects of the present invention, a specific embodiment of the present invention will be described with reference to the accompanying drawings.
Embodiment 1, as shown in fig. 2, is a B1C signal ranging code generating process, which includes the following steps:
storing an L sequence, a phase difference and a cut-off point required by generating the B1C signal ranging code to a CPU end;
performing write initialization configuration on the Ram according to the storage content of the CPU end;
performing read operation on the Ram;
the L sequence is input into a time division multiplexing calculation unit to generate a pilot branch ranging code and a data branch ranging code.
The capacity of the Ram is 10243bits, and the length of the L sequence of the B1C signal ranging code is 10243bits.
The Ram is divided into two parts, wherein the first part is 4096bits, the second part is 6147bits, the first part stores the pilot frequency branch ranging code, and the second part stores the data branch ranging code.
After the L sequence is input into the time division multiplexing calculation unit, the process of generating the pilot frequency branch ranging code and the data branch ranging code comprises the following steps:
the code rate of the B1C signal is 1.023MHz, and the system clock works at 62MHz, so that 60 clocks are arranged between two code reading intervals and are represented by counters 0-59, and a time sequence diagram is shown in FIG. 3;
1) At the time of the count value 0, on the basis of the chip count value, adding a pilot frequency branch phase difference (w) as a read address, and at the time of the count value 1, ram outputs a corresponding L sequence value lp_w;
2) At the moment of count value 1, adding (w+p) the pilot frequency branch phase difference and the interception point on the basis of the chip count value, then taking a modulus to 10243, taking the modulus value as a read address, and outputting a corresponding L sequence value lp_wp at the moment of count value 2 Ram;
3) And (5) at the moment of the count value 2, carrying out exclusive OR on the lp_w and the lp_wp to obtain the pilot frequency branch ranging code. Meanwhile, at the moment, on the basis of a chip count value, a data branch phase difference (w) is added as a read address, and at the moment of 3, a corresponding L sequence value Ld_w is output by the Ram;
4) At the moment of count value 3, adding (w+p) the phase difference of the data branch and the interception point on the basis of the chip count value, then taking a modulus of 10243, taking the modulus value as a read address, and outputting a corresponding L sequence value Ld_wp at the moment of count value 4 Ram;
5) And (4) at the moment of counting value 4, carrying out exclusive OR on Ld_w and Ld_wp to obtain the data branch ranging code.
The L1C signal ranging code generation mode is the same as the B1C signal ranging code, the length of an L sequence required for generating the L1C signal ranging code is 10223bits, the ram storage size meets the requirement, and the program multiplexing mode is the same.
Embodiment 2, as shown in fig. 4, discloses a method for generating an E1 signal ranging code, which includes the following steps:
storing the E1 signal ranging code to a CPU end;
performing write initialization configuration on the Ram according to the storage content of the CPU end;
performing read operation on the Ram;
and outputting the pilot frequency branch ranging code and the data branch ranging code.
Wherein generating pilot branch ranging codes and data branch ranging codes comprises the following steps:
1) At the time of the count value 0, taking the chip count value as a read address, and outputting an E1 signal pilot frequency branch ranging code at the time of the count value 1 Ram;
2) At the time of count 1, the chip count value is shifted up by 4096 as the read address, and at the time of count 2 Ram, the data branch ranging code will be output.
The code rate of the E1 signal is 1.023MHz, the code length is 4092 chips, the period is 4ms, the E1 signal ranging code is defined through the ICD interface file, and the E1 signal ranging code can only be realized through a table look-up mode.
Each channel digital circuit end only needs 10243bits. If the number of the tracking channels is 64, the storage resources of 64× 10243bits are required. Meanwhile, the CPU end only needs to store an L sequence, a phase difference (w), a cut-off point (p) and an E1 signal ranging code; for B1C, L C, there is no need to store a ranging code for each satellite; the conventional method is that the Weil code generation is realized at the CPU end, and the Weil code generation is transplanted to the digital circuit end for realization, so that the calculation amount of the CPU end and the storage resource of the CPU end are reduced; the conventional method occupies two Rams of 10230bits, and the invention only needs to store L sequences of 10243bits at most in a time division multiplexing mode, thereby saving nearly half of storage resources at the digital circuit end.
The invention transfers the generation of Weil code to the digital circuit end, and generates the needed pilot frequency branch ranging code and data branch ranging code in a time division multiplexing mode, thereby reducing the calculation amount of the CPU end and saving the storage resource.
The foregoing has shown and described the basic principles and main features of the present invention and the advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (7)
1. A compatible modern GNSS signal ranging code generation method is characterized by comprising the following steps:
storing the L sequence, the phase difference, the cut-off point and the ranging code to a CPU end;
performing write initialization configuration on the Ram according to the storage content of the CPU end;
performing read operation on the Ram;
if the Ram is stored as an L sequence, inputting the L sequence into a digital circuit end, and generating a pilot frequency branch ranging code and a data branch ranging code through a time division multiplexing calculation unit;
if the Ram stores the ranging codes, outputting pilot branch ranging codes and data branch ranging codes;
the design of the time division multiplexing calculation unit comprises the following steps:
determining the time period between every two code clocks of the time division multiplexing calculation unit according to the code rate of the ranging code corresponding to the L sequence and the working rate of the system clock;
at the moment of the count value 0, adding a pilot frequency branch phase difference as a read address on the basis of the chip count value; outputting a corresponding L sequence value lp_w from the Ram;
at the moment of count value 1, adding the pilot frequency branch phase difference and the interception point on the basis of the chip count value, and then taking the modulus of the byte length of the L sequence as a read address; outputting a corresponding L sequence value lp_wp from the Ram;
at the moment of count value 2, carrying out exclusive OR on lp_w and lp_wp to obtain a pilot frequency branch ranging code; meanwhile, on the basis of the chip count value, adding the phase difference of the data branch as a read address, and outputting a corresponding L sequence value Ld_w from the Ram;
at the moment of count value 3, adding the phase difference of the data branch and the interception point on the basis of the chip count value, then taking a modulus of the byte length of the L sequence, taking the modulus value as a read address, and outputting a corresponding L sequence value Ld_wp from the Ram;
and at the moment of the count value 4, carrying out exclusive OR on Ld_w and Ld_wp to obtain a data branch ranging code, and entering the next time period.
2. The method for generating compatible modern GNSS signal ranging codes of claim 1, wherein the L sequence comprises a 10243bit L sequence and a 10223bit L sequence.
3. The method for generating ranging codes for compatible modern GNSS signals according to claim 2, wherein said 10243bitsL sequence is used to generate ranging codes for B1C signals; the 10223bitsL sequence is used to generate a ranging code for the L1C signal.
4. The method for generating ranging codes for compatible modern GNSS signals of claim 2 wherein said ranging codes are 8184bits ranging codes for generating ranging codes for E1 signals.
5. The method of claim 1, wherein the Ram is 10243bits in total, and the Ram comprises a first portion and a second portion.
6. The method for generating compatible modern GNSS signal ranging codes of claim 5, wherein said first portion has a memory length of 4096bits and a memory content of pilot branch ranging codes.
7. The method for generating compatible modern GNSS signal ranging codes of claim 5, wherein said second portion has a memory length of 6147bits and the memory content is a data branch ranging code.
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