CN112684548A

CN112684548A - Optical module

Info

Publication number: CN112684548A
Application number: CN201910992984.9A
Authority: CN
Inventors: 李福宾
Original assignee: Hisense Broadband Multimedia Technology Co Ltd
Current assignee: Hisense Broadband Multimedia Technology Co Ltd
Priority date: 2019-10-18
Filing date: 2019-10-18
Publication date: 2021-04-20

Abstract

The embodiment of the application shows an optical module, which comprises a micro control unit integrated on a printed circuit board, a first chip, a second chip and a triode. By adopting the optical module shown in the embodiment of the application, a first pin of the micro control unit is respectively connected with the first chip and the second chip through the triode, the first pin of the micro control unit is controlled to be communicated with the first chip in an initial state, and the micro control unit can communicate with the first chip. The communication between the first pin of the micro control unit and the second chip is controlled through the level of the enable signal output by the second pin of the micro control unit, and then the micro control unit can communicate with the second chip. It can be seen that the optical module shown in the embodiment of the present application can achieve the purpose of controlling two chips through one first pin of the micro control unit, and the reuse rate of the pins of the micro control unit is improved.

Description

Optical module

Technical Field

The embodiment of the application relates to the optical communication technology. And more particularly, to a light module.

Background

An optical module generally refers to an integrated module for photoelectric conversion, which is generally packaged by an optical device (generally including a light receiving device and a light emitting device) and a Printed Circuit Board (PCB). In the signal conversion process, the light receiving device can convert the light signal into an electric signal after receiving the light signal, and then the electric signal is transmitted to the light emitting device through the printed circuit board; the light emitting device converts the electrical signal into an optical signal and emits the optical signal after receiving the electrical signal, thereby realizing the conversion of the photoelectric signal.

The printed circuit board is provided with a Micro Control Unit (MCU), wherein the MCU controls the normal operation of the whole module by executing a program of the MCU. This requires the micro control unit to be connected to each component of the optical module via pins to control the normal operation of the entire module. For example, a pin of the micro control unit is connected to an RSSI pin of the transimpedance amplifier, so that the micro control unit samples a voltage of the RSSI signal and converts an analog voltage of the RSSI signal into a digital signal, which is also referred to as a sampling value. And the MCU stores the obtained sampling value in a register inside the MCU, and the upper computer reads the sampling value to finish the monitoring work of the optical power.

However, during the development of the micro-control unit circuit, insufficient pins of the micro-control unit are encountered. If more pins are forced to be arranged due to the shortage of a small number of pins, the increase of the packaging size of the optical module is bound to be caused. Therefore, how to improve the multiplexing rate of the pins of the micro control unit becomes an urgent problem to be solved on the premise of ensuring the volume of the optical module.

Disclosure of Invention

Based on the above technical problem, an embodiment of the present application illustrates an optical module.

A first optical module according to an embodiment of the present application includes,

the micro control unit is used for sending a control instruction;

the grid electrode of the triode is connected with the second pin of the micro control unit and is used for receiving an enable signal output by the micro control unit, and the enable signal is used for controlling the connection or disconnection of the source electrode and the grid electrode; the source electrode is connected with a first pin of the micro control unit;

the first chip is connected with a source electrode of the triode and used for receiving a control instruction output by the micro control unit connected with the source electrode;

and the first pin of the second chip is connected with the drain electrode of the triode and is used for receiving a control instruction output by the micro control unit connected with the source electrode.

According to the technical scheme, the optical module comprises the micro control unit integrated on the printed circuit board, the first chip, the second chip and the triode. In an initial state, the first pin and the first chip of the micro control unit are both connected with the source electrode of the triode, so that in the initial state, the first pin and the first chip of the micro control unit are in a communicated state. At this time, the micro control unit may communicate with the first chip through the first pin. Because the drain and the source of the triode are in a chopping state in the initial state, the second chip electrically connected with the drain of the triode and the micro control unit connected with the source of the triode are in a chopping state in the initial state. Therefore, the second chip is not affected in the process of communicating with the first chip through the first pin by the micro control unit.

And a second pin of the micro control unit is electrically connected with a grid electrode of the triode, the second pin is used for outputting an enable signal, the level corresponding to the enable signal directly influences the level of the grid electrode, and further, the level of the grid electrode directly influences the communication state of each electrode of the triode. For a P-channel transistor. In an initial state, a first pin of the micro control unit is communicated with the first chip. When the micro control unit outputs an enable signal of high level through the second pin, the grid electrode of the triode is in a high level state, electrons in the source electrode and the drain electrode of the triode are attracted out under the condition, and the electrons form electron flow between the source electrode and the drain electrode. And the source electrode and the drain electrode are conducted through the electron flow, so that the first pin of the micro control unit is communicated with the second chip. At this time, the micro control unit may communicate with the second chip through the first pin. For an N-channel triode. In an initial state, a first pin of the micro control unit is communicated with the first chip. When the micro control unit outputs an enable signal of a low level through the second pin, the grid electrode of the triode is in a low level state, positive holes in the source electrode and the drain electrode of the triode are attracted out at the moment, and positive ions are formed between the source electrode and the drain electrode by the positive holes. The positive ion flow enables the source electrode and the drain electrode to be conducted, and further enables a first pin of the micro control unit to be communicated with the second chip. At this time, the micro control unit may communicate with the second chip through the first pin.

It can be seen that with the optical module shown in the embodiment of the present application, a first pin of the micro control unit is connected to the first chip and the second chip through the transistor, and in an initial state, the first pin of the micro control unit is controlled to be communicated with the first chip, and the micro control unit can communicate with the first chip. And the communication between the first pin of the micro control unit and the second chip is controlled through an enable signal output by the second pin of the micro control unit, so that the micro control unit can communicate with the second chip. The optical module shown in the embodiment of the application can realize the purpose of controlling the two chips through one first pin of the micro control unit, and improves the multiplexing rate of the pins of the micro control unit. Furthermore, the technical scheme shown in the embodiment of the application can save the micro control unit of the chip and the number of pins to a certain extent, thereby being beneficial to realizing a miniaturized chip and further being beneficial to realizing a miniaturized optical module.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic diagram of a connection relationship of an optical communication terminal;

FIG. 2 is a schematic diagram of an optical network unit;

fig. 3 is a schematic structural diagram of an optical module according to an embodiment of the present invention;

fig. 4 is an exploded schematic view of an optical module structure according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a circuit board provided by an embodiment of the invention;

FIG. 6 is a schematic diagram of a circuit board shown in accordance with a preferred embodiment;

FIG. 7 is a schematic diagram of an N-channel triode according to a preferred embodiment;

FIG. 8 is a diagram illustrating a P-channel triode configuration according to a preferred embodiment;

FIG. 9 is a schematic diagram of a circuit board configuration in accordance with a preferred embodiment;

FIG. 10 is a schematic diagram illustrating an N-channel triode connection state according to a preferred embodiment;

FIG. 11 is a schematic diagram of a circuit board configuration in accordance with a preferred embodiment;

FIG. 12 is a schematic diagram illustrating a triode connection state of a P-channel in accordance with a preferred embodiment;

FIG. 13 is a schematic diagram of a circuit board configuration in accordance with a preferred embodiment;

Detailed Description

To make the objects, technical solutions and advantages of the exemplary embodiments of the present application clearer, the technical solutions in the exemplary embodiments of the present application will be clearly and completely described below with reference to the drawings in the exemplary embodiments of the present application, and it is obvious that the described exemplary embodiments are only a part of the embodiments of the present application, but not all the embodiments.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Optical communication enables signals to be transmitted using two different carriers, electrical and optical. Optical signals carrying information are transmitted in the optical waveguide for optical fiber communication, and the information transmission with low cost and low loss can be realized by utilizing the passive transmission characteristic of light in the optical waveguide such as the optical fiber; the information processing devices such as computers use electrical signals, which requires the interconversion between electrical signals and optical signals in the optical fiber communication system.

Fig. 1 is a schematic diagram of connection relationship of an optical communication terminal. As shown in fig. 1, the connection of the optical communication terminal mainly includes an optical network unit 100, an optical module 200, an optical fiber 101, and a network cable 103;

one end of the optical fiber is connected with the far-end server, one end of the network cable is connected with the local information processing equipment, and the connection between the local information processing equipment and the far-end server is completed by the connection between the optical fiber and the network cable; and the connection between the optical fiber and the network cable is completed by an optical network unit with an optical module.

An optical port of the optical module 200 is connected with the optical fiber 101 and establishes bidirectional optical signal connection with the optical fiber; the electrical port of the optical module 200 is accessed into the optical network unit 100, and establishes bidirectional electrical signal connection with the optical network unit; the optical module realizes the mutual conversion of optical signals and electric signals, thereby realizing the connection between the optical fiber and the optical network unit; specifically, the optical signal from the optical fiber is converted into an electrical signal by the optical module and then input to the optical network unit 100, and the electrical signal from the optical network unit 100 is converted into an optical signal by the optical module and input to the optical fiber. The optical module 200 is a tool for realizing the mutual conversion of the photoelectric signals, and has no function of processing data, and information is not changed in the photoelectric conversion process.

The optical network unit is provided with an optical module pin 102 and is used for accessing an optical module and establishing bidirectional electric signal connection with the optical module; the optical network unit is provided with a network cable pin 104 for accessing a network cable and establishing bidirectional electric signal connection with the network cable; the optical module is connected with the network cable through the optical network unit, specifically, the optical network unit transmits a signal from the optical module to the network cable and transmits the signal from the network cable to the optical module, and the optical network unit is used as an upper computer of the optical module to monitor the work of the optical module.

At this point, a bidirectional signal transmission channel is established between the remote server and the local information processing device through the optical fiber, the optical module, the optical network unit and the network cable.

Common information processing apparatuses include routers, switches, electronic computers, and the like; the optical network unit is an upper computer of the optical module, provides data signals for the optical module, and receives the data signals from the optical module, and the common upper computer of the optical module also comprises an optical fiber terminal and the like.

Fig. 2 is a schematic diagram of an optical network unit structure. As shown in fig. 2, the optical network unit 100 includes a circuit board 105, and a cage 106 is disposed on a surface of the circuit board 105; an electric connector pin is arranged in the cage 106 and used for being connected with an electric port of an optical module such as a golden finger; the cage 106 is provided with a heat sink 107, and the heat sink 107 has a convex structure such as a fin for increasing a heat radiation area.

The optical module 200 is inserted into an optical network unit, specifically, an electrical port of the optical module is inserted into an electrical connector in the cage 106, and an optical port of the optical module is connected with the optical fiber 101.

The cage 106 is positioned on the circuit board, enclosing the electrical connectors on the circuit board in the cage; the optical module is inserted into the cage, the cage fixes the optical module, and heat generated by the optical module is conducted to the cage through the optical module housing and finally diffused through the heat sink 107 on the cage.

Fig. 3 is a schematic diagram of an optical module structure according to an embodiment of the present invention, and fig. 4 is an exploded schematic diagram of an optical module structure according to an embodiment of the present invention, as shown in fig. 3 and fig. 4, an optical module 200 according to an embodiment of the present invention includes an upper housing 201, a lower housing 202, an unlocking handle 203, a circuit board 300, a light emission sub-module 500, a light reception sub-module 400, and an optical fiber socket 600.

The upper shell 201 and the lower shell 202 form a package cavity with two openings, specifically, two ends of the package cavity are opened (204, 205) in the same direction, or two openings in different directions are opened; one of the openings is an electrical port 204 for inserting into an upper computer such as an optical network Unit, the other opening is an optical port 205 for external optical fiber access to connect with an internal optical fiber, and the circuit board 300, the optical receiving sub-module 400, the transmitting sub-module 500, and a Micro Control Unit (MCU) and other optoelectronic devices are located in the package cavity.

The upper shell and the lower shell are made of metal materials generally, so that electromagnetic shielding and heat dissipation are facilitated; the assembly mode that adopts upper casing, lower casing to combine is convenient for install devices such as circuit board in the casing, generally can not make the casing of optical module structure as an organic whole, like this when devices such as assembly circuit board, locating component, heat dissipation and electromagnetic shield structure can't install, also do not do benefit to production automation yet.

The unlocking handle 203 is positioned on the outer wall of the cavity/lower shell 202, and the tail end of the unlocking handle can be pulled to enable the unlocking handle to relatively move on the surface of the outer wall; when the optical module is inserted into the upper computer, the unlocking handle fixes the optical module in the cage of the upper computer, and the clamping relation between the optical module and the upper computer is released by pulling the unlocking handle, so that the optical module can be drawn out from the cage of the upper computer.

The circuit board 300 is located in the cavity formed by the upper and the housing, and the circuit board 300 is electrically connected to the tosa 500 and the rosa 400 respectively.

The transimpedance amplifier chip is closely associated with the light receiving chip, the short-distance wiring design can ensure good received signal quality, and in one packaging form of the optical module, the transimpedance amplifier chip and the light receiving chip are packaged together in an independent packaging body, such as the same coaxial tube shell TO or the same square cavity; the independent packaging body is independent of the circuit board, and the light receiving chip and the foot-spanning amplifying chip are electrically connected with the circuit board through the independent packaging body; in another package form of the optical module, the light receiving chip and the transimpedance amplifier chip may be disposed on a surface of the circuit board without using a separate package. Of course, the light receiving chip can be packaged independently, and the transimpedance amplification chip is arranged on the circuit board, so that the received signal quality can meet certain relatively low requirements.

The chip on the circuit board 300 may be an all-in-one chip, for example, a laser driver chip and a micro control unit chip are integrated into one chip, or a laser driver chip, a limiting amplifier chip and a micro control unit chip are integrated into one chip, and the chip is an integration of a circuit, but the functions of each circuit do not disappear due to aggregation, and only the circuit form is integrated. Therefore, when the circuit board is provided with three independent chips, namely the micro control unit, the laser driving chip and the amplitude limiting amplifying chip, the scheme is equivalent to that of arranging a single chip with three functions in one on the circuit.

The circuit board 300 has a golden finger on the surface of its end, the golden finger is composed of a pin independent from each other, the circuit board is inserted into the electric connector in the cage, and the golden finger is electrically connected with the upper computer.

The circuit board 300 is a carrier of main electrical components of the optical module, and the electrical components not disposed on the circuit board are finally electrically connected to the circuit board, and the electrical connectors on the circuit board realize the electrical connection between the optical module and the host computer thereof. The electrical connector typically used by the optical module is a gold finger.

The optical module further includes a transmitter optical subassembly and a receiver optical subassembly, which may be collectively referred to as an optical subassembly. Fig. 4 is an exploded view of an optical module according to an embodiment of the present invention, and as shown in fig. 4, the optical module according to the embodiment of the present invention includes a tosa 500 and a rosa 400, and the tosa and the rosa are arranged on the surface of a circuit board in a staggered manner, which is beneficial to achieve a better electromagnetic shielding effect.

The rosa 400 is disposed on the surface of the circuit board 300, and in a common packaging method (such as a coaxial TO package), the rosa is packaged separately and physically separated from the circuit board, and is electrically connected through a flexible board.

The tosa 500 is disposed on a surface of the circuit board 300. in another common packaging (e.g., a coaxial TO package), the tosa is packaged separately and physically separated from the circuit board and electrically connected TO the pcb.

The tosa 500 is located in a package cavity formed by the upper and lower shells, as shown in fig. 4, the circuit board 300 is provided with a notch (not shown) for placing the tosa; the notch can be arranged in the middle of the circuit board and also can be arranged at the edge of the circuit board; the transmitter optical subassembly is arranged in the gap of the circuit board in an embedding mode, so that the circuit board can conveniently extend into the transmitter optical subassembly, and the transmitter optical subassembly and the circuit board can be conveniently fixed together.

The tosa 500, in turn, is connected to the fiber optic receptacle 600 via fiber optic adapters (not shown in fig. 4) and optical fibers. One end of the optical fiber (labeled in the figure) is connected with the optical fiber adapter, and the other end is connected with the optical fiber socket 600.

The circuit board 300 is provided with chips, capacitors, resistors and other electrical components. The corresponding chip is selected according to the product requirements, and common chips include a Microcontroller (Microcontroller Unit) and chips, wherein the chips can be a clock data recovery chip CDR, a laser driving chip, a transimpedance amplifier TIA chip, a limiting amplifier LA chip, a power management chip and the like.

The receiving end of the optical module comprises an optical receiving chip, a transimpedance amplifier chip TIA, an amplitude limiting amplifier chip LA, a first low-pass filter circuit, a second low-pass filter circuit, a comparison circuit and a microprocessor. The transmitting end of the optical module comprises a driving chip and the like.

The micro control Unit is a computer with a chip level formed by appropriately reducing the frequency and specification of a Central Processing Unit (CPU) and integrating peripheral pins such as a memory, a counter, a USB, an a/D conversion, a UART, a PLC, a DMA, and the like on a single chip. Different combination control is performed on different chips through the connection of the pins of the micro control unit and the chips.

Fig. 5 is a schematic structural diagram of a circuit board according to an embodiment of the present invention, and fig. 6 is a schematic structural diagram of the circuit board shown in fig. 5, as shown in fig. 5 and fig. 6, a micro control unit 1, a transistor 2, a first chip 3 and a second chip 4 are disposed on the circuit board 300, where the micro control unit 1 is disposed with a first pin 11 and a second pin 12. The source 21 of the triode 2 is electrically connected with the first chip 3, and the source 21 of the triode 2 is also electrically connected with the first pin 11; the drain 22 of the transistor 2 is electrically connected to the second chip 4. And the grid 23 of the triode is electrically connected with the second pin.

The micro control Unit 1 is a computer with a chip level formed by appropriately reducing the frequency and specification of a Central Processing Unit (CPU) and integrating peripheral pins such as a memory, a counter, a USB, an a/D conversion, a UART, a PLC, a DMA, and the like on a single chip. Different combination control is performed on different chips through the connection of the pins of the micro control unit and the chips.

The first pin 11 of the micro control unit 1 is an I/O pin to ensure that the micro control unit 1 can bidirectionally communicate with the first chip 3 or the second chip 4. The second pin 12 of the micro control unit 1 is an output pin, so that the micro control unit 1 can make more free I/O pins for bidirectional communication with the chip.

In the first chip 3 and the second chip 4 shown in the embodiment of the present application, the first chip and the second chip may be an amplitude limiting amplifier chip, a driving chip, a transimpedance amplifier chip, or other integrated circuit chips.

The triode 2 shown in the embodiment of the application has a current amplification function and is a core element of an electronic circuit. The transistor 2 is formed by forming two PN junctions on a semiconductor substrate, the two PN junctions dividing the whole semiconductor into three parts, the middle part being a base region, also referred to as a gate 23 in this embodiment, and the two side parts being an emitter region, also referred to as a drain 22 and a collector region, respectively, also referred to as a source 21 in this embodiment. In the scheme shown in the embodiment of the application, the triode 2 can be an N-channel triode 2 or a P-channel triode 2.

The structure of the N-channel transistor 2 can be seen in fig. 7. The N-channel transistor 2 includes a P-type source 21, a P-type drain 22a, a gate 23, an oxide film 24, and an N-type body 25 a. The P-type source electrode 21 is made of a P-type semiconductor, and the P-type drain electrode 22 is made of a P-type semiconductor. The P-type source 21a and the P-type drain 22a are isolated from each other and disposed in an N-type body 25a, a gap between the P-type source 21a and the P-type drain 22a is referred to as an N-channel, the N-channel is connected to one side of the oxide film 24, and the other side of the oxide film 24 is connected to the gate 23. The oxide film 25 functions to block transfer of electrons or positively charged holes between the gate electrode 23 and the N channel. The junction between the P-type source 21a and the P-type drain 22a and the N-type body 25a is referred to as a PN junction. The PN junction allows electrons in the N-type semiconductor to pass therethrough, and also allows positively charged holes in the P-type source 21a and the P-type drain 22a to pass therethrough. The PN junction blocks positively charged holes in the N-type semiconductor from passing through, while blocking electrons in the P-type semiconductor from passing through. Under the condition of no external voltage access, the source 21a of the P type and the drain 22a of the P type are isolated from each other. When a negative voltage is applied to the gate 23 side, the positively charged holes in the P-type source 21a and the positively charged holes in the P-type drain 22a flow into the N channel by the electric field, so that a positive ion flow is formed, and the P-type source 21a and the P-type drain 22a communicate with each other. At the same time, the positively charged holes stay in the N channel due to the blocking effect of the oxide film 34 on electrons.

Referring to fig. 8, a P-channel transistor 2 includes an N-type source 21b, an N-type drain 22b, a gate 23, an oxide film 24, and a P-type body 25 b. The N-type source electrode 21 is made of an N-type semiconductor, and the N-type drain electrode 22 is made of an N-type semiconductor. The N-type source 21b and the N-type drain 22b are isolated from each other and disposed in the P-type body 25b, a gap between the N-type source 21b and the N-type drain 22b is referred to as a P-channel, the P-channel is connected to one side of the oxide film 24, and the other side of the oxide film 24 is connected to the gate 23. Under the condition of no external voltage access, the source 21b of the N type and the drain 22b of the N type are isolated from each other. When a positive voltage is applied to the gate electrode 23 side, electrons in the N-type source electrode 21b and electrons in the N-type drain electrode 22b flow into the P-channel by the electric field, thereby forming a current so that the N-type source electrode 21b and the N-type drain electrode 22b are connected. Meanwhile, due to the blocking effect of the oxide film 34 on electrons, the electrons stay in the P channel.

To sum up, the optical module shown in the embodiment of the present application includes a micro control unit 1 integrated on a printed circuit board, a first chip 3, a second chip 4, and a transistor 2. When the optical module normally works, since the first pin 11 of the micro control unit 1 and the first chip 3 are both connected to the source 21 of the transistor 2, in an initial state, the first pin 11 and the first chip 3 are in a communication state. At this time, the micro control unit 1 may communicate with the first chip 3 through the first pin 11. Meanwhile, the drain 22 of the transistor 2 is electrically connected to the second chip 4, and in the initial state, the source 21 and the drain 22 of the transistor 2 are in a chopping state. Therefore, the second chip 4 is not affected by the micro control unit 1 during communication with the first chip 3 via the first pin 11. A second pin 12 of the micro control unit 1 is electrically connected to a gate of the transistor, wherein the second pin 12 is configured to output an enable signal, a level of the enable signal directly affects a level of the gate, and further the level of the gate directly affects a connection state of 2 electrodes (source and drain) of the transistor.

For P-channel transistor 2. In the initial state, the first pin 11 of the micro control unit 1 is in communication with the first chip 3. When the micro-control unit 1 outputs an enable signal of high level through the second pin 12, the gate 23 of the transistor 2 is in a high state, in which case electrons in the source 21 and drain 22 of the transistor 2 are attracted out, and the electrons form an electron flow between the source 21 and drain 22. The source 21 and the drain 22 are conducted by the electron flow, so that the first pin 11 of the micro control unit 1 is communicated with the second chip 4, and at this time, the micro control unit 1 can communicate with the second chip 4 through the first pin 11.

For N-channel transistor 2. In the initial state, the first pin 11 of the micro control unit 1 is in communication with the first chip 3. When the micro control unit 1 outputs a low level enable signal through the second pin 12, at this time, the gate 23 of the triode 2 is in a low level state, at this time, positive holes in the source 21 and the drain 22 are attracted out, the positive holes form a positive ion flow between the source 21 and the drain 22, the positive hole flow enables the source 21 and the drain 22 to be conducted, and further the first pin 11 of the micro control unit 1 is communicated with the second chip 4, and at this time, the micro control unit 1 can communicate with the second chip 4 through the first pin 11. It can be seen that the optical module shown in this embodiment of the present application is adopted, a first pin 11 of the micro control unit 1 is connected with the first chip 3 and the second chip 4 through the triode 2, then, the level of the enable signal output through the second pin 12 of the micro control unit 1 is high or low, the first pin 11 of the micro control unit 1 is controlled to be communicated with the first chip 3, or the first pin 11 of the micro control unit 1 is controlled to be communicated with the second chip 4, further, the purpose of controlling the two chips through the first pin 11 is achieved, the pin reuse rate of the micro control unit 1 is improved, and the possibility of pin shortage of the micro control unit 1 is reduced by the scheme shown in this application.

This completes the description of the present embodiment.

The optical modules experience an initialization setting when powered up. During the initial setup, the second pin 12 of the micro control unit does not have any signal output. The grid of the triode is connected with one end of the resistor, and the first pin of the micro control unit is controlled to be communicated with the first chip or the second chip in an initial state in a mode that the other end of the resistor is connected with the grounding pin or the power supply pin, so that the purpose of flexibly configuring the optical module is achieved.

In a possible embodiment of the structure of the optical module circuit board, referring to fig. 9, the circuit board shown in fig. 9 further includes a resistor 5 and a ground pin 6 in addition to the circuit board shown in fig. 6. One end of the resistor 5 is electrically connected with the gate 23 of the triode 2, and the other end of the resistor 5 is electrically connected with the grounding pin 6. The triode used in the optical module in fig. 9 is an N-channel triode.

For an N-channel triode conduction state diagram, reference may be made to fig. 10. In the initialization state, the gate 23 of the transistor is connected to the ground pin 6 through the resistor 5, and therefore, the gate 23 of the transistor is in a low level state. The positively charged holes in the source electrode 21 and the positively charged holes in the drain electrode 22 flow into the N channel under the action of the electric field to form a positive ion flow, so that the source electrode 21 and the drain electrode 22 are connected. The first pin 11 of the respective micro control unit connected to the source 21 is in communication with the second chip 4 connected to the drain 22. When the optical module finishes the initialization setting, the control signal sent by the micro control unit 1 directly reaches the second chip 4 through the first pin 11, or the micro control unit 1 directly receives the feedback signal output by the second chip 4 through the first pin 11.

When the micro control unit 1 needs to communicate with the first chip 3, the micro control unit 1 sends a high level enable signal to the gate 23 of the triode. At this time, the source 21 and the drain 22 of the transistor are isolated from each other, and the corresponding second chip 4 and the micro control unit 1 are in a chopping state. The first chip is in a communication state with the micro control unit, the control signal sent by the micro control unit 1 directly reaches the first chip 3 through the first pin 11, or the micro control unit 1 directly receives the feedback signal output by the first chip 3 through the first pin 11.

Fig. 11 shows a circuit board of the optical module, which further includes a resistor 5 and a power supply pin 7 on the basis of the circuit board shown in fig. 6. One end of the resistor 5 is electrically connected with the grid 23 of the triode 2, and the other end of the resistor 5 is electrically connected with the power supply pin 7.

The triode used in the optical circuit board in fig. 11 is a P-channel triode. For a P-channel transistor on-state diagram, referring to fig. 12, in the initialization state, the gate 23 of the transistor is connected to the supply pin 7 via the resistor 5. Therefore, the gate 23 of the transistor 2 is in a high state, and electrons in the source 21 and electrons in the drain 22 flow into the P channel under the action of the electric field to form a current, so that the source 21 and the drain 22 are connected. The first pin 11 of the corresponding micro control unit 1 is in a state of being communicated with the second chip 4, and when the optical module completes initialization setting, a control signal sent by the micro control unit 1 directly reaches the second chip 4 through the first pin 11, or the micro control unit 1 directly receives a feedback signal output by the second chip 4 through the first pin 11.

When the micro control unit 1 needs to communicate with the first chip, the micro control unit sends a low level enable signal to the gate 23 of the triode. At this time, the source 21 and drain 22 of the transistor are isolated from each other and the corresponding second chip and the micro control unit are in a chopping state. The first chip is in a communication state with the micro control unit, the control signal sent by the micro control unit 1 directly reaches the first chip 3 through the first pin 11, or the micro control unit 1 directly receives the feedback signal output by the first chip 3 through the first pin 11.

It can be seen that according to the technical solution shown in the embodiment of the present application, the gate 23 of the triode is connected to one end of the resistor 5, and it is determined by the way that the other end of the resistor 5 is connected to the ground pin 6 or the power supply pin whether the first pin 11 of the micro control unit is communicated with the first chip 3 or the second chip 4 in the initial state, so as to achieve the purpose of flexibly configuring the optical module.

This completes the description of the present embodiment.

It should be noted that when the micro control unit needs to communicate with the first chip through the first pin, the source and the drain of the transistor are in the chopping state, and therefore, the second chip connected to the drain and the micro control unit connected to the source are in the chopping state. The second chip is not influenced in the process that the micro control unit communicates with the first chip through the first pin. However, when the source and the drain of the triode are communicated, the first pin of the micro control unit is communicated with the first chip and the second chip at the same time, in this case, although the control instruction output by the micro control unit can reach the driving chip, and further control over the driving chip is realized, at the same time, the control instruction sent by the micro control unit for controlling the second chip can also reach the first chip, and the control instruction for the second chip can generate certain interference on the first chip.

Based on the above technical problem, in an optical module according to an embodiment of the present application, reference may be made to fig. 12 for a schematic structural diagram of a circuit board of the optical module. Fig. 12 shows a circuit board on which a micro control unit 1, a transistor 2, a first chip 3 and a second chip 4 are integrated.

Wherein, the first pin 11 of the micro control unit 1 comprises: a first data pin 11b and a first clock pin 11a, and the second pin 12 includes a second data pin 12a and a second clock pin 12 b.

Transistor 2 may be an N-channel transistor 2 or a P-channel transistor 2.

The first chip 3 is a non-pulse chip, and specifically may be: the clock data recovery chip CDR, the trans-impedance amplifier TIA chip, the limiting amplifier LA chip and the power management chip. Wherein the first chip 3 is provided with data pins 32 and clock pins 31.

The second chip 4 is a pulse chip, and may be specifically a driving chip. The driver chip 4 is provided with a data pin 41 connected to the drain of the transistor 2.

With continued reference to fig. 12, the second pin 12 of the mcu 1 is connected to the gate 23 of the transistor for sending an enable signal to the gate. The first clock pin 11a of the microcontrol unit 1 is electrically connected to the clock pin 31 of the first chip 3, and is configured to transmit a clock-type control command to the first chip 3. A first data pin 11b of the micro control unit 1 is electrically connected with a source 21 of the triode 2 and is used for transmitting a control instruction of a data type to a data pin 41 connected with the source 21; when transistor 2 is in the on state, it is used to transmit a control command of data type to data pin 41 connected to drain 22.

When the micro control unit 1 communicates with the first chip 3, the micro control unit 1 sends a control instruction of a data type and a control instruction of a clock type to the first chip 3 through the first data pin 11b and the first clock pin 11a, respectively. The first chip 3 executes a corresponding instruction based on the received control instruction of the data type and the control instruction of the clock type. When the microcontrol unit 1 communicates with the first chip 3. At this time, the source 21 and the drain 22 of the transistor 2 are in a chopped state, and therefore, the driver chip 4 connected to the drain 22 and the micro control unit 1 connected to the source 21 are in a chopped state. Therefore, the micro control unit 1 does not affect the driving chip 4 in the process of communicating with the first chip 3 through the second pin 12 (the second data pin 12a and the second clock pin 12 b).

The micro control unit 1 outputs a corresponding enable signal through the second pin 12, where the enable signal is used to adjust a potential of the gate 23 connected to the second pin 12, so as to control a connection state of the source 21 and the drain 22 of the triode 2.

When the transistor 2 is controlled by the enable signal, the source 21 and the drain 22 are in a conducting state, and the micro control unit 1 can communicate with the driving chip 4. At this time, the micro control unit 1 outputs a control command of a data type through the first data pin 11b, which can reach the driver chip 4 and the first chip 3 at the same time.

When the control command of the data type reaches the first chip 3, since the first chip is a non-pulse chip, only if the control command received at the same time includes the control command of the data type and the control command of the clock type, the corresponding command can be executed. When the first chip 3 receives only the control instruction of the data type, no response is made to the control instruction of the data type. The first chip 3 is not affected in the process of the micro control unit 1 communicating with the driving chip 4 through the second data pin.

When a control instruction of a data type reaches the driving chip 4, the driving chip compares a level signal output by the micro control unit 1 with a reference level signal to obtain an error signal, and outputs a driving signal for controlling the on-off of the switch after comparing the error signal with the sawtooth wave signal, so as to control the laser diode connected with the driving chip to be powered on and light or not to be powered off.

It can be seen that with the optical module shown in the embodiment of the present application, when the micro control unit 1 communicates with the first chip 3 through the first pin 11, the source 21 and the drain 22 of the transistor 2 are in a chopping state, and at this time, the micro control unit 1 connected to the driving chip 4 and the source 21 connected to the drain 22 is in the chopping state. Therefore, the micro control unit 1 does not affect the driving chip 4 in the process of communicating with the first chip 3 through the first pin 11. When the micro control unit 1 communicates with the driving chip 4 through the first pin 11, the micro control unit 1 outputs a control instruction of a data type through the first data pin 11b, and the driving chip 4 realizes a corresponding function based on the control instruction of the data type. The first chip receives only the control instruction of the data type and does not respond to the control instruction of the data type at all. Therefore, the first chip 3 is not affected by the micro control unit 1 in the process of communicating with the driving chip 4 through the first pin 11.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.

It is obvious to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely used as an example, and in practical applications, the above function distribution may be performed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to perform all or part of the above described functions.

Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A light module, comprising:

the micro control unit is used for sending a control instruction, and the control instruction comprises an enable signal;

2. The optical module of claim 1, wherein the first chip is a non-pulse chip and the second chip is a driver chip.

3. The light module of claim 2, wherein the first pin of the micro control unit comprises a first data pin and a first clock pin;

the first data pin is connected with the source electrode of the triode and used for sending a control instruction of a data type to the first chip and the driving chip;

the first clock pin is electrically connected with the clock pin of the first chip and used for sending a clock type control instruction to the first chip.

4. The optical module of claim 1, further comprising a resistor and a ground pin;

one end of the resistor is electrically connected with the grid electrode of the triode, and the other end of the resistor is electrically connected with the grounding pin.

5. The optical module of claim 4, wherein the transistor is an N-channel transistor.

6. The optical module of claim 1, further comprising a resistor and a power supply pin;

one end of the resistor is electrically connected with the grid electrode of the triode, and the other end of the resistor is electrically connected with the power supply pin.

7. The light module of claim 6, wherein the transistor is a P-channel transistor.

8. The optical module according to any of claims 1-7, characterized in that the first pin is an I/O pin.

9. The optical module according to any one of claims 1-7, characterized in that the second pin is an output pin.