CN112670386B - Light emitting diode and manufacturing method thereof - Google Patents
Light emitting diode and manufacturing method thereof Download PDFInfo
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- CN112670386B CN112670386B CN202011633971.1A CN202011633971A CN112670386B CN 112670386 B CN112670386 B CN 112670386B CN 202011633971 A CN202011633971 A CN 202011633971A CN 112670386 B CN112670386 B CN 112670386B
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Abstract
The application relates to the field of light emitting diodes, and particularly discloses a light emitting diode and a manufacturing method thereof, wherein the light emitting diode comprises: a substrate; a light emitting epitaxial layer including a first semiconductor layer, an active light emitting layer, and a second semiconductor layer sequentially stacked on one main surface of the substrate; and the electrode patterns are embedded in the first semiconductor layer or the second semiconductor layer, are mutually connected and are distributed in a grid shape. Through the mode, the technical problems of non-uniformity of current diffusion, non-uniformity of heat diffusion and non-uniformity of light extraction of the light-emitting diode in the prior art can be solved, current distribution is effectively improved, and current distribution uniformity is improved.
Description
Technical Field
The present disclosure relates to the field of light emitting diodes, and more particularly, to a light emitting diode and a method for manufacturing the same.
Background
A Light Emitting Diode (LED) is a semiconductor element that converts an electric current into Light in a specific wavelength range. The light emitting diode has the advantages of high brightness, low working voltage, low power consumption, easy matching with an integrated circuit, simple driving, long service life and the like, thereby being widely applied to the field of illumination as a light source.
In a conventional nitride (nitride material including AlN, GaN, InN, and alloy compounds of the three) ultraviolet and visible light emitting diode structure, a current formed by electrons is laterally diffusion-injected from an n-type electrode to a light emitting active region through an n-type nitride semiconductor layer, and a current formed by holes is laterally diffusion-injected from a p-type electrode to the light emitting active region through a p-type nitride semiconductor layer. Due to the difficulty in doping n-type nitride and p-type nitride materials and the large material resistance, the problems of uneven current diffusion, uneven thermal diffusion and uneven light extraction are caused, so that the light emitting efficiency of the light emitting diode is reduced, the large injection current resistance is reduced, and the like.
Disclosure of Invention
In order to solve the technical problems of non-uniformity of current diffusion, non-uniformity of thermal diffusion and non-uniformity of light extraction of the light-emitting diode in the prior art, the light-emitting diode effectively improves current distribution and improves the uniformity of current distribution.
In one aspect, the present application provides a light emitting diode, including: a substrate; a light emitting epitaxial layer including a first semiconductor layer, an active light emitting layer, and a second semiconductor layer sequentially stacked on one main surface of the substrate; and the electrode patterns are embedded in the first semiconductor layer or the second semiconductor layer, are mutually connected and are distributed in a grid shape.
The first semiconductor layer or the second semiconductor layer comprises a first sublayer and a second sublayer, the plurality of electrode patterns are arranged on one side of the first sublayer, which is far away from the substrate, the second sublayer is arranged on one side of the plurality of electrode patterns, which is far away from the first sublayer, and the second sublayer covers the plurality of electrode patterns and fills gaps among the plurality of electrode patterns.
Wherein the tolerance temperature of the plurality of electrode patterns is higher than the processing temperature of the first semiconductor layer or the second semiconductor layer.
The electrode pattern is made of at least one of graphene, ZrN and HfN.
Wherein the thickness of the plurality of electrode patterns is 0.005-2 μm.
Wherein the plurality of electrode patterns are non-uniformly distributed in cross-sectional area and/or pitch along a parallel direction of the main surface of the substrate.
The first sublayer and the second sublayer are of an integral structure.
In another aspect, the present application provides a method of manufacturing a light emitting diode, the method including: providing a substrate; forming a plurality of electrode patterns on a substrate; a semiconductor layer is formed on the plurality of electrode patterns such that the plurality of electrode patterns are buried in the semiconductor layer.
Wherein the semiconductor layer comprises a first sublayer and a second sublayer; before the step of forming the plurality of electrode patterns on the substrate, forming a first sub-layer on the substrate, so that the plurality of electrode patterns are formed on the side of the first sub-layer away from the substrate; the step of forming a semiconductor layer on the plurality of electrode patterns includes: and forming a second sub-layer on the side of the electrode patterns, which is far away from the first sub-layer, wherein the second sub-layer covers the electrode patterns and fills gaps among the electrode patterns.
Wherein, prior to the step of forming the plurality of electrode patterns on the substrate, the method further comprises: sequentially growing a first semiconductor layer and an active light-emitting layer on one main surface of the substrate, wherein a first sub-layer is formed on one side, away from the first semiconductor layer, of the active light-emitting layer; alternatively, after the step of forming the semiconductor layer on the plurality of electrode patterns, the method further includes: and sequentially growing an active light emitting layer and a second semiconductor layer on the side of the second sublayer, which is far away from the first sublayer.
The growth method of the first sublayer and the second sublayer is metal organic chemical vapor deposition, chemical vapor deposition or molecular beam epitaxy, and the material of the electrode patterns is at least one of graphene, ZrN and HfN.
The beneficial effect of this application is: unlike the case of the prior art, in the present application, a current formed of electrons is directly injected from a plurality of electrode patterns into the first semiconductor layer and laterally diffused along the first semiconductor layer to be injected into the active light emitting layer, and a current formed of holes is directly injected into the active light emitting layer along the second semiconductor layer through the second electrode. The electrons and holes radiatively recombine within the active light emitting layer and generate photons, which in turn generate light. According to the structure, the distance for the current in the light-emitting epitaxial layer to laterally diffuse is determined by the lateral distance between the adjacent electrode patterns, and the plurality of electrode patterns are distributed in a grid shape in the embodiment, so that the lateral distance between the adjacent electrode patterns and the second electrode is uniform, and the lateral distance between the plurality of electrode patterns and the second electrode is small, so that the current is more uniformly distributed in the light-emitting epitaxial layer, the current distribution uniformity of the light-emitting diode is improved, the heat dissipation capability is improved, and the photoelectric thermal performance of the light-emitting diode is finally improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts. Wherein:
fig. 1 is a schematic structural diagram of a light emitting diode according to a first embodiment of the present application;
FIG. 2 is a schematic structural diagram of a light emitting diode according to a second embodiment of the present application;
fig. 3 is a schematic structural diagram of a light emitting diode according to a third embodiment of the present application;
fig. 4 is a schematic structural diagram of a light emitting diode according to a fourth embodiment of the present application;
fig. 5 is a schematic structural diagram of a light emitting diode according to a fifth embodiment of the present application;
fig. 6 is a schematic structural diagram of a light emitting diode according to a sixth embodiment of the present application;
fig. 7 is a schematic structural diagram of a light emitting diode according to a seventh embodiment of the present application;
fig. 8 is a schematic flow chart of a method for manufacturing a light emitting diode according to a first embodiment of the present application;
FIG. 9 is a schematic flow chart of a method for manufacturing a light emitting diode according to a second embodiment of the present application;
fig. 10 is a schematic flow chart illustrating a method for manufacturing a light emitting diode according to a third embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
As shown in fig. 1, a vertical type light emitting diode 10 according to a first embodiment of the present application includes: a substrate 11, a light emitting epitaxial layer 12, a plurality of electrode patterns 13. In the present embodiment, the substrate 11 may be made of a conductive material such as Si, Ge, Cu, CuW, or the like.
The light-emitting epitaxial layer 12 further includes a first semiconductor layer 121, an active light-emitting layer 122, and a second semiconductor layer 123, which are sequentially stacked and disposed on one main surface of the substrate 11. The first semiconductor layer 121 and the second semiconductor layer 123 may be a single layer or a multi-layer structure of any other suitable material having different conductivity types.
Further, as shown in fig. 1, the plurality of electrode patterns 13 are embedded in the second semiconductor layer 123 and electrically connected to the second semiconductor layer 123, for example, in the present embodiment, the plurality of electrode patterns 13 are electrically connected to the second semiconductor layer 123 by directly contacting. The second semiconductor layer 123 may be a GaN layer doped with at least one of Si, Ge, and Sn; the AlGaN layer may be doped with at least one of Si, Ge, and Sn. The corresponding plurality of electrode patterns 13 is also referred to as n-type electrodes. The plurality of electrode patterns 13 are connected to each other and are arranged in a grid pattern.
The second semiconductor layer 123 includes a first sub-layer 1231 and a second sub-layer 1232, the plurality of electrode patterns 13 are disposed on a side of the first sub-layer 1231 facing away from the active light emitting layer 122, the second sub-layer 1232 is located on a side of the plurality of electrode patterns 13 facing away from the first sub-layer 1231, and the second sub-layer 1232 covers the plurality of electrode patterns 13 and fills gaps between the plurality of electrode patterns 13.
Optionally, the first sub-layer 1231 and the second sub-layer 1232 are of a unitary structure, and the material of the first sub-layer 1231 and the material of the second sub-layer 1232 are the same.
In order to ensure the light emitting efficiency of the light emitting diode, the material of the electrode patterns 13 may be a transparent conductive material, and in the embodiment, the material of the plurality of electrode patterns 13 is preferably at least one of graphene, ZrN, or HfN, which is not limited herein.
Optionally, the withstanding temperature of the plurality of electrode patterns 13 is higher than the processing temperature of the second semiconductor layer 123, so as to ensure that the electrode patterns 13 are not physically damaged when the second sub-layer 1232 is formed on the electrode patterns 13.
Alternatively, the thickness of the plurality of electrode patterns 13 is 0.005 to 2 micrometers.
The vertical type light emitting diode 10 further includes a first electrode 15, and the first electrode 15 is disposed on a side of the substrate 11 away from the active light emitting layer 122. For example, in the present embodiment, the first electrode 15 is electrically connected to the first semiconductor layer 121 through the substrate 11 made of a conductive material in turn. The first semiconductor layer 121 may Be a p-type semiconductor layer, for example, a GaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba, or an AlGaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba, and the corresponding first electrode 15 is also referred to as a p-type electrode.
As shown in fig. 2, optionally, the vertical type light emitting diode 10 further includes a bonding layer 14, and the bonding layer 14 is disposed between the substrate 11 and the first semiconductor layer 121. For example, in the present embodiment, the first electrode 15 is electrically connected to the first semiconductor layer 121 through the substrate 11 made of a conductive material and the bonding layer 14 in this order.
As shown in fig. 2, optionally, the vertical type light emitting diode 10 further includes: and a mirror pattern 16 formed on the first semiconductor layer 121 on a side thereof away from the active light emitting layer 122, wherein light reflected by the mirror pattern 16 is output at the periphery of the electrode pattern 13. The mirror pattern 16 may be made of a transparent conductive material such as Indium Tin Oxide (ITO) that is coated with other metal mirrors or DBR mirrors. In other embodiments, the mirror pattern 16 may function as both a mirror and an ohmic contact, such as a metal layer including silver (Ag), aluminum (Al), nickel (Ni), chromium (Cr), platinum (Pt), or other suitable metal. The deposition method of the mirror pattern 16 may be performed by electron beam, sputtering, vacuum evaporation, or electroplating.
As shown in fig. 1, the first electrode 15 may be a surface electrode to improve current uniformity of the second semiconductor layer 123. The plurality of electrode patterns 13 are connected to each other and distributed in a grid-like manner, and at this time, the projection of the plurality of electrode patterns 13 on the substrate 11 falls inside the projection of the first electrode 15 on the substrate 11.
Alternatively, as shown in fig. 3, since the first electrode 15 only partially covers the second semiconductor layer 123, in order to make the current distribution in the light emitting epitaxial layer 12 more uniform, the cross-sectional area and/or the pitch of the plurality of electrode patterns 13 in the parallel direction of the main surface of the substrate 11 are/is non-uniformly distributed. Specifically, the closer to the first electrode 15, the smaller the cross-sectional area of the plurality of electrode patterns 13 in the parallel direction of the main surface of the substrate 11 and/or the larger the pitch between the plurality of electrode patterns 13.
The light emitting epitaxial layer 12 may be patterned from the side of the light emitting epitaxial layer 12 remote from the substrate 11 to form the light emitting mesa structure 100.
With the above structure, a current formed of electrons is directly injected from the plurality of electrode patterns 13 into the second semiconductor layer 123 and is laterally diffusion-injected into the active light-emitting layer 122 along the second semiconductor layer 123, and a current formed of holes is directly injected into the active light-emitting layer 122 along the first semiconductor layer 121 through the first electrode 15. The electrons and holes undergo radiative recombination within the active light emitting layer 122 and generate photons, thereby forming light emission. As can be seen from the above structure, the distance for the current in the light emitting epitaxial layer 12 to laterally diffuse is determined by the lateral distance between the adjacent electrode patterns 13, and since the plurality of electrode patterns 13 are distributed in a grid shape in this embodiment, the lateral distance between the adjacent electrode patterns 13 and the first electrode 15 is relatively uniform, and the lateral distance between the plurality of electrode patterns 13 and the first electrode 15 is relatively small, so that the current is more uniformly distributed in the light emitting epitaxial layer 12, which is beneficial to improving the current distribution uniformity of the light emitting diode 10, improving the heat dissipation capability, and finally improving the photo-thermal performance of the light emitting diode 10.
As shown in fig. 4, a forward type light emitting diode 20 according to a second embodiment of the present application includes: a substrate 21, a light emitting epitaxial layer 22, a plurality of electrode patterns 23, and a second electrode 24. The light-emitting epitaxial layer 22 is further formed by sequentially stacking a first semiconductor layer 221, an active light-emitting layer 222, and a second semiconductor layer 223 on the substrate 21. The material of the substrate 21 may be sapphire, SiC, Si, GaN, ZnO, GaAs, GaP, LiAl 2 O 3 Any one of BN and AlN is not limited thereto.
The plurality of electrode patterns 23 are embedded in the first semiconductor layer 221 and electrically connected to the first semiconductor layer 221, for example, in the present embodiment, the plurality of electrode patterns 23 are electrically connected to the first semiconductor layer 221 by directly contacting. The first semiconductor layer 221 may Be a p-type semiconductor layer, such as a GaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba; the AlGaN layer may Be doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba, the corresponding plurality of electrode patterns 23 may also Be referred to as p-type electrodes, and the plurality of electrode patterns 23 may Be connected to each other and arranged in a grid pattern.
Further, the first semiconductor layer 221 may include a first sub-layer (not shown) and a second sub-layer (not shown), the plurality of electrode patterns 23 are disposed on a side of the first sub-layer facing away from the substrate 21, the second sub-layer is located on a side of the plurality of electrode patterns 23 facing away from the first sub-layer, and the second sub-layer covers the plurality of electrode patterns 23 and fills gaps between the plurality of electrode patterns 23.
Optionally, the first sublayer and the second sublayer are of a unitary structure, and the materials of the first sublayer and the second sublayer are the same.
In order to ensure the light emitting efficiency of the light emitting diode, the material of the electrode patterns 23 may be a transparent conductive material, and in the present embodiment, the material of the plurality of electrode patterns 23 is preferably at least one of graphene, ZrN, or HfN, which is not limited herein.
Optionally, the withstanding temperature of the plurality of electrode patterns 23 is higher than the processing temperature of the first semiconductor layer 221, so as to ensure that the electrode patterns 23 are not physically damaged when the second sub-layer is formed on the electrode patterns 23.
Alternatively, the thickness of the plurality of electrode patterns 23 is 0.005-2 μm.
In the present embodiment, the second electrode 24 may be electrically connected to the second semiconductor layer 223 through a current diffusion layer 27 disposed thereunder, and the current diffusion layer 27 is electrically isolated from the first semiconductor layer 221 and the active light emitting layer 222 through the transparent dielectric layer 26. The main purpose of the current diffusion layer 27 is to improve the uniformity of current diffusion in the second semiconductor layer 223, and the current diffusion layer 27 may be made of a transparent material (e.g., ITO) having a conductivity greater than that of the second semiconductor layer 223.
The second semiconductor layer 223 may be an n-type semiconductor layer, specifically, a GaN layer doped with at least one of Si, Ge, and Sn, or an AlGaN layer doped with at least one of Si, Ge, and Sn, and the corresponding second electrode 24 is also referred to as an n-type electrode.
Optionally, as shown in fig. 5, the front-loading type light emitting diode 20 according to the second embodiment of the present application further includes a current blocking layer 28 disposed directly below the second electrode 24 and between the current diffusion layer 27 and the second semiconductor layer 223. Since the light generated by the light-emitting epitaxial layer 22 cannot pass through the second electrode 24, the current blocking layer 28 can prevent the current from being directly injected into the light-emitting epitaxial layer 22 right below the second electrode 24 from the second electrode 24, thereby reducing the amount of light blocked by the second electrode 24 and improving the lumen efficiency.
With the above-described structure, a current formed of electrons is directly injected from the plurality of electrode patterns 23 into the first semiconductor layer 221 and is laterally diffusion-injected into the active light emitting layer 222 along the first semiconductor layer 221, and a current formed of holes is directly injected into the active light emitting layer along the second semiconductor layer 223 through the second electrode 24. The electrons and holes radiatively recombine within the active light emitting layer 222 and generate photons, which in turn produce light emission. As can be seen from the above structure, the distance for the current in the light emitting epitaxial layer 22 to laterally diffuse is determined by the lateral distance between the adjacent electrode patterns 23, and since the plurality of electrode patterns 23 are distributed in a grid shape in this embodiment, the lateral distance between the adjacent electrode patterns 23 and the second electrode 24 is relatively uniform, and the lateral distance between the plurality of electrode patterns 23 and the second electrode 24 is relatively small, so that the current is more uniformly distributed in the light emitting epitaxial layer 22, which is beneficial to improving the current distribution uniformity of the light emitting diode 20, improving the heat dissipation capability, and finally improving the photo-electric thermal performance of the light emitting diode 20.
As shown in fig. 6, the flip-chip type light emitting diode 30 according to the third embodiment of the present application includes a substrate 31, a light emitting epitaxial layer 32, a second electrode 33, and an electrode pattern 34. The light-emitting epitaxial layer 32 is further formed by sequentially stacking a first semiconductor layer 321, an active light-emitting layer 322, and a second semiconductor layer 323 over the substrate 31. The material of the substrate 31 may be sapphire, SiC, Si, GaN, ZnO, GaAs, GaP, LiAl 2 O 3 Any one of BN, AlN and the like is not limited thereto.
The electrode patterns 34 are embedded in the first semiconductor layer 321 and electrically connected to the first semiconductor layer 321, for example, in the embodiment, the electrode patterns 34 are electrically connected to the first semiconductor layer 321 by direct contact. The first semiconductor layer 321 may Be a p-type semiconductor layer, for example, a GaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ban; the AlGaN layer may Be doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba, the corresponding plurality of electrode patterns 34 may also Be referred to as p-type electrodes, and the plurality of electrode patterns 34 may Be connected to each other and arranged in a grid pattern.
Further, the first semiconductor layer 321 includes a first sub-layer (not shown) and a second sub-layer (not shown), the plurality of electrode patterns 34 are disposed on a side of the first sub-layer facing away from the substrate 31, the second sub-layer is located on a side of the plurality of electrode patterns 34 facing away from the second sub-layer, and the second sub-layer covers the plurality of electrode patterns 13 and fills gaps between the plurality of electrode patterns 34.
Optionally, the first sublayer and the second sublayer are of a unitary structure, and the materials of the first sublayer and the second sublayer are the same.
In order to ensure the light emitting efficiency of the light emitting diode, the material of the electrode patterns 34 may be a transparent conductive material, and in the present embodiment, the material of the plurality of electrode patterns 34 is preferably at least one of graphene, ZrN, or HfN, which is not limited herein.
Optionally, the temperature resistance of the plurality of electrode patterns 34 is higher than the process temperature of the first semiconductor layer 321, so as to ensure that the electrode patterns 34 are not physically damaged when the second sub-layer is formed on the electrode patterns 34.
Alternatively, the thickness of the plurality of electrode patterns 34 is 0.005-2 microns.
The second electrode 33 is provided on a side of the second semiconductor layer 323 away from the substrate 31, and is electrically connected to the second semiconductor layer 323. For example, in this embodiment, the second electrode 33 is electrically connected to the second semiconductor layer 323 in direct contact therewith. The second semiconductor layer 323 may be an n-type semiconductor layer, specifically, a GaN layer doped with at least one of Si, Ge, and Sn, or an AlGaN layer doped with at least one of Si, Ge, and Sn, and the corresponding second electrode 33 is also referred to as an n-type electrode.
As shown in fig. 7, optionally, the second electrode 33 is a surface electrode, and a current diffusion layer 35 is further disposed between the second electrode 33 and the second semiconductor layer 323 to reflect light generated by the active light emitting layer 322 and further emit light from the side of the substrate 31. The deposition method of the current diffusion layer 35 can be realized by electron beam, sputtering, vacuum evaporation or electroplating. The current diffusion layer 35 may employ a transparent conductive material such as Indium Tin Oxide (ITO). In other embodiments, the current spreading layer 35 may be a metal mirror layer including silver (Ag), nickel (Ni), platinum (Pt), or other suitable metal.
The surface of the second electrode 33 is provided with a plurality of grooves 324, and the grooves 324 extend to the first semiconductor layer 321 through the current diffusion layer 35, the second semiconductor layer 323, and the active light emitting layer 322 to divide the current diffusion layer 35, the second semiconductor layer 323, and the active light emitting layer 322 into a plurality of mesa structures 325.
The flip-chip type light emitting diode 10 further includes a buffer layer 36, and the buffer layer 36 is disposed between the first semiconductor layer 321 and the substrate 31. When the first semiconductor layer 321 is a p-type semiconductor layer, the buffer layer 36 may be a p-type GaN buffer layer.
With the above-described structure, a current formed of electrons is directly injected from the plurality of electrode patterns 34 into the first semiconductor layer 321 and is laterally diffusion-injected into the active light emitting layer 322 along the first semiconductor layer 321, and a current formed of holes is directly injected into the active light emitting layer 322 along the second semiconductor layer 323 through the second electrode 33. The electrons and holes radiatively recombine within the active light emitting layer 322 and generate photons, which in turn produce light emission. As can be seen from the above structure, the distance for the current in the light emitting epitaxial layer 32 to laterally diffuse is determined by the lateral distance between the adjacent electrode patterns 34, and since the plurality of electrode patterns 34 are distributed in a grid shape in this embodiment, the lateral distance between the adjacent electrode patterns 34 and the second electrode 33 is relatively uniform, and the lateral distance between the plurality of electrode patterns 34 and the second electrode 33 is relatively small, so that the current is more uniformly distributed in the light emitting epitaxial layer 32, which is beneficial to improving the current distribution uniformity of the light emitting diode 30, improving the heat dissipation capability, and finally improving the photo-electric thermal performance of the light emitting diode 30.
As shown in fig. 8, the present application also proposes a method for manufacturing a light emitting diode, which can be used to manufacture the vertical type light emitting diode 10 in the above-mentioned embodiment. The method comprises the following steps:
s101: a growth substrate is provided.
The growth substrate may be, for example, sapphire, SiC, AlN or other suitable material.
S102: a buffer layer is grown on one main surface of the growth substrate.
The material of the buffer layer can be any one or combination of InGaN, GaN and AlInGaN. In this step, the first buffer layer may be grown on one main surface of the growth substrate by a conventional MOCVD process or by means of, for example, physical vapor deposition, sputtering, hydrogen vapor deposition or atomic layer deposition process.
S103: a first sublayer 1231 is grown on the side of the buffer layer facing away from the growth substrate.
Specifically, the first sub-layer 1231 may be sequentially formed by a Metal-organic Chemical Vapor Deposition (MOCVD), a Chemical Vapor Deposition method, a Molecular Beam Epitaxy (MBE), or other growth methods.
S104: a plurality of electrode patterns 13 are formed on the side of the first sublayer 1231 facing away from the growth substrate.
In particular, a layer of transparent conductive material is deposited on the side of the first sub-layer 1231 facing away from the growth substrate, and the deposition method of the transparent conductive material may be implemented by means of electron beam, sputtering, vacuum evaporation or electroplating. The transparent conductive material layer is etched by using a mask to complete the patterning, and the remaining transparent conductive material layer is used as an electrode pattern 13, wherein the plurality of electrode patterns 13 are connected with each other and are distributed in a grid shape.
In order to ensure the light emitting efficiency of the light emitting diode, the material of the electrode patterns 13 may be a transparent conductive material, and in the embodiment, the material of the plurality of electrode patterns 13 is preferably at least one of graphene, ZrN, or HfN, which is not limited herein.
S105: a second sub-layer 1232 is formed on a side of the plurality of electrode patterns 13 facing away from the first sub-layer 1231, and the second sub-layer 1232 covers the plurality of electrode patterns 13 and fills gaps between the plurality of electrode patterns 13.
Specifically, the second sub-layer 1232 may be grown on a side of the plurality of electrode patterns 13 away from the first sub-layer 1231 by a method such as MOCVD, and specifically, the second sub-layer 1232 may be formed by a growth method such as Metal-organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (cvd), or Molecular Beam Epitaxy (MBE).
The first sub-layer 1231 and the second sub-layer 1232 are n-type semiconductor layers, for example, the first sub-layer 1231 and the second sub-layer 1232 may be n-type semiconductor layers, specifically, GaN layers doped with at least one of Si, Ge, and Sn, or AlGaN layers doped with at least one of Si, Ge, and Sn.
S106: the active light emitting layer 122 and the first semiconductor layer 121 are sequentially grown on the second sub-layer 1232 on the side away from the first sub-layer 1231.
Specifically, the active light-emitting layer 122 and the first semiconductor layer 121 may be sequentially grown on the side of the second sublayer 1232 away from the first sublayer 1231 by a method such as MOCVD, and specifically, the active light-emitting layer 122 and the first semiconductor layer 121 may be sequentially grown by a method such as Metal-organic Chemical Vapor Deposition (MOCVD), a Chemical Vapor Deposition method, Molecular Beam Epitaxy (MBE), or the like.
The active light emitting layer 122 may have any one of the following structures: the first semiconductor layer 121 may Be a p-type semiconductor layer, specifically, a GaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba, or an AlGaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba.
S107: the substrate 11 is bonded on the side of the first semiconductor layer 121 remote from the active light emitting layer 122.
Specifically, the substrate 11 may be made of a conductive material such as Si, Ge, Cu, CuW, or the like. In this step, the mirror pattern 16 may be formed on the first semiconductor layer 121 away from the active light emitting layer 122, and then the first metal bonding layer 141 may be formed on the mirror pattern 16 and the first semiconductor layer 121 exposed by the mirror pattern 16 by thermal evaporation, electron beam evaporation, magnetron sputtering evaporation, or the like. The second metal bonding layer 142 is further formed on one main surface of the substrate 11 by thermal evaporation, electron beam evaporation, magnetron sputtering evaporation, or the like. Finally, the first and second metal bonding layers 141 and 142 are bonded through a bonding process. The material of the first metal bonding layer 141 and the second metal bonding layer 142 may be at least one of In, Cu, Au, Ni, Ti, and Sn, or an alloy thereof, which is not limited herein. A first electrode 15 is disposed on a side of the substrate 11 away from the first semiconductor layer 121, the first electrode 15 is electrically connected to the first semiconductor layer 121 sequentially through the substrate 11, the second metal bonding layer 142, and the first metal bonding layer 141, and the corresponding first electrode 15 is also referred to as a p-type electrode.
S108: the buffer layer is used as a stripping sacrificial layer, the buffer layer is removed, the growth substrate is stripped from the contact surface of the buffer layer and the growth substrate, and the first sub-layer 1231 is exposed.
Specifically, the buffer layer may be removed by dry etching, wet etching, or a combination thereof.
As shown in fig. 9, the present application also proposes a method for manufacturing a light emitting diode, which can be used for manufacturing the forward type light emitting diode 20 in the above embodiment, the method comprising the steps of:
s201: a substrate 21 is provided.
The material of the substrate 21 may be sapphire, SiC, Si, GaN, ZnO, GaAs, GaP, LiAl 2 O 3 Any one of BN, AlN and the like is not limited thereto.
S202: a first sub-layer is grown on one major surface of the substrate 21.
Specifically, the first sub-layer may be formed sequentially by Metal-organic Chemical Vapor Deposition (MOCVD), or a Chemical Vapor Deposition method, a Molecular Beam Epitaxy (MBE), or other growth methods.
S203: a plurality of electrode patterns 23 is formed on the side of the first sub-layer facing away from the substrate 21.
In order to ensure the light emitting efficiency of the light emitting diode, the material of the electrode patterns 23 may be a transparent conductive material, and in the present embodiment, the material of the plurality of electrode patterns 23 is preferably at least one of graphene, ZrN, or HfN, which is not limited herein.
The specific process of step S203 can refer to S105 in the above embodiment, which is not described herein.
S204: a second sub-layer is formed on a side of the plurality of electrode patterns 23 facing away from the first sub-layer, and covers the plurality of electrode patterns 23 and fills gaps between the plurality of electrode patterns 23.
The first sub-layer and the second sub-layer are p-type semiconductor layers, and specifically can Be GaN layers doped with at least one of Mg, Zn, Be, Ca, Sr and Ba; the AlGaN layer may Be doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba.
The specific process of step S204 can refer to S105 in the above embodiment, which is not described herein.
S205: an active light emitting layer 222 and a second semiconductor layer 223 are grown in sequence on the side of the second sublayer facing away from the first sublayer.
The second semiconductor layer 223 may be an n-type semiconductor layer, for example, a GaN layer doped with at least one of Si, Ge, and Sn; the AlGaN layer may be doped with at least one of Si, Ge, and Sn.
The specific process of step S205 can refer to S106 in the above embodiment, which is not described herein.
S206: a current diffusion layer 27 is formed on a side of the second semiconductor layer 223 facing away from the active light emitting layer 222.
Specifically, a current diffusion layer 27 is grown on the second semiconductor layer 223 facing away from the active light emitting layer 222 using a plasma enhanced chemical vapor deposition method. The current diffusion layer 27 may employ a transparent conductive material such as Indium Tin Oxide (ITO). In other embodiments, the current spreading layer 27 may be a metal mirror layer including silver (Ag), nickel (Ni), platinum (Pt), or other suitable metal.
S207: at least the current diffusion layer 27, the second semiconductor layer 223 and the active light emitting layer 222 are patterned to form a plurality of mesa structures 225 disposed to be spaced apart from each other and exposing a portion of the first semiconductor layer 221.
Specifically, an etching process is applied to remove portions of the active light emitting layer 222 and the second semiconductor layer 223 to form grooves 224 on the active light emitting layer 222 and the second semiconductor layer 223, the grooves 224 divide the active light emitting layer 222 and the second semiconductor layer 223 into a plurality of mesa structures 225 arranged in an array spaced apart from each other, and the first semiconductor layer 221 is exposed in the region of the grooves 224. The etching process may include dry etching, wet etching, or a combination thereof. The etching process may include various etching steps, each designed to use a specific etchant to effectively remove the respective active light emitting layer 222 and the second semiconductor layer 223.
In an alternative embodiment, the trench 224 may be formed by the following process, further using a mask: a mask is formed on the second semiconductor layer 223, the mask is patterned using a photolithography process, and the active light emitting layer 222 and the second semiconductor layer 223 are etched using the patterned mask as an etching mask to form the trench 224.
In an alternative embodiment, the patterned current spreading layer 27 may be further used as a mask and is not removed after etching to form the trench 224. The current diffusion layer 27 may include a plurality of metal films that perform various functions.
S208: a second electrode 24 electrically connected to the second semiconductor layer 223 is formed on the current diffusion layer 27.
The second semiconductor layer 223 may be an n-type semiconductor layer, specifically, a GaN layer doped with at least one of Si, Ge, and Sn, or an AlGaN layer doped with at least one of Si, Ge, and Sn, and the corresponding second electrode 24 is also referred to as an n-type electrode.
Further, the transparent dielectric layer 26 is covered on the upper surface and the peripheral side wall surface of the current diffusion layer 27, the side wall surface of the trench 224, and the second electrode 24 by ALD, PECVD, sputtering, spraying, or the like, and the transparent dielectric layer 26 may be made of one of aluminum nitride, silicon dioxide, silicon nitride, aluminum oxide, bragg reflector DBR, silica gel, resin, or acrylic.
As shown in fig. 10, the present application also proposes a method for manufacturing a light emitting diode, which can be used for manufacturing the flip-chip type light emitting diode 30 in the above embodiment, the method comprising the steps of:
s301: a substrate 31 is provided.
The material of the substrate 31 may be sapphire, SiC, Si, GaN, ZnO, GaAs, GaP, LiAl 2 O 3 Any one of BN, AlN and the like is not limited thereto.
S302: a first sub-layer is grown on one major surface of the substrate 31.
The specific process of step S302 can refer to S202 in the above embodiment, which is not described herein.
S303: a plurality of electrode patterns 34 are formed on the side of the first sub-layer facing away from the substrate 31.
The specific process of step S303 can refer to step S203 in the above embodiment, which is not described herein.
In order to ensure the light emitting efficiency of the light emitting diode, the material of the electrode patterns 34 may be a transparent conductive material, and in the present embodiment, the material of the plurality of electrode patterns 34 is preferably at least one of graphene, ZrN, or HfN, which is not limited herein.
S304: a second sublayer is formed on a side of the plurality of electrode patterns 34 facing away from the first sublayer, covering the plurality of electrode patterns 34 and filling gaps between the plurality of electrode patterns 34.
The first sub-layer and the second sub-layer are p-type semiconductor layers, and may Be GaN layers doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba, for example; the AlGaN layer may Be doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba.
The specific process of step S304 can refer to step S105 in the above embodiment, which is not described herein.
S305: an active light emitting layer 322 and a second semiconductor layer 323 are grown in sequence on the side of the second sublayer facing away from the first sublayer.
The second semiconductor layer 323 may Be an n-type semiconductor layer, and specifically may Be a GaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba.
The specific process of step S305 can refer to S106 in the above embodiment, which is not described herein again.
S306: a current diffusion layer 35 is formed on a side of the second semiconductor layer 323 facing away from the active light emitting layer 322.
And growing a current diffusion layer 35 on the side of the second semiconductor layer 323 away from the active light-emitting layer 322 by using an electron beam evaporation or magnetron sputtering method. The current diffusion layer 35 may employ a transparent conductive material such as Indium Tin Oxide (ITO). In other embodiments, the current spreading layer 35 may be a metal mirror layer including silver (Ag), nickel (Ni), platinum (Pt), or other suitable metal.
S307: the current spreading layer 35 and the light emitting epitaxial layer 32 are patterned to form a groove 324 extending to a certain depth of the first semiconductor layer 321.
The groove 324 may be formed by a process including a photolithography patterning process and an etching process.
S308: the second electrode 33 is formed on the side of the current diffusion layer 35 facing away from the second semiconductor layer 323.
The second semiconductor layer 223 may Be an n-type semiconductor layer, specifically, a GaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba, or an AlGaN layer doped with at least one of Mg, Zn, Be, Ca, Sr, and Ba. The corresponding second electrode 24 is also referred to as an n-type electrode.
It should be noted that the execution sequence of the above steps may be adjusted or deleted according to actual needs.
The above embodiments are merely examples and are not intended to limit the scope of the present disclosure, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present disclosure or those directly or indirectly applied to other related technical fields are intended to be included in the scope of the present disclosure.
Claims (10)
1. A light emitting diode, comprising:
a substrate;
a first electrode on one side of the substrate;
the light-emitting epitaxial layer comprises a first semiconductor layer, an active light-emitting layer and a second semiconductor layer which are sequentially stacked and arranged on one main surface of the substrate, and the first electrode partially covers the second semiconductor layer;
and a plurality of electrode patterns buried in the second semiconductor layer, connected to each other, and arranged in a grid pattern, wherein the cross-sectional area of the plurality of electrode patterns in the parallel direction of the main surface of the substrate is smaller and/or the pitch between the plurality of electrode patterns is larger as the electrode patterns are closer to the first electrode.
2. The led of claim 1, wherein the first semiconductor layer or the second semiconductor layer comprises a first sub-layer and a second sub-layer, the plurality of electrode patterns are disposed on a side of the first sub-layer facing away from the substrate, the second sub-layer is disposed on a side of the plurality of electrode patterns facing away from the first sub-layer, and the second sub-layer covers the plurality of electrode patterns and fills gaps between the plurality of electrode patterns.
3. The led of claim 1, wherein a temperature resistance of the plurality of electrode patterns is greater than a process temperature of the first semiconductor layer or the second semiconductor layer.
4. The led of claim 2, wherein the material of the electrode pattern is at least one of graphene, ZrN, or HfN.
5. The light-emitting diode according to claim 1,
the thickness of the plurality of electrode patterns is 0.005-2 μm.
6. The light-emitting diode according to claim 2,
the first sublayer and the second sublayer are of an integral structure.
7. A method of manufacturing a light emitting diode, the method comprising:
providing a substrate;
forming a plurality of electrode patterns on the substrate;
forming a semiconductor layer on the plurality of electrode patterns so that the plurality of electrode patterns are buried in the semiconductor layer;
and a first electrode on the substrate, the first electrode partially covering the semiconductor layer, the closer to the first electrode, the smaller a cross-sectional area of the plurality of electrode patterns in a parallel direction of the main surface of the substrate and/or the larger a pitch between the plurality of electrode patterns.
8. The method of claim 7, wherein the semiconductor layer comprises a first sublayer and a second sublayer;
before the step of forming a plurality of electrode patterns on the substrate, further forming the first sub-layer on the substrate, so that a plurality of electrode patterns are formed on the side of the first sub-layer away from the substrate;
the step of forming the semiconductor layer on the plurality of electrode patterns includes:
and forming the second sub-layer on the side of the electrode patterns, which faces away from the first sub-layer, wherein the second sub-layer covers the electrode patterns and fills gaps among the electrode patterns.
9. The method of claim 8,
prior to the step of forming a plurality of electrode patterns on the substrate, the method further comprises: and sequentially growing a first semiconductor layer and an active light-emitting layer on the main surface of one side of the substrate, wherein the first sub-layer is formed on the side, away from the first semiconductor layer, of the active light-emitting layer.
10. The method of claim 8, wherein the first sub-layer and the second sub-layer are grown by chemical vapor deposition or molecular beam epitaxy, and the material of the plurality of electrode patterns is at least one of graphene, ZrN, or HfN.
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