CN112668259A - System verification method of post-simulation netlist - Google Patents
System verification method of post-simulation netlist Download PDFInfo
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- CN112668259A CN112668259A CN202011548363.0A CN202011548363A CN112668259A CN 112668259 A CN112668259 A CN 112668259A CN 202011548363 A CN202011548363 A CN 202011548363A CN 112668259 A CN112668259 A CN 112668259A
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Abstract
A system verification method of a post-simulation netlist comprises the following steps: loading data of the process nodes for input end setting; the processing end analyzes the data set at the input end to generate a post-simulation netlist; and the output end analyzes the post-simulation network table to generate a network parameter report file. The system verification method of the post-simulation netlist can automatically process a large amount of data in the advanced process nodes, automatically judge the accuracy, finally form a data report and a statistical analysis result, save a large amount of precious time and ensure the correctness of functions and the accuracy of numerical values.
Description
Technical Field
The invention relates to the technical field of Electronic Design Automation (EDA) software of integrated circuits, in particular to a system verification method for a post-simulation netlist based on advanced process nodes.
Background
With the progress of the process, parasitic effects needing to be considered in advanced process nodes are very much, so that a post-simulation netlist file is also relatively large, the number of data lines extracted from one type of data is as large as several million lines, and manual analysis and judgment are almost impossible. Particularly, in 14n/12n/7n advanced process technology nodes, the types AND the number of parasitic parameters are greatly increased (for example, ETCH _ VS _ WIDTH _ AND _ SPACING is not simple data any more, but becomes a complex numerical table), the influence on the design is more obvious, AND no system scheme is extracted AND verified at present, so that an effective system is urgently needed to perform detailed analysis AND verification on a post-simulation netlist (including parasitic parameters).
Disclosure of Invention
In order to solve the defects in the prior art, the invention aims to provide a system verification method of a post-simulation netlist, which can automatically process a large amount of data in an advanced process node, automatically judge the accuracy, finally form a data report and a statistical analysis result, save a large amount of precious time and ensure the correctness of functions and the accuracy of numerical values.
In order to achieve the above object, the system verification method for post-simulation netlist provided by the present invention comprises the following steps:
loading data of the process nodes for input end setting;
the processing end analyzes the data set at the input end to generate a post-simulation netlist;
and the output end analyzes the post-simulation network table to generate a network parameter report file.
Further, the step of loading the data of the process node for input end setting further comprises setting an input data text file of the advanced process node, setting an extraction file parameter text file, setting a report data type text file and setting a process node switch text file.
Further, the step of setting the input data text file of the advanced process node further comprises the step of inputting data types including data generated according to the tcl script, completed standard units and completed simulation IP design modules.
Further, the step of setting the process node switch further comprises referencing the input data of the process node when the process node switch is set to true.
Furthermore, the step of analyzing the input end setting data by the processing end to generate the post-simulation netlist further comprises analyzing the input data of the advanced process node, extracting parasitic parameters according to the file parameter setting, and generating the post-simulation netlist.
Further, the step of generating the net parameter report file by analyzing the post-simulation net list by the output end further comprises the steps of extracting the post-simulation net list, judging the correctness of the post-simulation net list and the parasitic parameters, judging whether the precision of the parasitic parameters meets the requirement or not, and generating the report file.
To achieve the above object, the present invention further provides an electronic device, which includes a memory and a processor, wherein the memory stores a computer program running on the processor, and the processor executes the steps of the system verification method for post-simulation netlist as described above when running the computer program.
To achieve the above object, the present invention further provides a computer readable storage medium having stored thereon a computer program which when executed performs the steps of the system verification method for a post-simulation netlist as described above.
The system verification method of the post-simulation netlist, the electronic device and the computer-readable storage medium have the following beneficial effects:
1) a large amount of test type data are generated by utilizing a tcl script command of the Huada nine-day layout tool, so that the coverage rate is greatly improved, and various conditions during parasitic parameter extraction are considered. .
2) A large amount of data in the advanced process nodes are automatically processed, the accuracy is automatically judged, and finally a data report and a statistical analysis result are formed, so that a large amount of precious time can be saved, and the functional correctness and the numerical value accuracy can be ensured.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a flow diagram of a system verification method for a post-simulation netlist in accordance with the present invention;
FIG. 2 is a schematic diagram of generating test input data for a tcl script according to an embodiment of the invention;
FIG. 3 is a diagram illustrating an input data selection according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an operational parameter setting according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a tcl partial script according to an embodiment of the invention;
FIG. 6 is a diagram illustrating an extracted parameter template setting according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of an operational setup process according to an embodiment of the present invention;
FIG. 8 is a diagram illustrating generated report data according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of post-simulation netlist simulation data according to an embodiment of the invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Fig. 1 is a flowchart of a system verification method for a post-simulation netlist according to the present invention, and the system verification method for a post-simulation netlist according to the present invention will be described in detail with reference to fig. 1.
First, in step 101, data for verifying a process node is loaded and input terminal settings are performed.
Preferably, the input comprises four columns of text files. In this step, the input is a text file divided into four columns.
In this embodiment, as shown in fig. 3 and 4, input end data selection and operation parameter setting are performed.
Preferably, the first column of text files of the input includes input data of the advanced process node.
Preferably, the input data types include data generated according to tcl scripts, finished standard cells, and finished simulated IP design modules.
In this embodiment, data generated by a script is used. As shown in FIG. 2, the test input data is generated using a layout tool for nine days Huada and tcl scripts supported by the layout. Because the existing data is manually created, the coverage and efficiency of the test case are limited, and the coverage and efficiency can be greatly improved by using the tcl script. For example, various types of data such as sandwich structures, pizza structures, MOM/MIM capacitors, etc. may be created, and the creation of the various types of data is accomplished by scanning parameter variables. As shown in FIG. 5, part of the content of the tcl script generation data is included.
In this embodiment, various data can be generated by tcl scripts through the combination of various parameters (width/length/finger) of the finished standard unit, for example, pcell.
Preferably, the second column of text file at the input end is a setting file, and includes table (parasitic table look-up data) used for specifying a certain input data, layermap (mapping of design layer), and other settings.
In this embodiment, an empExt command + rcev2.cmd may be used to perform post-simulation netlist extraction, and generate a dspf netlist (post-simulation netlist format of a parameter extraction tool in ninety days of huada) of each data.
Preferably, the third column of the text file of the input includes a data type setting.
In the embodiment, the data type is set, so that different data reports and report statistical analysis can be generated conveniently by using the python language.
Preferably, the text file of the fourth column of the input terminal comprises a switch setting.
Preferably, the input data for a process node is only referenced when its switch is set to true.
In this embodiment, the switch setting is generally performed according to a node of a certain process, for example, to verify a 12nm process, all test data type switches corresponding to 12nm need to be turned on.
In this embodiment, as shown in fig. 6, the setting of the extracted parameter template includes: 1) firstly, setting input data, specifically in query _ cmd; 2) then setting of table/map/etf; 3) finally, other settings such as extraction type (R/C/RC), process number, 3D extracted NETS (FS _ CAP _ NETS) and the like are set; according to the setting, the post-simulation netlist can be generated by executing empExt and following the setting file. The operation process is shown in fig. 7, the generated report data is shown in fig. 8, and the post-simulation netlist simulation data is shown in fig. 9.
In step 102, the data of true of the processing-side selection switch is analyzed to generate a post-simulation netlist.
Preferably, the data in the first column is fetched, the extraction is started according to the settings (table/map file, R/C/RC extraction, 25D/3D extraction, parallel running process number and other settings) in the second column, a dspf netlist is generated after the extraction is completed, the netlist is subjected to parameter analysis, and the parameter analysis is performed by python and is written into excel for statistical analysis.
In step 103, the output end analyzes the post-simulation netlist to generate a net parameter report file.
Preferably, the correctness of basic functions such as the connectivity, the number of parameters and the like of the basic netlist is checked, the resistance and the capacitance of each net are analyzed, whether the correctness and the precision of the parasitic parameters meet the requirements or not is judged, a report file is generated, and the parameters of each net and whether the requirements are met or not are recorded in the report file.
The system verification method of the post-simulated netlist of the present invention is further described below with reference to a specific embodiment.
(1) To first modify the input file (test _ plan _ file), for example to verify a 12nm process, all data corresponding to 12nm is loaded.
(2) The configuration file (config _ file) is then modified, specifying settings for using the test _ plan _ file, specifying the run directory, and reporting the directory.
(3) And after the setting is finished, selecting a tool version to be verified, starting operation (such as start _ reg.sh-not-config config _ file), starting the system to operate according to the set parameters (in an operation directory), after the operation is finished, calling a comparison analysis module by the system to perform various types of analysis on the post-simulation netlist, and finally generating a report (in a report directory) according to an analysis result.
The invention provides a system verification method for a post-simulation netlist based on advanced process nodes, which is used for analyzing and processing a large amount of data, namely processing more than one million lines of data. The accuracy and precision index of the 'advanced process parasitic parameter extraction tool' in Huada nine days are verified by the method. And automatically extracting the post-simulation netlist, judging whether the correctness of the post-simulation netlist, the correctness of the parasitic parameters and the precision of the parameters meet the requirements or not, and automatically generating an analysis report.
In an embodiment of the present invention, there is also provided an electronic device, including a memory and a processor, where the memory stores a computer program running on the processor, and the processor executes the computer program to execute the steps of the method for verifying a system of a post-simulation netlist as described above.
In one embodiment of the present invention, there is also provided a computer readable storage medium having stored thereon a computer program which when run performs the steps of the method for system verification of a post-simulated netlist as described above.
Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
1. A system verification method of a post-simulation netlist is characterized by comprising the following steps:
loading data of the process nodes for input end setting;
the processing end analyzes the data set at the input end to generate a post-simulation netlist;
and the output end analyzes the post-simulation network table to generate a network parameter report file.
2. The method for system verification of a post-simulation netlist as claimed in claim 1, wherein the step of loading data of process nodes for input end setting further comprises setting an input data text file of advanced process nodes, setting an extraction file parameter text file, setting a report data type text file and setting a process node switch text file.
3. The method for system verification of a post-simulation netlist as claimed in claim 2, wherein the step of setting the input data text file of the advanced process node further comprises the input data type including data generated according to tcl script, completed standard cells and completed simulated IP design modules.
4. The method for system verification of a post-simulation netlist as claimed in claim 2, wherein the step of setting a process node switch text file further comprises referencing input data of a process node when the process node switch is set to true.
5. The method for system verification of a post-simulation netlist as claimed in claim 2, wherein the step of the processing terminal analyzing the input end setting data to generate the post-simulation netlist further comprises analyzing the input data of the advanced process node, extracting parasitic parameters according to the file parameter setting, and generating the post-simulation netlist.
6. The method for system verification of a post-simulation netlist as claimed in claim 1, wherein the step of the output analyzing the post-simulation netlist to generate a netlist file further comprises the steps of extracting the post-simulation netlist, judging the correctness of the post-simulation netlist and the parasitic parameters, judging whether the precision of the parasitic parameters meets the requirements, and generating a report file.
7. An electronic device comprising a memory and a processor, the memory having stored thereon a computer program for execution on the processor, when executing the computer program, performing the steps of the method for system verification of a post-simulated netlist as claimed in any one of claims 1 to 6.
8. A computer-readable storage medium having stored thereon a computer program, characterized in that the computer program when executed performs the steps of the method for system verification of a post-simulated netlist as claimed in any one of claims 1 to 6.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114117985A (en) * | 2021-12-03 | 2022-03-01 | 芯格(上海)微电子有限公司 | Intelligent verification method, system, medium and terminal equipment of integrated operational amplifier |
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