CN110705198A - Method for verifying multi-port multi-message type cross communication component - Google Patents
Method for verifying multi-port multi-message type cross communication component Download PDFInfo
- Publication number
- CN110705198A CN110705198A CN201910858602.3A CN201910858602A CN110705198A CN 110705198 A CN110705198 A CN 110705198A CN 201910858602 A CN201910858602 A CN 201910858602A CN 110705198 A CN110705198 A CN 110705198A
- Authority
- CN
- China
- Prior art keywords
- port
- reference model
- various
- message
- message type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004891 communication Methods 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 title claims abstract description 13
- 230000005540 biological transmission Effects 0.000 claims abstract description 38
- 238000013461 design Methods 0.000 claims abstract description 31
- 238000012360 testing method Methods 0.000 claims abstract description 13
- 238000012986 modification Methods 0.000 claims description 3
- 230000004048 modification Effects 0.000 claims description 3
- 238000012795 verification Methods 0.000 abstract description 12
- 238000012937 correction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Abstract
The invention relates to a method for verifying a multi-port multi-message type cross communication component, which comprises the following steps: defining various data fields contained in various message types; defining each path of physical channel on each port; establishing corresponding relations between various message types and corresponding physical channels of various ports according to actual design requirements; establishing a transmission reference model according to actual design requirements; generating a test sequence containing various message types, and injecting the test sequence into a reference model and a transmission port designed actually; collecting a message queue of message types acquired from a transmission reference model and a receiving port which is actually designed; and comparing the sequence of the transmission reference model and the actually designed receiving message queue and the domain correctness of various types of data contained in each receiving message type in the queue. The invention ensures that the verification result is more accurate and convenient.
Description
Technical Field
The invention relates to the technical field of processor chip simulation verification, in particular to a verification method of a multi-port multi-message type cross communication component.
Background
With the continuous expansion of the design scale and the increasing design complexity of integrated circuits, the design of processors is more and more complex, and the functions are more diversified. Therefore, verification of the correctness of processor chips becomes increasingly complex and difficult. This complexity, diversity and difficulty may be manifested in the presence of a large number of different types of messages cross-communicated between multiple ports, both within a single processor and among multiple processors, requiring assurance of correctness verification of the multi-port, multi-message type cross-communication component and speeding up of the verification process.
In order to improve the performance of the processor, the message type and the corresponding port interface protocol are often customized in the processor design, so that a vip (verification intelligent performance) based on a general bus protocol provided by a third party cannot be used, and the verification period and the difficulty degree of correctness verification of the processor are greatly increased.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a verification method of a multi-port multi-message type cross communication component, which realizes the correctness verification of the multi-port cross communication component.
The technical scheme adopted by the invention for solving the technical problems is as follows: there is provided a method of validating a multi-port multi-message type cross communication unit, comprising the steps of:
(1) defining various data fields contained in various message types;
(2) defining each path of physical channel on each port;
(3) establishing corresponding relations between various message types and various physical channels of various ports according to actual design requirements, so that various message types can be sent and received on the corresponding physical channels of the various ports;
(4) establishing a transmission reference model according to actual design requirements;
(5) generating a test sequence containing various message types, and injecting the test sequence into a reference model and a transmission port designed actually; collecting a message queue of message types acquired from a transmission reference model and a receiving port which is actually designed; comparing the sequence of the transmission reference model and the actually designed received message queue, and the domain correctness of various types of data contained in each received message type in the queue;
(6) and (5) when the correctness comparison is wrong, correcting the transmission reference model or the actual design according to the design requirement, and repeating the step (5) until the results obtained by the reference model and the actual design are consistent and meet the design requirement.
The physical channel in the step (2) comprises a channel name and a data bit width.
The transmission reference model in the step (4) can obtain the corresponding message type and information of the receiving port of the transmission reference model through the message type and information of the sending port of the transmission reference model and the current state of the transmission reference model, and update the corresponding state of the transmission modification model.
And (5) injecting the test sequence in the step (5) into the reference model and the actually designed transmitting port according to a time sequence.
Advantageous effects
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects: the invention can complete the self-definition of the ports and the message types according to the design requirements, and establishes the reference model of message transmission by utilizing the corresponding relation between each port and the message type, thereby meeting the requirements of various designs. The invention generates a test message type sequence, injects the test message type sequence into the actual design and the transmission reference model, collects the output of the test message type sequence and the transmission reference model at each port to form a message type queue, and corrects the actual design or the reference model by comparing the message queues collected by the actual design and the transmission reference model, so that the final comparison result is consistent, thereby ensuring the correctness verification of the whole component.
Drawings
FIG. 1 is a flow chart of the present invention.
Detailed Description
The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention may be made by those skilled in the art after reading the teaching of the present invention, and such equivalents may fall within the scope of the present invention as defined in the appended claims.
The embodiment of the invention relates to a method for verifying a multi-port multi-message type cross communication component, which comprises the following steps as shown in figure 1:
the first step is as follows: defining various data fields contained in various message types;
the second step is as follows: defining each path of physical channel on each port, wherein the physical channel comprises a channel name, a data bit width and the like;
the third step: establishing corresponding relations between various message types and various physical channels of various ports according to actual design requirements, and realizing that various message types can be sent and received on the corresponding physical channels of various ports;
the fourth step: and establishing a transmission reference model according to the actual design requirement. The transmission reference model can obtain the corresponding message type and information of the receiving port of the transmission reference model and modify the corresponding state of the transmission reference model through the message type and information of the sending port of the transmission reference model and the current state of the transmission reference model.
The fifth step: generating a test sequence containing various message types, and injecting the test sequence into a transmission reference model and a transmission port which is actually designed according to a time sequence (simultaneously or time-sharing, continuously or at intervals); collecting a message queue of a message type on a transmission reference model and an actually designed receiving port; and comparing the sequence of the received message queues and the domain correctness of various types of data contained in each received message type in the queues.
A sixth step: when the correctness comparison is wrong, searching for problems existing in the transmission reference model and the actual design according to the design document, and making a correction; and repeating the fifth step until the result obtained by transmitting the reference model is consistent with the result obtained by actual design and meets the design requirement.
The method can complete the self-definition of the ports and the message types according to the design requirements, and establish the reference model of message transmission by utilizing the corresponding relation between each port and the message type, thereby meeting various design requirements, such as: information of one message type is sent and received through one physical channel on a port or is sent and received through a plurality of physical channels split on the port; one physical channel on the port can send and receive information of one or more message types; a message type may be sent to one or more ports through a port; the same message type on multiple ports can be sent to the same port for reception.
Claims (4)
1. A method of validating a multi-port multi-message type cross-communication unit, comprising the steps of:
(1) defining various data fields contained in various message types;
(2) defining each path of physical channel on each port;
(3) establishing corresponding relations between various message types and various physical channels of various ports according to actual design requirements, so that various message types can be sent and received on the corresponding physical channels of the various ports;
(4) establishing a transmission reference model according to actual design requirements;
(5) generating a test sequence containing various message types, and injecting the test sequence into a reference model and a transmission port designed actually; collecting a message queue of message types acquired from a transmission reference model and a receiving port which is actually designed; comparing the sequence of the transmission reference model and the actually designed received message queue, and the domain correctness of various types of data contained in each received message type in the queue;
(6) and (5) when the correctness comparison has errors, correcting the transmission reference model or the actual design according to the design requirements, and repeating the step (5) until the results obtained by the reference model and the actual design are consistent and are consistent with the design requirements.
2. The method for validating a multi-port multi-message type cross communication unit according to claim 1, wherein the physical channel in the step (2) comprises a channel name and a data bit width.
3. The method for validating multi-port multi-message type cross communication unit as claimed in claim 1, wherein the transmission reference model in step (4) is capable of obtaining the corresponding message type and information of the receiving port and updating the corresponding state of the transmission modification model by the message type and information of the sending port and the current state of the transmission reference model.
4. The method for validating multi-port multi-message type cross communication unit according to claim 1, wherein the test sequence in the step (5) is injected into the reference model and the actually designed transmission port in time series.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910858602.3A CN110705198A (en) | 2019-09-11 | 2019-09-11 | Method for verifying multi-port multi-message type cross communication component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910858602.3A CN110705198A (en) | 2019-09-11 | 2019-09-11 | Method for verifying multi-port multi-message type cross communication component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110705198A true CN110705198A (en) | 2020-01-17 |
Family
ID=69196239
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910858602.3A Pending CN110705198A (en) | 2019-09-11 | 2019-09-11 | Method for verifying multi-port multi-message type cross communication component |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110705198A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112668259A (en) * | 2020-12-24 | 2021-04-16 | 北京华大九天科技股份有限公司 | System verification method of post-simulation netlist |
| CN113315664A (en) * | 2021-06-16 | 2021-08-27 | 无锡江南计算技术研究所 | Message processing chip verification method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1630053A (en) * | 2003-12-18 | 2005-06-22 | 四川南山之桥微电子有限公司 | Verification method for ping-pong match mode of switching chip |
| CN101841437A (en) * | 2010-03-23 | 2010-09-22 | 华为技术有限公司 | Method and device for testing equipment |
| CN108614786A (en) * | 2016-12-12 | 2018-10-02 | 中国航空工业集团公司西安航空计算技术研究所 | Channel management circuit based on message traffic type |
-
2019
- 2019-09-11 CN CN201910858602.3A patent/CN110705198A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1630053A (en) * | 2003-12-18 | 2005-06-22 | 四川南山之桥微电子有限公司 | Verification method for ping-pong match mode of switching chip |
| CN101841437A (en) * | 2010-03-23 | 2010-09-22 | 华为技术有限公司 | Method and device for testing equipment |
| CN108614786A (en) * | 2016-12-12 | 2018-10-02 | 中国航空工业集团公司西安航空计算技术研究所 | Channel management circuit based on message traffic type |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112668259A (en) * | 2020-12-24 | 2021-04-16 | 北京华大九天科技股份有限公司 | System verification method of post-simulation netlist |
| CN113315664A (en) * | 2021-06-16 | 2021-08-27 | 无锡江南计算技术研究所 | Message processing chip verification method |
| CN113315664B (en) * | 2021-06-16 | 2023-07-11 | 无锡江南计算技术研究所 | Message processing chip verification method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103036739B (en) | Formalization method for verification and performance analysis of high reliable communication system | |
| CN103716823A (en) | Downlink control information blind test indication sending method and downlink control information blind test method in LTE/LTE-A system | |
| CN110705198A (en) | Method for verifying multi-port multi-message type cross communication component | |
| CN102651229B (en) | Semiconductor device and data processing method | |
| CN114330191B (en) | Method and device for signal multiplexing transmission | |
| CN107317644A (en) | A kind of compatible burst and the frame-synchronizing device of continuous data | |
| CN109951366A (en) | A kind of Modbus RTU bus control unit and control method | |
| CN103098527A (en) | Wireless communication apparatus, wireless communication system and wireless communication method | |
| CN113572560B (en) | Method, electronic device, and storage medium for determining clock synchronization accuracy | |
| Dolatsara et al. | Worst-case eye analysis of high-speed channels based on Bayesian optimization | |
| US10120019B2 (en) | Automated method for analyzing a board having a plurality of FPGA components | |
| CN104270155A (en) | Manchester code stream reception and anti-interference analysis method | |
| CN103413003B (en) | A kind of sequence transmission, reception device and method | |
| CN111026590B (en) | Data verification method and platform of interface circuit | |
| CN110366101B (en) | Method for realizing large-scale positioning by UWB centralized computing | |
| CN114595102A (en) | Authentication method, electronic device, and storage medium | |
| Seol et al. | Interoperability test generation and minimization for communication protocols based on the multiple stimuli principle | |
| CN114422126A (en) | Joint debugging test system and method for quantum key management software module | |
| CN102332975A (en) | Method and device for self-adaptively sampling interface | |
| CN1125989C (en) | Circuit time delay measuring method | |
| CN112507641B (en) | Alternating verification method and system for integrated circuit | |
| CN114911737B (en) | FPGA pin multiplexing method based on signal frequency, electronic device and medium | |
| CN114338032B (en) | Deep learning-oriented high-precision timestamp security verification acceleration method and device | |
| US20090213941A1 (en) | Method and device for implementing data transmission | |
| CN103716824B (en) | Radio sensing network message digging system and method for digging based on correlation rule |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200117 |