CN112600857A - SRIO and gigabit network interconnection device based on FPGA - Google Patents
SRIO and gigabit network interconnection device based on FPGA Download PDFInfo
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- CN112600857A CN112600857A CN202011607321.XA CN202011607321A CN112600857A CN 112600857 A CN112600857 A CN 112600857A CN 202011607321 A CN202011607321 A CN 202011607321A CN 112600857 A CN112600857 A CN 112600857A
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 13
- 238000004891 communication Methods 0.000 claims abstract description 6
- 230000003993 interaction Effects 0.000 claims abstract description 4
- 230000003287 optical effect Effects 0.000 claims abstract description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Abstract
The invention discloses an SRIO and gigabit network interconnection device based on FPGA, comprising: the system comprises an FPGA chip, an SRIO interface, a gigabit network interface RJ45 and an SFP interface; the FPGA chip is connected to a gigabit network interface RJ45 through a 3-path PHY chip and connected to an SFP interface through a 4-path optical interface, and is used for interacting network data with other systems; the FPGA is also connected to the 1-path SRIO interface so as to meet the SRIO data interaction with an external system; the FPGA mounted DDR3 chip is used for data buffer storage, and an EEPROM is externally hung for storing information related to the serial number of the board card; the FPGA completes data receiving and sending of the SRIO and the Ethernet, completes storage and caching of data through the externally mounted DDR3, and completes format conversion of the Ethernet and the SRIO communication protocol through the protocol conversion module. The device can realize protocol conversion between gigabit Ethernet data and SRIO data in a hardware programmable mode, and has the advantages of real-time performance and expansibility.
Description
Technical Field
The invention belongs to the field of electronic engineering and computer science, and particularly relates to an SRIO and gigabit network interconnection device based on an FPGA.
Background
In the big data era of Rapid development of high-speed interconnection technology, ethernet transmission and SRIO (a new generation of high-speed interconnection technology based on packet switching, high reliability and high performance, developed for embedded systems) transmission are widely used due to their characteristics of high reliability and high performance. Based on the development of interconnection technology, the ethernet can complete the connection between devices through interconnection devices such as a router. The SRIO may also complete networking through a dedicated switch. In the ethernet or SRIO network, each device may complete data transmission through a corresponding protocol. With the expansion of application scenarios, data communication in the ethernet or SRIO network cannot meet the application requirements, and communication between the ethernet and SRIO devices, between the SRIO network and ethernet devices, and between the ethernet and SRIO network becomes inevitable.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the invention provides an SRIO and gigabit network interconnection device based on an FPGA, and discloses the SRIO and gigabit network interconnection device based on the FPGA, which realizes data protocol conversion between the SRIO and the gigabit network to a certain extent.
The technical problem to be solved by the invention is realized by adopting the following technical scheme: an SRIO and gigabit network interconnection device based on FPGA comprises: an FPGA chip, an SRIO interface, a gigabit network interface RJ45 and an SFP interface (Small Form-factor plug);
the FPGA chip is connected to a gigabit network interface RJ45 through a 3-path PHY chip and connected to an SFP interface through a 4-path optical interface, and is used for interacting network data with other systems;
the FPGA is also connected to the 1-path SRIO interface so as to meet the SRIO data interaction with an external system;
the FPGA mounting DDR3 chip is used as a data buffer for storage, and a BPI Flash chip is externally hung and used for storing information related to the serial number of the board card;
the FPGA completes data receiving and sending of the SRIO and the Ethernet, completes storage and caching of data through the externally mounted DDR3, and completes format conversion of the Ethernet and the SRIO communication protocol through the protocol conversion module.
Further, the FPGA chip is Virtex-7FPGA chip of Xilinx company, and the specific model is XC7VX 690T.
Has the advantages that:
compared with the prior art, the device has the advantages that protocol conversion between gigabit Ethernet data and SRIO data can be realized in a hardware programmable mode, the parallel characteristic of a special conversion chip is realized, the logic programmable characteristic is realized, and the advantages in real-time performance and expansibility are realized.
Drawings
FIG. 1 is a block diagram of the apparatus of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by a person skilled in the art based on the embodiments of the present invention belong to the protection scope of the present invention without creative efforts.
The invention relates to an FPGA-based SRIO and gigabit network interconnection device, which is suitable for Virtex-7FPGA chips of Xilinx company, and the specific model of the device is XC7VX 690T.
The invention relates to an SRIO and gigabit network interconnection device based on an FPGA, and a structural block diagram is shown in FIG. 1. The method specifically comprises the following steps: an FPGA chip, an SRIO interface, a gigabit network interface RJ45 and an SFP interface (Small Form-factor plug);
the FPGA chip is connected to a gigabit network interface RJ45 through a 3-path PHY chip and connected to an SFP interface through a 4-path optical interface, and is used for interacting network data with other systems;
the FPGA is also connected to the 1-path SRIO interface so as to meet the SRIO data interaction with an external system;
the FPGA mounting DDR3 chip is used as a data buffer for storage, and a BPI Flash chip is externally hung and used for storing information related to the serial number of the board card;
the FPGA completes data receiving and sending of the SRIO and the Ethernet, completes storage and caching of data through the externally mounted DDR3, and completes format conversion of the Ethernet and the SRIO communication protocol through the protocol conversion module.
Further, the FPGA chip is Virtex-7FPGA chip of Xilinx company, and the specific model is XC7VX 690T.
In summary, the present invention discloses an FPGA-based SRIO and gigabit internet interconnection apparatus, which can implement protocol conversion between gigabit ethernet data and SRIO data in a hardware programmable manner, and has advantages in real-time performance and scalability.
Those skilled in the art will appreciate that the invention may be practiced without these specific details.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (2)
1. The utility model provides a SRIO and gigabit net interconnection device based on FPGA which characterized in that includes: the system comprises an FPGA chip, an SRIO interface, a gigabit network interface RJ45 and an SFP interface;
the FPGA chip is connected to a gigabit network interface RJ45 through a 3-path PHY chip and connected to an SFP interface through a 4-path optical interface, and is used for interacting network data with other systems;
the FPGA is also connected to the 1-path SRIO interface so as to meet the SRIO data interaction with an external system;
the FPGA mounting DDR3 chip is used as a data buffer for storage, and a BPI Flash chip is externally hung and used for storing information related to the serial number of the board card;
the FPGA completes data receiving and sending of the SRIO and the Ethernet, completes storage and caching of data through the externally mounted DDR3, and completes format conversion of the Ethernet and the SRIO communication protocol through the protocol conversion module.
2. The FPGA-based SRIO and gigabit network interconnection apparatus according to claim 1, wherein the FPGA chip is a Virtex-7FPGA chip of Xilinx corporation, and the specific model is XC7VX 690T.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011607321.XA CN112600857A (en) | 2020-12-29 | 2020-12-29 | SRIO and gigabit network interconnection device based on FPGA |
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| CN202011607321.XA CN112600857A (en) | 2020-12-29 | 2020-12-29 | SRIO and gigabit network interconnection device based on FPGA |
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| CN202011607321.XA Pending CN112600857A (en) | 2020-12-29 | 2020-12-29 | SRIO and gigabit network interconnection device based on FPGA |
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Application publication date: 20210402 |
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