CN109510973A - A kind of 10,000,000,000 fiber optic Ethernets based on FPGA turn RapidIO multiway images transmission process system - Google Patents
A kind of 10,000,000,000 fiber optic Ethernets based on FPGA turn RapidIO multiway images transmission process system Download PDFInfo
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- CN109510973A CN109510973A CN201811621650.2A CN201811621650A CN109510973A CN 109510973 A CN109510973 A CN 109510973A CN 201811621650 A CN201811621650 A CN 201811621650A CN 109510973 A CN109510973 A CN 109510973A
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- rapidio
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- fpga
- image data
- fiber optic
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/22—Adaptations for optical transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division
- H04N7/0806—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division the signals being two or more video signals
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- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Small-Scale Networks (AREA)
Abstract
The invention belongs to data conversion fields, more particularly to a kind of multiway images transmission process system for turning RapidIO based on 10,000,000,000 fiber optic Ethernet of FPGA, including network interface, FPGA and RapidIO Switching Module, wherein FPGA includes network receiving module, data processing module, RapidIO sending module and RapidIO flow-control module；The present invention is based on 10,000,000,000 fiber optic Ethernets of FPGA to turn RapidIO multiway images transmission process system, the remote transmission for carrying out large capacity multiway images is netted using optical fiber 10,000,000,000, the high-speed transitions that FPGA carries out network protocol and RapidIO agreement are accessed by 10,000,000,000 optical modules, image data is forwarded to by each node by RapidIO bus again, realize that the data conversion of RapidIO high-speed serial bus inside 10,000,000,000 fiber optic Ethernet of multichannel large capacity image data and embedded system is transmitted, make remote image data high speed, it is convenient, reliably it is sent to image procossing board in system.
Description
Technical field
The invention belongs to data conversion fields, and in particular to a kind of 10,000,000,000 fiber optic Ethernets based on FPGA turn RapidIO
Multiway images transmission process system.
Background technique
With the extensive use of high-definition camera, the fields such as security protection, military affairs, monitoring to big bandwidth, low delay, it is low at
Originally, highly reliable, high performance image transmission processing system is put forward higher requirements.RapidIO is a kind of high-performance, low pin
Number, the interconnection architecture based on packet-switching, are a kind of open system interconnection technical standards.RapidIO is mainly used in embedding
Embedded system intraconnection supports chip to chip, plate to the communication between plate, but RapidIO is case internal bus, is unable to complete remote
Distance Transmission.
Summary of the invention
The technical problem to be solved by the present invention is RapidIO is case internal bus, it is unable to complete remote transmission.
In order to solve the above technical problems, the present invention provides and a kind of turns the more of RapidIO based on 10,000,000,000 fiber optic Ethernet of FPGA
Road image transmission processing system, including network interface, FPGA and RapidIO Switching Module, wherein FPGA includes that network receives mould
Block, data processing module, RapidIO sending module and RapidIO flow-control module；
Network interface includes 10,000,000,000 optical modules, and 10,000,000,000 optical modules by the image data that 10,000,000,000 net transmission are come in for that will be turned
It changes the image data of electrical signal types into, and image data is transferred to by FPGA by network；
Network receiving module will be unpacked for being unpacked according to Ethernet protocol to the image data for being transferred to FPGA
Image data afterwards is sent to data processing module；
The image data that data processing module is used to send network receiving module according to different ethernet ip address into
Row subregion caching process, and RapidIO sending module is sent to after being repacked according to RapidIO agreement；
Image data after RapidIO sending module is used to repack what is received is sent to RapidIO flow control
Module；
RapidIO flow-control module is used for judging whether the image processing module of subsequent reception system is busy, if
Image processing module is busy, then postpones to send image data or do not send image data；If image processing module is not busy,
Image data is directly sent to image processing module by RapidIO Switching Module；
The RapidIO Switching Module is according to RapidIO bus ID to image processing module distribution of images data.
It further, further include multichannel 4X SRIO, for increasing the bandwidth of RapidIO.
Further, RapidIO Switching Module uses CPS1848 exchange chip.
Further, 10,000,000,000 optical modules of the network interface are using 10,000,000,000 optical module of 10G SFP+.
The present invention is based on 10,000,000,000 fiber optic Ethernets of FPGA to turn RapidIO multiway images transmission process system, utilizes optical fiber
10000000000 net carry out large capacity multiway images remote transmission, by 10,000,000,000 optical modules access FPGA carry out network protocol with
The high-speed transitions of RapidIO agreement, then image data is forwarded to by each node by RapidIO bus, realize multichannel great Rong
The data conversion for measuring RapidIO high-speed serial bus inside 10,000,000,000 fiber optic Ethernet of image data and embedded system is transmitted, and is made
Remote image data high speed, it is convenient, be reliably sent to image procossing board in system.
Detailed description of the invention
Fig. 1 multiway images transmission process system block diagram of the present invention；
Fig. 2 data processing module flow chart of the present invention
Specific embodiment
To keep the purpose of the present invention, content and advantage clearer, with reference to the accompanying drawing to specific embodiment party of the invention
Formula is described in further detail.
Embodiment 1
A kind of multiway images transmission process system being turned RapidIO based on 10,000,000,000 fiber optic Ethernet of FPGA, including network are connect
Mouth, FPGA and RapidIO Switching Module, wherein FPGA includes network receiving module, data processing module, RapidIO transmission mould
Block and RapidIO flow-control module；
Network interface includes 10,000,000,000 optical module of 10G SFP+, figure of 10,000,000,000 optical modules for will be come in by 10,000,000,000 net transmission
As data conversion is at the image data of electrical signal types, and image data is transferred to by FPGA by network；
Network receiving module will be unpacked for being unpacked according to Ethernet protocol to the image data for being transferred to FPGA
Image data afterwards is sent to data processing module；
The image data that data processing module is used to send network receiving module according to different ethernet ip address into
Row subregion caching process, and RapidIO sending module is sent to after being repacked according to RapidIO agreement；
As shown in Fig. 2, carrying out subregion caching according to different ethernet ip address after data processing module receives data
Processing, and according to predefined ethernet ip address and RapidIO bus ID address mapping relation again according to RapidIO
Message messaging protocol is packaged.Since Ethernet packet length and RapidIO Message packet length mismatch, Wu Fazhi
Row data conversion is tapped into, so needing data carrying out recombination of unpacking according to RapidIO Message packet protocol, unpack the side of recombination
Formula is as shown in the table.
The maximum valid data length of Ethernet data bag is 1500 bytes, and the maximum of RapidIO Message packet is effectively
Data length is 256 bytes, and table 1 is by taking 1500 byte Ethernet datas as an example, by Ethernet data according to RapidIO Message
It wraps maximum valid data length to unpack, by 256 byte-aligneds, wherein valid data are 220 bytes to last packet.RapidIO
Message packet supports more packet protocols, and maximum can support more packets of 16 packets to transmit.In order to guarantee the complete of image data frame,
Data processing module can send doorbell message progress frame synchronization, notice after detecting frame end information to image processing module
One frame image data end of transmission of image processing module avoids generating data entanglement.
Image data after RapidIO sending module is used to repack what is received is sent to RapidIO flow control
Module；RapidIO sending module uses two-way baud rate to carry out data transmission for the channel 4X SRIO of 5Gbps, sending module root
Decide whether to send RapidIO data to Switching Module according to the bus message that RapidIO flow-control module returns；The 4X
SRIO is used to increase the bandwidth of RapidIO.
RapidIO flow-control module obtains recipient's information by maintenance packet and acknowledgement frame, judges subsequent reception system
Whether the image processing module of system is busy, if image processing module is busy, postpones to send image data or does not send image
Data；If image processing module is not busy, picture number is directly sent to image processing module by RapidIO Switching Module
According to；
The RapidIO Switching Module uses CPS1848 exchange chip, according to RapidIO bus ID to image procossing mould
Block distribution of images data (carry out data distribution according to the purpose ID in RapidIO packet), are sent to by different links multiple
Image processing module.
Above-mentioned 10,000,000,000 fiber optic Ethernets based on FPGA turn RapidIO multiway images transmission process system and have been applied to integrate
In information processing computer, the high speed data transfer that the communication of 4 road image, 10,000,000,000 fiber optic Ethernet turns RapidIO is realized.FPGA
Ten thousand mbit ethernets and RapidIO interface function are realized inside processor by way of IP kernel, realize the height between both agreements
Speed conversion；Two-way 5Gbps4X SRIO is the bandwidth match for realizing ten thousand mbit ethernets and RapidIO, passes through the solution to two kinds of agreements
Analysis is realized between destination address controls between data stream and agreement agreement.
Above-mentioned specific embodiment is only specific case of the invention, and scope of patent protection of the invention includes but is not limited to
Above-mentioned specific embodiment, any person of an ordinary skill in the technical field that meet claims of the present invention and any
The appropriate change or replacement done to it, all shall fall within the protection scope of the present invention.
Claims (4)
1. a kind of multiway images transmission process system for turning RapidIO based on 10,000,000,000 fiber optic Ethernet of FPGA, which is characterized in that packet
Include network interface, FPGA and RapidIO Switching Module, wherein FPGA include network receiving module, data processing module,
RapidIO sending module and RapidIO flow-control module；
Network interface includes 10,000,000,000 optical modules, and 10,000,000,000 optical modules are used to for the image data come in by 10,000,000,000 net transmission being converted into
The image data of electrical signal types, and image data is transferred to by FPGA by network；
Network receiving module is used to unpack the image data for being transferred to FPGA according to Ethernet protocol, and will be after unpacking
Image data is sent to data processing module；
Data processing module according to the image data that different ethernet ip address sends network receiving module for dividing
Region caching process, and RapidIO sending module is sent to after being repacked according to RapidIO agreement；
Image data after RapidIO sending module is used to repack what is received is sent to RapidIO flow-control module；
RapidIO flow-control module is for judging whether the image processing module of subsequent reception system is busy, if image
Processing module is busy, then postpones to send image data or do not send image data；If image processing module is not busy, directly
Image data is sent to image processing module by RapidIO Switching Module；
The RapidIO Switching Module is according to RapidIO bus ID to image processing module distribution of images data.
2. turn the multiway images transmission process system of RapidIO based on 10,000,000,000 fiber optic Ethernet of FPGA according to claim 1,
It is characterized in that, further including multichannel 4X SRIO, for increasing the bandwidth of RapidIO.
3. turn the multiway images transmission process system of RapidIO based on 10,000,000,000 fiber optic Ethernet of FPGA according to claim 2,
It is characterized in that, RapidIO Switching Module uses CPS1848 exchange chip.
4. turn the multiway images transmission process system of RapidIO based on 10,000,000,000 fiber optic Ethernet of FPGA according to claim 1,
It is characterized in that, 10,000,000,000 optical modules of the network interface are using 10,000,000,000 optical module of 10G SFP+.
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| CN201811621650.2A CN109510973A (en) | 2018-12-28 | 2018-12-28 | A kind of 10,000,000,000 fiber optic Ethernets based on FPGA turn RapidIO multiway images transmission process system |
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| CN201811621650.2A CN109510973A (en) | 2018-12-28 | 2018-12-28 | A kind of 10,000,000,000 fiber optic Ethernets based on FPGA turn RapidIO multiway images transmission process system |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110009552A (en) * | 2019-04-11 | 2019-07-12 | 湖南必然信息技术有限公司 | A kind of high bandwidth performance processing method of image big data |
| CN110798479A (en) * | 2019-11-07 | 2020-02-14 | 首都师范大学 | Interoperation device and method for dynamically reconfigurable high-speed serial bus and Ethernet |
| CN111404652A (en) * | 2020-03-13 | 2020-07-10 | 上海航天控制技术研究所 | Multi-channel data acquisition and real-time hybrid transmission platform based on FPGA |
| CN111510633A (en) * | 2020-04-30 | 2020-08-07 | 中国科学院长春光学精密机械与物理研究所 | Serial bus communication system and communication method |
| CN112083958A (en) * | 2020-08-14 | 2020-12-15 | 陕西千山航空电子有限责任公司 | RapidIO-based flight parameter data storage structure and storage method |
| CN112600857A (en) * | 2020-12-29 | 2021-04-02 | 北京神州飞航科技有限责任公司 | SRIO and gigabit network interconnection device based on FPGA |
| CN114510448A (en) * | 2022-02-17 | 2022-05-17 | 安徽国芯智能装备有限公司 | Ultra-high speed data transmission system and method based on high-speed optical fiber Ethernet |
| CN114726927A (en) * | 2021-11-30 | 2022-07-08 | 武汉卓目科技有限公司 | Conversion system and method for Coaxpress high-speed image interface and optical fiber transmission interface |
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| CN203590259U (en) * | 2013-11-22 | 2014-05-07 | 中国电子科技集团公司第三十二研究所 | 10-gigabit Ethernet and Rapid IO network switch controller |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110009552A (en) * | 2019-04-11 | 2019-07-12 | 湖南必然信息技术有限公司 | A kind of high bandwidth performance processing method of image big data |
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| CN110798479A (en) * | 2019-11-07 | 2020-02-14 | 首都师范大学 | Interoperation device and method for dynamically reconfigurable high-speed serial bus and Ethernet |
| CN110798479B (en) * | 2019-11-07 | 2021-08-06 | 首都师范大学 | Interoperation device and method for dynamically reconfigurable high-speed serial bus and Ethernet |
| CN111404652A (en) * | 2020-03-13 | 2020-07-10 | 上海航天控制技术研究所 | Multi-channel data acquisition and real-time hybrid transmission platform based on FPGA |
| CN111404652B (en) * | 2020-03-13 | 2022-11-11 | 上海航天控制技术研究所 | Multi-channel data acquisition and real-time hybrid transmission platform based on FPGA |
| CN111510633A (en) * | 2020-04-30 | 2020-08-07 | 中国科学院长春光学精密机械与物理研究所 | Serial bus communication system and communication method |
| CN112083958A (en) * | 2020-08-14 | 2020-12-15 | 陕西千山航空电子有限责任公司 | RapidIO-based flight parameter data storage structure and storage method |
| CN112083958B (en) * | 2020-08-14 | 2023-01-17 | 陕西千山航空电子有限责任公司 | RapidIO-based flight parameter data storage structure and storage method |
| CN112600857A (en) * | 2020-12-29 | 2021-04-02 | 北京神州飞航科技有限责任公司 | SRIO and gigabit network interconnection device based on FPGA |
| CN114726927A (en) * | 2021-11-30 | 2022-07-08 | 武汉卓目科技有限公司 | Conversion system and method for Coaxpress high-speed image interface and optical fiber transmission interface |
| CN114510448A (en) * | 2022-02-17 | 2022-05-17 | 安徽国芯智能装备有限公司 | Ultra-high speed data transmission system and method based on high-speed optical fiber Ethernet |
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