CN112599062B - Display panel - Google Patents
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- CN112599062B CN112599062B CN202110012247.5A CN202110012247A CN112599062B CN 112599062 B CN112599062 B CN 112599062B CN 202110012247 A CN202110012247 A CN 202110012247A CN 112599062 B CN112599062 B CN 112599062B
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- test terminal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- Engineering & Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract
The invention provides a display panel, a non-display area in the display panel is defined with a test terminal area, a test terminal of the test terminal area transmits a test signal into the display area through a driving circuit, wherein the test terminal area at least comprises a first test terminal group and a second test terminal group, the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group, so that test terminal groups with different specifications are formed, the test terminal groups are adapted to test tools of different manufacturing factories, the different manufacturing factories do not need to prepare different tools to match with test terminals with corresponding specifications, the corresponding photomask manufacturing process is reduced, and the manufacturing cost of the display panel is reduced.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel.
Background
The Array substrate row driving (GOA) circuit is a technology for manufacturing a Gate line (Gate) row scanning driving signal circuit on an Array substrate by utilizing the existing thin film transistor display device (TFT-LCD or TFT-OLED) Array (Array) manufacturing process so as to realize a line-by-line scanning driving mode of the Gate line, replaces the traditional Gate-IC for driving, and saves the production cost. Due to the advantages of low cost, low power consumption, narrow frame and the like of the GOA technology, more and more panel manufacturers adopt the GOA technology, and the competitiveness of products is improved.
The GOA circuit is conventionally arranged in a frame area of the liquid crystal display panel, a common signal line is used for inputting related electric signals, a plurality of working procedures exist in the liquid crystal display panel, the electric signals of the common signal line are required to be detected after each working procedure is finished, a plurality of factories are required to detect the common signal line respectively, the related common signal line is repeatedly detected, and in different positions, different factories formulate corresponding jigs to match corresponding detection terminals according to different requirements, or the corresponding detection terminal intervals are matched with corresponding jig requirements, and after the testing is finished, the connection between the test line and the signal line is cut off by utilizing laser, so that the steps are not beneficial to reducing cost.
In summary, a new display panel is needed to be designed to solve the above technical problems, in which when different processes and different signals of the display panel are detected, different tools are needed to be prepared to match corresponding detection terminals, after the test is completed, the connection between the test line and the signal line is cut off by using laser, and a laser cutting process is added, so that the productivity and yield of the display panel are not facilitated, and the preparation cost of the liquid crystal panel is increased.
Disclosure of Invention
The embodiment of the invention provides a display panel, which can solve the technical problems that when different procedures and different signals of the display panel are detected in the prior art, different jigs are needed to be prepared to match corresponding detection terminals, after the test is finished, the connection between a test line and a signal line is cut off by utilizing laser, and a laser cutting process is added, so that the productivity and the yield of the display panel are not facilitated, and the preparation cost of a liquid crystal panel is increased.
In order to solve the problems, the technical scheme provided by the invention is as follows:
the embodiment of the invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, and a test terminal of the test terminal area leads a test signal into the display area through a drive circuit.
The test terminal area at least comprises a first test terminal group and a second test terminal group, and the size of the test terminals in the first test terminal group is different from that of the test terminals of the second test terminal group.
According to a preferred embodiment of the present invention, the number of the test terminals in the first test terminal group is the same as the number of the test terminals in the second test terminal group, and each of the test terminals in the first test terminal group is electrically connected to one of the test terminals in the second test terminal group.
According to a preferred embodiment of the present invention, the pitch of adjacent test terminals in the first test terminal group is the same as the pitch of adjacent test terminals in the second test terminal group.
According to a preferred embodiment of the present invention, the test terminals in the first test terminal group and the test terminals in the second test terminal group are electrically connected by transparent metal wires.
According to a preferred embodiment of the present invention, the metal trace includes a first sub-metal trace group and a second sub-metal trace group, and the test terminals in the first test terminal group and the test terminals in the second test terminal group are respectively matched with and electrically connected to the first sub-metal trace group and the second sub-metal trace group, and the first sub-metal trace group and the second sub-metal trace group both extend out of the display panel.
According to a preferred embodiment of the present invention, only one of the first and second sub-metal wire sets inputs a test signal source while the other metal wire set does not input the test signal source when the driving circuit is detected.
According to a preferred embodiment of the present invention, the test signal source is one or more of a clock signal, a start trigger signal, a low potential signal, a high potential signal, a gate receiving reset signal, and a liquid crystal alignment signal.
According to a preferred embodiment of the present invention, an electrical connection surface is disposed at one end of the test terminal attached to the input signal line of the driving circuit, the electrical connection surface array is provided with a plurality of electrical contact points, the electrical connection surface is rectangular or circular, and the electrical contact points are circular.
According to a preferred embodiment of the present invention, the non-display area includes a substrate, a first driving circuit on the substrate, a gate insulating layer on the first driving circuit, a polysilicon layer on the gate insulating layer, a second driving circuit on the polysilicon layer, a flat layer on the gate insulating layer and covering the polysilicon layer and the second driving circuit, and a metal trace on the flat layer, a first test terminal is disposed between the first driving circuit and the metal trace, and a second test terminal is disposed between the second driving circuit and the metal trace.
According to a preferred embodiment of the present invention, the driving circuit is a GOA circuit, and the GOA circuit includes an input unit, a GOA unit, and an output unit, where the input unit is electrically connected to the test terminal, and the output unit includes a plurality of scan lines arranged in parallel and extending to the display area.
The beneficial effects are that: the embodiment of the invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, test terminals of the test terminal area pass through a driving circuit to introduce test signals into the display area, the test terminal area at least comprises a first test terminal group and a second test terminal group, the sizes of the test terminals in the first test terminal group are different from those of the test terminals in the second test terminal group, so that the test terminal groups with different specifications are formed, the test terminal groups are adapted to test tools of different manufacturing factories, and the different manufacturing factories do not need to prepare different tools to match with the test terminals with corresponding specifications, so that corresponding photomask manufacturing procedures are reduced, and the manufacturing cost of the display panel is reduced.
Drawings
In order to more clearly illustrate the embodiments or the technical solutions in the prior art, the following description will briefly introduce the drawings that are needed in the embodiments or the description of the prior art, it is obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the invention.
Fig. 2 is a schematic diagram showing a connection between a detection terminal and a driving circuit in a display panel according to an embodiment of the invention.
Fig. 3 is a schematic diagram of an arrangement of detection terminals in a display panel according to an embodiment of the invention.
Fig. 4 is a schematic diagram of a film structure of a non-display area portion of a display panel according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.
The invention aims at the technical problems that when different working procedures and different signals of the display panel are detected in the prior art, different jigs are needed to be prepared to be matched with corresponding detection terminals, after the test is finished, the connection between a test line and a signal line is cut off by utilizing laser, and a laser cutting process is added, thereby being unfavorable for the productivity and the yield of the display panel and improving the preparation cost of the liquid crystal panel.
The invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, and a test terminal of the test terminal area leads a test signal into the display area through a drive circuit; the test terminal area at least comprises a first test terminal group and a second test terminal group, the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group, and the test jig in different factories and different procedures can be met without preparing different jigs to match corresponding test terminals.
The number of the test terminals in the first test terminal group is the same as that of the test terminals in the second test terminal group, and the test terminals are correspondingly and electrically connected, and the spacing between the adjacent test terminals in the first test terminal group is the same as that between the adjacent test terminals in the second test terminal group; the test terminals in the first test terminal group are electrically connected with the test terminals in the second test terminal group through transparent metal wires to form a Z-shaped or L-shaped structure, and the Z-shaped or L-shaped structure can be bent and stretched to improve the flexibility of the test terminal group.
The metal wire comprises a first sub-metal wire group and a second sub-metal wire group, and a test terminal in the first test terminal group and a test terminal in the second test terminal group are respectively matched with and electrically connected with the first sub-metal wire group and the second sub-metal wire group, and the first sub-metal wire group and the second sub-metal wire group extend out of the display panel. When the driving circuit is detected, only one metal wire set in the first sub-metal wire set and the second sub-metal wire set inputs the test signal source, and the other metal wire set does not input the test signal source. The test signal source is one or more of clock signal, initial trigger signal, low potential signal, high potential signal, grid electrode receiving reset signal and liquid crystal alignment signal. The external test signal source can be directly input to the driving circuit through the metal wiring group, so that the purpose of testing is achieved, the connection of the test line and the signal line is not required to be cut off by using laser, the corresponding photomask manufacturing process is reduced, the method is simple and easy to realize, the productivity and the yield of the display panel are improved, and the manufacturing cost of the liquid crystal panel is reduced.
Specifically, as shown in fig. 1 and 2, the driving circuit in the display panel 100 in this embodiment adopts a double-sided interlaced GOA circuit to drive the pixel units in the display area 1011 in the display panel 100 to display. The periphery of the display area 1011 is also provided with a non-display area 1012, a non-display area 1013 and a non-display area 1014, the GOA circuit comprises a plurality of cascaded GOA units, when the first-stage GOA unit receives the start-stop signal, the first-stage GOA unit outputs a first row scanning signal, the first row scanning signal is used as a cascade signal of the second-stage unit through a signal line, the second row scanning signal output by the second-stage unit is used as a pull-up signal, the pull-up signal is transmitted to the first-stage GOA unit through the signal line and is used for correcting the waveform of the first row scanning signal, and the cascade signal transmission mode of other GOA units is the same as the above, so that the GOA unit outputs the scanning signal of the whole display panel. In order to improve the display speed and quality of the display screen, the size of the frame is compressed, the GOA driving units are driven simultaneously at two sides, one GOA driving unit only comprises an odd-numbered stage GOA driving unit and is used for scanning odd-numbered line pixels in the display panel, and the other GOA driving unit only comprises an even-numbered stage GOA driving unit and is used for scanning even-numbered line pixels in the display panel.
The GOA circuit in this embodiment includes a left GOA circuit 103 and a right GOA circuit 104, the detection terminals include a left detection terminal 105 and a right detection terminal 106, the left GOA circuit 103 includes an input unit 1033, a GOA unit 1031 and an output scan line 1032, the input unit 1033 preferably shares a signal line busline, the input unit 1033 is electrically connected with the left detection terminal 105, the right GOA circuit 104 includes an input unit 1043, a GOA unit 1041 and an output scan line 1042, the input unit 1043 preferably shares a signal line busline, and the input unit 1043 is electrically connected with the right detection terminal 106. In addition, a common electrode 1081 is further disposed directly above the scan line 1032, a common electrode 1082 is further disposed directly above the scan line 1042, the non-display region 1014 is provided with a control board 107, the control board 107 includes a main control board 1071, a sub-control board 1072 and a sub-control board 1073, the control board 107 is used for providing a signal source for an input unit in the GOA circuit, and the circuit of the GOA unit is not specifically described herein because of the variety of circuit diagrams of the GOA unit.
As shown in fig. 2, an embodiment of the present invention provides an electrical connection schematic diagram between a test terminal and a driving circuit, where the input unit 1033 includes a common signal line 10331, a common signal line 10332, a common signal line 10333 and a common signal line 10334, the test terminal 105 includes a test terminal 1051, a test terminal 1052, a test terminal 1053 and a test terminal 1054, the test terminal 1051, the test terminal 1052, the test terminal 1053 and the test terminal 1054 are respectively electrically connected with the common signal line 10331, the common signal line 10332, the common signal line 10333 and the common signal line 10334, one end of any test terminal attached to the common signal line is provided with an electrical connection surface, the electrical connection surface is provided with a plurality of electrical contact points, the electrical connection surface is rectangular or circular, and the electrical contact points are circular. In this embodiment, the electrical contact points are symmetrically disposed on the electrical connection surfaces, the number of the electrical connection surfaces is 2, and the number of the electrical contact points on each electrical connection surface is 4.
Fig. 3 is a schematic diagram of a test terminal structure according to an embodiment of the present invention, in fig. 2, a test terminal 1051, a test terminal 1052, a test terminal 1053, and a test terminal 1054 are sequentially disposed from bottom to top, and in fig. 2, a common signal line 10331, a common signal line 10332, a common signal line 10333, and a common signal line 10334 are sequentially disposed from left to right. As shown in fig. 3, other test terminals and corresponding common signal lines are further provided, the test terminal 1051 includes a first test terminal set 10511, a second test terminal set 10512, and a transparent metal line 10513 located between the first test terminal set 10511 and the second test terminal set 10512, the test terminal 10514 of the first test terminal set 10511 is electrically connected with the common signal line 10331, the first test terminal set 10511 and the second test terminal set 10512 are both input with test signal sources with the same function, in this embodiment, the test terminal 1051 inputs a clock signal, and the size of the test terminal of the first test terminal set 10511 is different from the size of the test terminal of the second test terminal set 10512. The other test terminals are similar to the test terminal 1051 in structure, and will not be described here, but different test terminals are input with different test signal sources, the test terminal 1052 is input with a high potential signal, the test terminal 1053 is input with a low potential signal, the test terminal 1053 is input with a start trigger signal, the test terminal 1054 is input with a gate receiving a reset signal, and other test terminals can also input with a liquid crystal alignment signal.
As shown in fig. 4, an embodiment of the present invention provides a schematic view of a film structure of a non-display area portion of a display panel, wherein the non-display area portion includes a substrate 201, a first driving circuit 202 disposed on the substrate 201, a gate insulating layer 203 disposed on the first driving circuit 202, a polysilicon layer 204 disposed on the gate insulating layer 203, a second driving circuit 205 disposed on the polysilicon layer 204, a flat layer 206 disposed on the gate insulating layer 203 and covering the polysilicon layer 204 and the second driving circuit 205, and a metal trace 207 disposed on the flat layer 206, the first driving circuit 202 is electrically connected with the metal trace 207 through a first test terminal 2061, the second driving circuit 205 is electrically connected with the metal trace 207 through a second test terminal 2062, the first test terminal 2061 is disposed in a via hole in the gate insulating layer 203 and the flat layer 206, and the second test terminal 2062 is disposed in the via hole in the flat layer 206. The metal wire 207 extends to the outside of the display panel, so as to be convenient for accessing the test signal source. In this embodiment, the first test terminal 2061 and the second test terminal 2062 are electrically connected to the same metal wire 207, and in most cases, different signal sources are input, and the first test terminal 2061 and the second test terminal 2062 are electrically connected to different metal wires (not shown).
The embodiment of the invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, test terminals of the test terminal area pass through a drive circuit to enable test signals to enter the display area, the test terminals at least comprise a first test terminal group and a second test terminal group, the sizes of the test terminals in the first test terminal group are different from those of the test terminals in the second test terminal group, different jigs can be matched, the test terminals in the first test terminal group and the test terminals in the second test terminal group are respectively matched with and electrically connected with a first sub-metal wiring group and a second sub-metal wiring group, the first sub-metal wiring group and the second sub-metal wiring group extend out of the display panel, external test signals can be directly input to the drive circuit through metal wiring, the purpose of testing is achieved, the corresponding test terminals are not required to be matched by different jigs, and the connection of the test lines and the signal wires is cut off by utilizing lasers, the corresponding photomask is reduced, the method is easy to be simple, the manufacturing cost of the liquid crystal display panel is improved, and the manufacturing yield of the liquid crystal panel is reduced.
In summary, although the present invention has been described in terms of the preferred embodiments, the above-mentioned embodiments are not intended to limit the invention, and those skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention, so that the scope of the invention is defined by the appended claims.
Claims (9)
1. The display panel is characterized by comprising a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, and a test terminal of the test terminal area passes a test signal into the display area through a drive circuit;
the test terminal area at least comprises a first test terminal group and a second test terminal group, the size of the test terminal in the first test terminal group is different from that of the test terminal of the second test terminal group, the test terminal in each first test terminal group is correspondingly and electrically connected with one test terminal in the second test terminal group through a metal wire, and the metal wire is in a Z-shaped or L-shaped structure;
the non-display area comprises a substrate, a first driving circuit arranged on the substrate, a gate insulating layer arranged on the first driving circuit, a polysilicon layer arranged on the gate insulating layer, a second driving circuit arranged on the polysilicon layer, a flat layer arranged on the gate insulating layer and covering the polysilicon layer and the second driving circuit, and a metal wiring arranged on the flat layer, wherein a first test terminal is arranged between the first driving circuit and the metal wiring, a second test terminal is arranged between the second driving circuit and the metal wiring, the first driving circuit is electrically connected with the metal wiring through the first test terminal, and the second driving circuit is electrically connected with the metal wiring through the second test terminal.
2. The display panel of claim 1, wherein the number of test terminals in the first test terminal group is the same as the number of test terminals of the second test terminal group.
3. The display panel of claim 2, wherein a pitch of adjacent test terminals in the first test terminal group is the same as a pitch of adjacent test terminals in the second test terminal group.
4. The display panel of claim 2, wherein the test terminals in the first test terminal set and the test terminals in the second test terminal set are electrically connected by transparent metal wires.
5. The display panel of claim 1, wherein the metal traces comprise a first sub-metal trace group and a second sub-metal trace group, the test terminals in the first test terminal group and the test terminals in the second test terminal group are respectively mated and electrically connected with the first sub-metal trace group and the second sub-metal trace group, and the first sub-metal trace group and the second sub-metal trace group each extend outside the display panel.
6. The display panel of claim 5, wherein only one of the first and second sub-metal trace sets inputs a test signal source while the other metal trace set does not input the test signal source when the driving circuit is detected.
7. The display panel of claim 6, wherein the test signal source is one or more of a clock signal, a start trigger signal, a low potential signal, a high potential signal, a gate receive reset signal, and a liquid crystal alignment signal.
8. The display panel according to claim 2, wherein an electrical connection surface is disposed at one end of the test terminal attached to the input signal line of the driving circuit, the array of electrical connection surfaces is provided with a plurality of electrical contact points, the electrical connection surface is rectangular or circular, and the electrical contact points are circular.
9. The display panel of claim 1, wherein the driving circuit is a GOA circuit, the GOA circuit comprises an input unit, a GOA unit and an output unit, the input unit is electrically connected with the test terminal, and the output unit comprises a plurality of scan lines which are arranged in parallel and extend to the display area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110012247.5A CN112599062B (en) | 2021-01-06 | 2021-01-06 | Display panel |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110012247.5A CN112599062B (en) | 2021-01-06 | 2021-01-06 | Display panel |
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| CN112599062A CN112599062A (en) | 2021-04-02 |
| CN112599062B true CN112599062B (en) | 2023-09-26 |
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| CN202110012247.5A Active CN112599062B (en) | 2021-01-06 | 2021-01-06 | Display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114078943B (en) * | 2021-11-05 | 2023-04-07 | 武汉华星光电半导体显示技术有限公司 | Display module and display device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20160084746A (en) * | 2015-01-06 | 2016-07-14 | 엘지디스플레이 주식회사 | Display panel and display device including the same |
| CN106292111A (en) * | 2016-10-20 | 2017-01-04 | 深圳市华星光电技术有限公司 | A kind of array base palte and display panels |
| CN107068027A (en) * | 2017-05-27 | 2017-08-18 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, liquid crystal display panel detecting system and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102535209B1 (en) * | 2016-07-04 | 2023-05-22 | 삼성디스플레이 주식회사 | Printed circuit board package and display device including the same |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20160084746A (en) * | 2015-01-06 | 2016-07-14 | 엘지디스플레이 주식회사 | Display panel and display device including the same |
| CN106292111A (en) * | 2016-10-20 | 2017-01-04 | 深圳市华星光电技术有限公司 | A kind of array base palte and display panels |
| CN107068027A (en) * | 2017-05-27 | 2017-08-18 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, liquid crystal display panel detecting system and method |
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