JPH09258249A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the chip size and mounting area from increasing due to the increase of the number of pads in intellecturization of a liquid crystal drive IC by arranging input pads for signal and the input pads for power source with the same pitch as a wiring pitch of wiring of an FPC(flerible printed circuit) for connecting between an external circuit and a liquid crystal panel. SOLUTION: Plural signal inputting pads 107 and power source inputting pads and setting input pads 113 are arranged in line to form a pads group. Plural output pads 104 form a pad lines group by arranging plural pad lines arranged in line in parallel to the pad line of the signal inputting pads 107 and the power source inputting pads and setting input pads 113. Then, the signal inputting pads 107 and the power source inputting pads are arranged at the same pitch as the wiring pitch 11 of the wiring of a flexible printed circuit for connecting between the external circuit and the liquid crystal panel 101.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pad arrangement of a semiconductor integrated circuit, and more particularly to a pad arrangement of a semiconductor integrated circuit for a liquid crystal which is directly mounted on a liquid crystal panel using a chip-on-glass mounting method.

[0002]

2. Description of the Related Art FIG. 3 is an overall view of a liquid crystal panel on which a semiconductor integrated circuit for liquid crystal display is mounted. A liquid crystal panel 303 shown in FIG. 3 is an example of a VGA liquid crystal panel used in a laptop personal computer, and a 640 × 480 dot pixel portion is vertically divided and displayed.

In the liquid crystal panel 303 shown in FIG. 3, four (three in the figure) semiconductor integrated circuits 301 and 302 for driving signal electrodes are mounted on the upper and lower sides, and a semiconductor integrated circuit 304 for scanning electrodes is on the right side. Two of them are mounted on the chip, and the mounting method is the chip-on-glass mounting method.

Liquid crystal display panels are currently used in various fields. For example, as a display device for a personal computer, a 640 × 480 display method called SVGA shown in FIG.
There is a display standard of 800 × 600 called A or higher. Also, as a display method for TV, NTSC,
There are broadcasting standards such as PAL and SECAM.

Liquid crystal panels of different standards may be designed and mounted with dedicated semiconductor integrated circuits for liquid crystal display, but generally, liquid crystal panels of different standards can be used. In many cases, semiconductor integrated circuits are designed.

Therefore, in such a semiconductor integrated circuit for liquid crystal display corresponding to various standards, it is necessary to provide a plurality of setting terminals for varying the internal operation according to the operation mode of each standard.

As a concrete example of switching the operation mode, in the case of a liquid crystal display panel of a personal computer in which four (3 in the figure) semiconductor integrated circuits for driving the signal electrodes shown in FIG. The signal electrode liquid crystal display panel and the 800 signal electrode liquid crystal display panel have setting terminals for switching the number of outputs between 160 outputs and 200 outputs in the same semiconductor integrated circuit for driving the signal electrodes. You will need it.

Further, in order to easily inspect the semiconductor integrated circuit, a setting terminal for testing is required.

As described above, in order to support various standards with the same semiconductor integrated circuit, more setting terminals are required.

These setting terminals are terminals for determining the operation mode of the IC, and as signals, HI or LO.
Is a DC signal of.

The semiconductor integrated circuit for driving the signal electrodes has a shift clock for transferring data, a latch signal for latching data, a data terminal for inputting display data, and the like, and these signal input terminals There are also high-speed signals that can be input.

In addition to the above, a plus side power source pad and a minus side power source pad for supplying to the logic circuit of the semiconductor integrated circuit and a plus side power source pad and a minus side power source pad for driving the liquid crystal are required.

Generally, the input / output pads of a semiconductor integrated circuit are arranged around a semiconductor integrated circuit chip. However, in the case of a semiconductor integrated circuit for liquid crystal display, which has a large number of output pads, the semiconductor integrated circuit is arranged. It is common to place output pads inside the circuit chip.

FIG. 2 is a mounting diagram of a semiconductor integrated circuit for liquid crystal display mounted on a conventional liquid crystal panel. The liquid crystal display semiconductor integrated circuit shown in FIG. 2 is an example of a signal electrode driving semiconductor integrated circuit. The plurality of input pads 203 of the semiconductor integrated circuit 202 shown in FIG. 2 are arranged in a row in the longitudinal direction of the semiconductor integrated circuit 202 to form a pad row, and the plurality of output pads 204 are arranged in the longitudinal direction of the semiconductor integrated circuit 202. A plurality of pad rows arranged in parallel with the pad row of 1 are arranged in parallel to form a pad row group.

The pad row of the input pad 203 and the pad row group of the output pad 204 are separated by a certain distance X209 so that the input ITO wiring and the output ITO wiring do not contact each other. The pad row group of the output pads 204 is arranged on the chip edge of the circuit, and is located on the pixel section side of the liquid crystal panel 303 shown in FIG.

Input pad 203 for clock signal and data signal, input pad 203 for power source for liquid crystal drive, input pad 203 for power source for logic drive, and input for determining operation mode of semiconductor integrated circuit for driving signal electrode Pad 2
03 is connected to the ITO wiring 208 via bumps,
The ITO wiring 208 is a flexible printed circuit 2 for connecting to an external circuit on the side opposite to the pixel portion.
06 (hereinafter referred to as FPC).

The wiring pitch of the FPC 206 for connecting to the external circuit on the side opposite to the pixel portion is generally about 600 μm, and the layout pitch of the input pad 203 is 15.
Since it is about 0 μm, the ITO wiring 206 for connecting the input pad 203 and the FPC 206 for connecting to the external circuit on the side opposite to the pixel portion is routed on the liquid crystal panel. Therefore, ITO is provided between the input pad 203 and the FPC 207. The wiring area Y210 is required.

IT for connecting the input pad 203 and the FPC 206 for connecting to an external circuit on the side opposite to the pixel portion.
Since the O wiring 206 is arranged and wired by bending and routing it on the liquid crystal panel, as a result, the wiring length of the ITO wiring 208 becomes long and the wiring resistance becomes high.

[0019]

However, there is a strong demand to increase the number of liquid crystal panels that can be taken from one glass substrate and to reduce the frame portion of the housing in which the liquid crystal panel is mounted. Therefore, the liquid crystal panel shown in FIG. An ITO wiring region 30 for connecting the semiconductor integrated circuit 301 of 303 and the wiring of the FPC for connecting to an external circuit on the side opposite to the pixel portion
7 needs to be reduced.

Further, as the number of display pixels increases, it is required to speed up the operation of the signal electrode driving IC, and the signal electrode driving IC is required.
The driving signal input to the circuit is further speeded up, and the IT for connecting the semiconductor integrated circuit 202 shown in FIG. 2 and the FPC wiring 206 for connecting to the external circuit on the side opposite to the pixel portion
Lower resistance of the O wiring 208 is required.

However, as the signal electrode driving IC becomes more intelligent, the number of input terminals increases as described above, and the ITO wiring region Y210 shown in FIG. 2 increases, and therefore the ITO wiring increases and the resistance value increases. Next, it is disadvantageous for speeding up the IC.

Further, if the resistances of the liquid crystal driving power source and the logic power source for the signal electrode driving IC are increased, the display unevenness on the screen, that is, the so-called crosstalk is increased.

An object of the present invention is to provide an input pad 20 for signals.
3, the input pad 203 for the liquid crystal driving power supply, the input pad 203 for the logic driving power supply, and the wiring pitch of the FPC wiring 206 for connecting to an external circuit are arranged so as to coincide with each other, and the input pads for other mode setting terminals are provided. 203 and the test input pad 203 are arranged between the signal input pad 203, the liquid crystal driving power source input pad 203, and the logic driving power source input pad 203 to reduce the ITO wiring region Y210, and In order to enable high-speed signal input to the semiconductor integrated circuit and reduce crosstalk on the display, the ITO connecting the wiring 206 of the FPC for connecting to an external circuit and the input pad 203 for signal is used.
An object of the present invention is to provide a semiconductor integrated circuit capable of reducing the wiring resistance of the wiring 206.

[0024]

A semiconductor integrated circuit according to the present invention has a configuration in which a signal input pad and a power input pad arrangement among a plurality of input pads arranged in a row are connected to an external circuit. In order to connect the FPC wiring for arranging at the same pitch as the wiring pitch of the FPC wiring for connecting the signal input pad of the liquid crystal driving IC and the input pad for the power supply to the external circuit and the liquid crystal panel. The input pad for the setting terminal and the input pad for the test which are connected to the ITO wiring on the liquid crystal panel of each and are set straight between each other and set the other operation modes are arranged between the signal input pad and the power input pad. However, the ITO wiring on the liquid crystal panel has a fixed distance X20 so that the input ITO wiring and the output ITO wiring shown in FIG. 2 do not contact each other.
It is characterized in that it is arranged on the outside of the chip by using 9 and is arranged on the outside of the FPC wiring used for the extraction signal wiring.

By arranging the input pad for signals and the input pad for power supply at the same pitch as the wiring pitch of the wiring of the FPC for connecting the external circuit and the liquid crystal panel, It is possible to shorten the ITO wiring that connects the layout, the input pad for power supply, and the wiring of the FPC for connecting the external circuit and the liquid crystal panel. Therefore, the liquid crystal panel can have a narrow frame and the ITO wiring can have a low resistance.
This contributes to the reduction of so-called crosstalk, which is display unevenness on the screen, by speeding up the C operation and reducing the resistance of the power supply wiring. Further, by disposing the pad for the setting terminal and the pad for the low speed signal between the high speed signal pad and the power supply pad, the chip size of the liquid crystal drive IC is not increased.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION In a semiconductor integrated circuit for driving a liquid crystal to be mounted on a liquid crystal panel by a chip-on-glass mounting method, an input pad for a drive signal and a power supply pad are arranged on one side of the chip of the semiconductor integrated circuit. Also, the arrangement pitch of the input pad for the drive signal and the power supply pad is the same as the wiring pitch of the flexible printed circuit for inputting the signal from the external circuit through the ITO wiring on the liquid crystal panel. Semiconductor integrated circuit.

[0027]

EXAMPLE FIG. 3 is an overall view of a liquid crystal panel on which a semiconductor integrated circuit for liquid crystal display is mounted. Liquid crystal panel 3 shown in FIG.
Reference numeral 03 is an example of a VGA liquid crystal panel used for a laptop personal computer, which displays a 640.times.480 dot pixel portion vertically divided.

In the liquid crystal panel 303 shown in FIG. 3, four semiconductor integrated circuits 301 and 302 for driving the signal electrodes are mounted on the upper and lower sides, and two semiconductor integrated circuits 304 for the scanning electrodes are mounted on the right side. The chip-on-glass mounting method is used as the mounting method.

FIG. 1 is a mounting diagram of a semiconductor integrated circuit for liquid crystal display mounted on a liquid crystal panel according to an embodiment of the present invention. The semiconductor integrated circuit for liquid crystal display shown in FIG. 1 is an example of a semiconductor integrated circuit for driving signal electrodes.

The plurality of signal input pads 107, power supply input pads 112, and setting input pads 113 of the semiconductor integrated circuit 102 shown in FIG. 1 are arranged in a row in the longitudinal direction of the semiconductor integrated circuit 102 to form a pad row. The plurality of output pads 104 are arranged in a row in the longitudinal direction of the semiconductor integrated circuit 102 in parallel with the pad rows of the signal input pad 107, the power input pad 112, and the setting input pad 113. A plurality of pads are arranged to form a pad row group.

Further, the signal input pad 107, the power input pad 112, the pad row of the input pad 113 for setting, and the pad row group of the output pad 104 are separated by a space 114 of a constant distance from each other in the semiconductor integrated circuit. The pad row group of the output pads 104 is arranged on the chip edge, and is located on the pixel portion side of the liquid crystal panel 303 shown in FIG.

Further, a positive power source input pad 115 for the logic circuit of the semiconductor integrated circuit, a negative power source input pad 118 for the logic circuit of the semiconductor integrated circuit, a liquid crystal driving positive side power source input pad 116 of the semiconductor integrated circuit, and the semiconductor integrated circuit. Negative power supply input pad 11 for LCD
7 and an input pad 107 for an input signal for a clock signal and a data signal, a wiring pitch Z11 of an FPC wiring 105 for connecting an external circuit and a liquid crystal panel, respectively.
They are arranged at the same pitch as 1 and are connected to the ITO wiring 106 via bumps.

The ITO wiring 106 is connected to the FPC wiring 105 for connecting an external circuit to the liquid crystal panel.

Further, the setting input pad 113 is arranged between the signal input pads 107, and is connected to the I through the bump.
A space 11 between the output pad 104 and the input pad 107 drawn out toward the output pad 104 by the TO wiring 108
4 is connected to the FPC wiring 105 for connecting the external circuit to the liquid crystal panel by wiring it to the outside with the ITO wiring.

Further, each output pad 104 is connected to the ITO wiring 105 via a bump and connected to a pixel electrode. Semiconductor integrated circuit 10 in the embodiment of the present invention
In No. 2, the wiring pitch Z111 of the FPC wiring 105 for connecting the external circuit and the liquid crystal panel is 600 μm, and the arrangement pitch of the signal input pad 107 and the power input pad 112 is also 600 μm.

The input pad 113 for setting is arranged between the signal input pads 107, and the pad arrangement pitch of the portion where the signal input pad 107 is arranged is half of 600 μm, which is 300 μm pitch. There is.

Liquid crystal panel 101 in the embodiment of the present invention
Shows that the width of the ITO wiring is 10 μm and the space is 10 μm.

Therefore, the space Y between the signal input pad 107, the power input pad 112, the pad row of the setting input pad 113, and the pad row group of the output pad 104.
114 is 50 μm.

The distance X110 from the chip edge of the semiconductor integrated circuit 102 to the edge of the liquid crystal panel is the ITO wiring 1
Since 05 is wired straight and connected to the FPC wiring 105 for connecting the external circuit and the liquid crystal panel, the space necessary for bonding the FPC wiring 105 and the liquid crystal panel 101 is as close as possible to 1.5 mm. Can be displaced.

Therefore, the ITO wiring 105 can be significantly shortened as compared with the conventional example, so that the resistance of the signal input wiring becomes small and the high speed input signal can be inputted.

Further, the ITO wiring of the power supply wiring can be made much shorter than that of the conventional example, so that the resistance of the power supply wiring can be reduced and the so-called crosstalk, which is display unevenness on the screen, can be reduced.

Even if the number of setting input pads 113 is increased, since they are arranged between the signal input pads 107, the size of the long side of the chip does not increase, and the IT
Even if the wiring length of the O wiring 108 becomes long, there is no problem because it is a DC signal.

The input pad 113 for setting is KH
It is self-evident that a signal as slow as z-order can be used.

[0044]

As is apparent from the above description, the arrangement of the signal input pads and the arrangement of the power input pads are the same as the wiring pitch of the FPC wiring for connecting the external circuit and the liquid crystal panel. By arranging with, the ITO wiring for connecting the arrangement of the input pad for the signal, the input pad for the power supply and the wiring of the FPC for connecting the external circuit and the liquid crystal panel is shortened, and the frame of the liquid crystal panel can be narrowed. It is possible. Further, since the resistance of the ITO wiring can be reduced, the operation speed of the liquid crystal driving IC can be increased, and the resistance of the power wiring can be reduced to contribute to the reduction of so-called crosstalk, which is display unevenness on the screen, and the setting terminal. By arranging the pad for power supply and the pad for low speed signal between the high speed signal pad and the power supply pad, it is possible to provide a semiconductor integrated circuit in which the chip area does not increase.

[Brief description of drawings]

FIG. 1 is a mounting view of a semiconductor integrated circuit for liquid crystal display mounted on a liquid crystal panel according to an embodiment of the present invention.

FIG. 2 is a mounting view of a semiconductor integrated circuit for liquid crystal display mounted on a liquid crystal panel of a conventional example.

FIG. 3 is an overall view of a liquid crystal panel on which a semiconductor integrated circuit for liquid crystal display is mounted.

[Explanation of symbols]

101 Liquid Crystal Panel 102 Semiconductor Integrated Circuit 103 ITO Wiring for Output Pad 104 Output Pad 105 FPC Wiring 106 ITO Wiring for Input Signal 107 Pad for Input Signal 108 ITO Wiring for Setting Terminal 110 Space for FPC Adhesion 111 FPC Wiring Wiring Pitch 113 Pad for setting terminal 114 Space between pad row of input pad and pad row of output pad 115 Positive power supply input pad for logic circuit 116 Positive power supply input pad for liquid crystal driving of semiconductor integrated circuit 117 Semiconductor integrated circuit 117 Negative side power input pad for driving liquid crystal 118 Negative power input pad for logic circuit of semiconductor integrated circuit

Claims (2)

[Claims] 1. A semiconductor integrated circuit for driving a liquid crystal to be mounted on a liquid crystal panel by a chip-on-glass mounting method, wherein an input pad for a drive signal and a power supply pad are arranged on one side of a chip of the semiconductor integrated circuit, and The semiconductor device characterized in that the layout pitch of the input pad for the drive signal and the power supply pad is the same as the wiring pitch of the flexible printed circuit for inputting the signal from the external circuit through the ITO wiring on the liquid crystal panel. Integrated circuit. 2. A semiconductor integrated circuit for driving a liquid crystal to be mounted on a liquid crystal panel by a chip-on-glass mounting method, wherein an input pad for a drive signal and a power supply pad are arranged on one side of a chip of the semiconductor integrated circuit, and The layout pitch of the drive signal input pad and the power supply pad is the same as the wiring pitch of the flexible printed circuit for inputting the signal from the external circuit through the ITO wiring on the liquid crystal panel, and the semiconductor for driving the liquid crystal. A semiconductor integrated circuit characterized in that a setting pad for setting an operation mode of the liquid crystal driving semiconductor integrated circuit and a pad for testing the liquid crystal driving semiconductor integrated circuit are arranged between input pads for driving signals of the integrated circuit. .