CN112599062A - Display panel - Google Patents
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- CN112599062A CN112599062A CN202110012247.5A CN202110012247A CN112599062A CN 112599062 A CN112599062 A CN 112599062A CN 202110012247 A CN202110012247 A CN 202110012247A CN 112599062 A CN112599062 A CN 112599062A
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- test terminal
- test
- group
- display panel
- signal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
The invention provides a display panel, a non-display area in the display panel is defined with a test terminal area, a test terminal of the test terminal area leads a test signal into the display area through a drive circuit, wherein the test terminal area at least comprises a first test terminal group and a second test terminal group, the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group, test terminal groups with different specifications are formed to be adapted to test tools of different process factories, different process factories do not need to prepare different tools to match with detection terminals with corresponding specifications, corresponding photomask manufacturing procedures are reduced, and the preparation cost of the display panel is reduced.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel.
Background
A GOA circuit of an Array substrate is a technology for manufacturing a grid line (Gate) line scanning driving signal circuit on the Array substrate by utilizing the existing manufacturing procedure of a thin film transistor display device (TFT-LCD or TFT-OLED) Array (Array) so as to realize the driving mode of scanning a grid line by line, replaces the traditional Gate-IC to drive, and saves the production cost. Because GOA technique itself has advantages such as low cost, low-power consumption, narrow frame, more and more panel manufacturers adopt GOA technique, promote the competitiveness of product.
The conventional setting of GOA circuit is in liquid crystal display panel's frame district, the relevant signal of telecommunication of common signal line input to this GOA circuit, because liquid crystal display panel has a plurality of processes, all need detect the signal of telecommunication of common signal line after every process is accomplished, need a plurality of mills to detect respectively, repeated relevant common signal line detects, and in the position of difference, different mills formulate corresponding tool according to the requirement of difference and arrange corresponding detection terminal, perhaps corresponding detection terminal interval matches the tool demand that corresponds, after accomplishing the test, utilize laser will cut off the connection of test line and signal line, these steps are all unfavorable for reduce cost.
To sum up, a new display panel needs to be designed to solve the above technical problems, when different processes and different signals of the display panel are detected, different jigs need to be prepared to match with corresponding detection terminals, after the test is completed, the connection between the test lines and the signal lines is cut off by using laser, a laser cutting process is added, the productivity and yield of the display panel are not facilitated, and the preparation cost of the liquid crystal panel is increased.
Disclosure of Invention
The embodiment of the invention provides a display panel, which can solve the technical problems that in the prior art, when different processes and different signals of the display panel are detected, different jigs are required to be prepared to match with corresponding detection terminals, after the test is finished, the connection between a test line and a signal line is cut off by laser, a laser cutting process is added, the productivity and the yield of the display panel are not facilitated, and the preparation cost of a liquid crystal panel is increased.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
the embodiment of the invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, and a test terminal of the test terminal area leads a test signal into the display area through a drive circuit.
The test terminal area at least comprises a first test terminal group and a second test terminal group, and the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group.
According to a preferred embodiment of the present invention, the number of the test terminals in the first test terminal group is the same as the number of the test terminals in the second test terminal group, and the test terminal in each of the first test terminal group is electrically connected to one of the test terminals in the second test terminal group.
According to a preferred embodiment of the present invention, a pitch of adjacent test terminals in the first test terminal group is the same as a pitch of adjacent test terminals in the second test terminal group.
According to a preferred embodiment of the present invention, the test terminals in the first test terminal group and the test terminals in the second test terminal group are electrically connected through transparent metal wires.
According to a preferred embodiment of the present invention, the metal trace includes a first sub-metal trace group and a second sub-metal trace group, the test terminal in the first test terminal group and the test terminal in the second test terminal group are respectively matched with and electrically connected to the first sub-metal trace group and the second sub-metal trace group, and both the first sub-metal trace group and the second sub-metal trace group extend to the outside of the display panel.
According to a preferred embodiment of the present invention, when the driving circuit is detected, only one metal routing group of the first metal routing group and the second metal routing group inputs a test signal source, and the other metal routing group does not input the test signal source.
According to a preferred embodiment of the present invention, the test signal source is one or more of a clock signal, an initial trigger signal, a low-potential signal, a high-potential signal, a gate receiving reset signal, and a liquid crystal alignment signal.
According to a preferred embodiment of the present invention, an electrical connection surface is disposed at one end of any of the test terminals, which is attached to the input signal line of the driving circuit, the electrical connection surface is provided with a plurality of electrical contacts in an array, the electrical connection surface is rectangular or circular, and the electrical contacts are circular.
According to a preferred embodiment of the present invention, the non-display region includes a substrate, a first driving circuit located on the substrate, a gate insulating layer located on the first driving circuit, a polysilicon layer located on the gate insulating layer, a second driving circuit located on the polysilicon layer, a planarization layer located on the gate insulating layer and covering the polysilicon layer and the second driving circuit, and a metal trace located on the planarization layer, wherein a first testing terminal is disposed between the first driving circuit and the metal trace, and a second testing terminal is disposed between the second driving circuit and the metal trace.
According to a preferred embodiment of the present invention, the driving circuit is a GOA circuit, the GOA circuit includes an input unit, a GOA unit, and an output unit, the input unit is electrically connected to the test terminal, and the output unit includes a plurality of scan lines arranged in parallel and extending to the display area.
Has the advantages that: the embodiment of the invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, and a test terminal of the test terminal area leads a test signal into the display area through a driving circuit, wherein the test terminal area at least comprises a first test terminal group and a second test terminal group, the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group, so that test terminal groups with different specifications are formed to adapt to test jigs of different process plants, and different process plants do not need to prepare different jigs to match with detection terminals with corresponding specifications, so that the corresponding photomask process is reduced, and the preparation cost of the display panel is reduced.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention.
Fig. 2 is a schematic diagram illustrating a connection between a detection terminal and a driving circuit in a display panel according to an embodiment of the invention.
Fig. 3 is a schematic diagram of an arrangement of detecting terminals in a display panel according to an embodiment of the invention.
Fig. 4 is a schematic view of a partial film structure of a non-display area of a display panel according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention aims at the technical problems that different jigs are required to be prepared to match with corresponding detection terminals when different processes and different signals of the display panel are detected in the prior art, after the test is finished, the connection between the test line and the signal line is cut off by utilizing laser, a laser cutting process is added, the productivity and the yield of the display panel are not facilitated, and the preparation cost of the liquid crystal panel is improved.
The invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, and a test terminal of the test terminal area leads a test signal into the display area through a drive circuit; the test terminal area at least comprises a first test terminal group and a second test terminal group, the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group, test jigs in different factories and different procedures can be met, and different jigs do not need to be prepared to match corresponding test terminals.
The number of the test terminals in the first test terminal group is the same as that of the test terminals in the second test terminal group, and the test terminals are correspondingly electrically connected, and the distance between the adjacent test terminals in the first test terminal group is the same as that between the adjacent test terminals in the second test terminal group; the test terminals in the first test terminal group and the test terminals in the second test terminal group are electrically connected through transparent metal wires to form a Z-shaped or L-shaped structure, and the Z-shaped or L-shaped structure can be bent and stretched to improve the flexibility of the test terminal group.
The metal wiring comprises a first sub-metal wiring group and a second sub-metal wiring group, a test terminal in the first test terminal group and a test terminal in the second test terminal group are respectively matched with and electrically connected with the first sub-metal wiring group and the second sub-metal wiring group, and the first sub-metal wiring group and the second sub-metal wiring group extend to the outside of the display panel. When the driving circuit is detected, only one metal wiring group in the first sub-metal wiring group and the second sub-metal wiring group inputs a test signal source, and the other metal wiring group does not input the test signal source. The test signal source is one or more of a clock signal, an initial trigger signal, a low potential signal, a high potential signal, a grid receiving reset signal and a liquid crystal alignment signal. An external test signal source can be input to the drive circuit directly through the metal wiring group to achieve the purpose of testing, connection between the test line and the signal line is not required to be cut off by laser, and corresponding photomask manufacturing procedures are reduced.
Specifically, as shown in fig. 1 and fig. 2, the driving circuit in the display panel 100 in the present embodiment uses a double-sided interlaced GOA circuit to drive the pixel units in the display area 1011 of the display panel 100 for displaying. The periphery of the display area 1011 is further provided with a non-display area 1012, a non-display area 1013 and a non-display area 1014, the GOA circuit includes a plurality of cascaded GOA units, when the first-stage GOA unit receives the start-stop signal, the first-stage GOA unit outputs a first line scanning signal, the first line scanning signal is taken as a cascaded signal of the second-stage unit through a signal line, the second line scanning signal output by the second-stage unit is taken as a pull-up signal, the pull-up signal is transmitted to the first-stage GOA unit through the signal line for correcting the waveform of the first line scanning signal, and the transmission manner of the cascaded signals of other GOA units is the same as that described above, so that the GOA unit outputs the scanning signal of the whole display panel. In order to improve the display speed and quality of the display screen and compress the size of the frame, the two sides of the GOA driving unit are driven simultaneously, the GOA driving unit on one side only comprises an odd-level GOA driving unit used for scanning pixels on odd lines in the display panel, and the GOA driving unit on the other side only comprises an even-level GOA driving unit used for scanning pixels on even lines in the display panel.
The GOA circuit in this embodiment includes a left GOA circuit 103 and a right GOA circuit 104, the detecting terminals include a left detecting terminal 105 and a right detecting terminal 106, the left GOA circuit 103 includes an input unit 1033, a GOA unit 1031, and an output scan line 1032, the input unit 1033 preferably shares a signal line busline, the input unit 1033 is electrically connected to the left detecting terminal 105, similarly, the right GOA circuit 104 includes an input unit 1043, a GOA unit 1041, and an output scan line 1042, the input unit 1043 preferably shares a signal line busline, and the input unit 1043 is electrically connected to the right detecting terminal 106. In addition, a common electrode 1081 is further disposed directly above the scan line 1032, a common electrode 1082 is further disposed directly above the scan line 1042, a control board 107 is disposed in the non-display area 1014, the control board 107 includes a main control board 1071, a sub-control board 1072, and a sub-control board 1073, the control board 107 is used for providing a signal source for an input unit in the GOA circuit, and the circuit of the GOA unit is not specifically described herein because the types of circuit diagrams of the GOA unit are many.
As shown in fig. 2, an embodiment of the invention provides a schematic diagram of electrical connection between a test terminal and a driving circuit, where an input unit 1033 includes a common signal line 10331, a common signal line 10332, a common signal line 10333, and a common signal line 10334, a detection terminal 105 includes a detection terminal 1051, a detection terminal 1052, a detection terminal 1053, and a detection terminal 1054, the detection terminal 1051, the detection terminal 1052, the detection terminal 1053, and the detection terminal 1054 are electrically connected to the common signal line 10331, the common signal line 10332, the common signal line 10333, and the common signal line 10334, and one end of any test terminal attached to the common signal line is provided with an electrical connection plane, the electrical connection plane array is provided with a plurality of electrical contact points, the electrical connection plane is rectangular or circular, and the electrical contact points are circular. In this implementation, the electrical contact points are symmetrically arranged on the electrical connection surface, the number of the electrical connection surfaces is 2, and the number of the electrical contact points on each electrical connection surface is 4.
Fig. 3 is a schematic diagram of a test terminal structure according to an embodiment of the present invention, in fig. 2, a test terminal 1051, a test terminal 1052, a test terminal 1053, and a test terminal 1054 are sequentially arranged from bottom to top, and in fig. 2, a common signal line 10331, a common signal line 10332, a common signal line 10333, and a common signal line 10334 are sequentially arranged from left to right. As shown in fig. 3, fig. 3 is further provided with other test terminals and corresponding common signal lines, the test terminal 1051 includes a first test terminal group 10511, a second test terminal group 10512, and a transparent metal line 10513 located between the first test terminal group 10511 and the second test terminal group 10512, the test terminal 10514 of the first test terminal group 10511 is electrically connected to the common signal line 10331, the first test terminal group 10511 and the second test terminal group 10512 both input test signal sources with the same function, in this embodiment, the test terminal 1051 inputs a clock signal, and the size of the test terminal of the first test terminal group 10511 is different from the size of the test terminal of the second test terminal group 10512. The other test terminals have a structure similar to that of the test terminal 1051, and are not described one by one, but different test terminals input different test signal sources, the test terminal 1052 inputs a high potential signal, the test terminal 1053 inputs a low potential signal, the test terminal 1053 inputs an initial trigger signal, the test terminal 1054 inputs a gate receiving a reset signal, and other test terminals may also input a liquid crystal alignment signal.
As shown in fig. 4, an embodiment of the invention provides a partial film structure diagram of a non-display area of a display panel, where the non-display area includes a substrate 201, a first driving circuit 202 located on the substrate 201, a gate insulating layer 203 located on the first driving circuit 202, a polysilicon layer 204 located on the gate insulating layer 203, a second driving circuit 205 located on the polysilicon layer 204, a planarization layer 206 located on the gate insulating layer 203 and covering the polysilicon layer 204 and the second driving circuit 205, and a metal trace 207 located on the planarization layer 206, the first driving circuit 202 is electrically connected to the metal trace 207 through a first testing terminal 2061, the second driving circuit 205 is electrically connected to the metal trace 207 through a second testing terminal 2062, the first testing terminal 2061 is disposed in a via hole in the gate insulating layer 203 and the planarization layer 206, and the second testing terminal 2062 is disposed in a via hole in the planarization layer 206. The metal wire 207 extends to the outside of the display panel, so that a test signal source can be conveniently accessed. In this embodiment, the first test terminal 2061 and the second test terminal 2062 are electrically connected to the same metal trace 207, in most cases, different signal sources are input, and the first test terminal 2061 and the second test terminal 2062 are electrically connected to different metal traces (not shown in the figure).
The embodiment of the invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, a test terminal of the test terminal area leads a test signal into the display area through a drive circuit, the test terminal at least comprises a first test terminal group and a second test terminal group, the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group, so that different jigs can be matched, the test terminal in the first test terminal group and the test terminal in the second test terminal group are respectively matched with and electrically connected with a first sub-metal wiring group and a second sub-metal wiring group, the first sub-metal wiring group and the second sub-metal wiring group both extend out of the display panel, the external test signal can be input to the drive circuit through a metal wiring directly, the purpose of testing is achieved, different jigs do not need to be prepared to match with corresponding detection terminals, the connection between the test lines and the signal lines is cut off by laser, and corresponding photomask manufacturing procedures are reduced.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (10)
1. A display panel is characterized by comprising a display area and a non-display area positioned at the periphery of the display area, wherein the non-display area is defined with a test terminal area, and a test terminal of the test terminal area leads a test signal into the display area through a drive circuit;
the test terminal area at least comprises a first test terminal group and a second test terminal group, and the size of the test terminal in the first test terminal group is different from that of the test terminal in the second test terminal group.
2. The display panel of claim 1, wherein the number of the test terminals in the first test terminal set is the same as the number of the test terminals in the second test terminal set, and each test terminal in the first test terminal set is electrically connected to one test terminal in the second test terminal set.
3. The display panel according to claim 2, wherein a pitch of adjacent test terminals in the first test terminal group is the same as a pitch of adjacent test terminals in the second test terminal group.
4. The display panel according to claim 2, wherein the test terminals in the first test terminal group and the test terminals in the second test terminal group are electrically connected through transparent metal wires.
5. The display panel according to claim 1, wherein the metal traces include a first sub-metal trace group and a second sub-metal trace group, the test terminals in the first test terminal group and the test terminals in the second test terminal group are respectively matched with and electrically connected to the first sub-metal trace group and the second sub-metal trace group, and both the first sub-metal trace group and the second sub-metal trace group extend out of the display panel.
6. The display panel according to claim 5, wherein only one of the first sub-metal routing group and the second sub-metal routing group inputs a test signal source and the other metal routing group does not input the test signal source when the driving circuit is detected.
7. The display panel of claim 6, wherein the test signal source is one or more of a clock signal, a start trigger signal, a low potential signal, a high potential signal, a gate receiving reset signal, and a liquid crystal alignment signal.
8. The display panel according to claim 2, wherein an electrical connection surface is disposed at an end of any of the test terminals, which is attached to the input signal line of the driving circuit, the electrical connection surface is provided with a plurality of electrical contacts, the electrical connection surface is rectangular or circular, and the electrical contacts are circular.
9. The display panel according to claim 1, wherein the non-display region comprises a substrate, a first driving circuit located on the substrate, a gate insulating layer located on the first driving circuit, a polysilicon layer located on the gate insulating layer, a second driving circuit located on the polysilicon layer, a planarization layer located on the gate insulating layer and covering the polysilicon layer and the second driving circuit, and a metal trace located on the planarization layer, wherein a first testing terminal is disposed between the first driving circuit and the metal trace, and a second testing terminal is disposed between the second driving circuit and the metal trace.
10. The display panel according to claim 1, wherein the driving circuit is a GOA circuit, the GOA circuit comprises an input unit, a GOA unit and an output unit, the input unit is electrically connected to the test terminal, and the output unit comprises a plurality of scan lines arranged in parallel and extending to the display area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110012247.5A CN112599062B (en) | 2021-01-06 | 2021-01-06 | Display panel |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110012247.5A CN112599062B (en) | 2021-01-06 | 2021-01-06 | Display panel |
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| CN112599062A true CN112599062A (en) | 2021-04-02 |
| CN112599062B CN112599062B (en) | 2023-09-26 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023077547A1 (en) * | 2021-11-05 | 2023-05-11 | 武汉华星光电半导体显示技术有限公司 | Display module and display device |
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| CN107068027A (en) * | 2017-05-27 | 2017-08-18 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, liquid crystal display panel detecting system and method |
| US20180004031A1 (en) * | 2016-07-04 | 2018-01-04 | Samsung Display Co., Ltd. | Printed circuit board package and display device including the same |
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| KR20160084746A (en) * | 2015-01-06 | 2016-07-14 | 엘지디스플레이 주식회사 | Display panel and display device including the same |
| US20180004031A1 (en) * | 2016-07-04 | 2018-01-04 | Samsung Display Co., Ltd. | Printed circuit board package and display device including the same |
| CN106292111A (en) * | 2016-10-20 | 2017-01-04 | 深圳市华星光电技术有限公司 | A kind of array base palte and display panels |
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| WO2023077547A1 (en) * | 2021-11-05 | 2023-05-11 | 武汉华星光电半导体显示技术有限公司 | Display module and display device |
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