CN112596576A - Band gap reference circuit - Google Patents
Band gap reference circuit Download PDFInfo
- Publication number
- CN112596576A CN112596576A CN202011302615.1A CN202011302615A CN112596576A CN 112596576 A CN112596576 A CN 112596576A CN 202011302615 A CN202011302615 A CN 202011302615A CN 112596576 A CN112596576 A CN 112596576A
- Authority
- CN
- China
- Prior art keywords
- mos transistor
- resistor
- transistor
- reference circuit
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003321 amplification Effects 0.000 claims abstract description 17
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 17
- 238000001914 filtration Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 description 11
- 102100037224 Noncompact myelin-associated protein Human genes 0.000 description 7
- 101710184695 Noncompact myelin-associated protein Proteins 0.000 description 7
- 230000008569 process Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- NAWXUBYGYWOOIX-SFHVURJKSA-N (2s)-2-[[4-[2-(2,4-diaminoquinazolin-6-yl)ethyl]benzoyl]amino]-4-methylidenepentanedioic acid Chemical compound C1=CC2=NC(N)=NC(N)=C2C=C1CCC1=CC=C(C(=O)N[C@@H](CC(=C)C(O)=O)C(O)=O)C=C1 NAWXUBYGYWOOIX-SFHVURJKSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Abstract
The invention provides a band-gap reference circuit, and belongs to the technical field of integrated circuits. The bandgap reference circuit includes: the power supply module is connected with a power supply end and used for outputting a current signal; and the error amplification module comprises an operational amplifier which is connected with the power supply module and is used for compensating the current signal so that the band-gap reference circuit outputs a first reference source voltage. According to the technical scheme provided by the invention, the error amplification module consisting of the operational amplifier is adopted to compensate the electric signal, so that the band-gap reference voltage with high precision and low temperature drift can be obtained, and the band-gap reference circuit is simple in structure and can be suitable for the field of pure analog circuits.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a band-gap reference circuit.
Background
The bandgap reference source circuit is widely applied to analog circuits, and can provide a voltage independent of process, voltage and temperature, and a reference voltage source in the bandgap reference source circuit becomes an indispensable basic circuit module in large-scale and ultra-large-scale integrated circuits and almost all digital analog systems. The reference voltage source can be widely applied to circuits such as a high-precision comparator, an A/D (analog/digital) converter, a D/A converter, a random dynamic memory, a flash memory, a system integrated chip and the like.
The temperature characteristics and accuracy of the reference voltage output by the reference voltage source have a direct influence on the performance of the whole system. The classic bandgap reference source structure is that a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient are added with proper weight to generate a reference voltage with a zero temperature coefficient. For example, the base-emitter voltage (V) of a bipolar transistorBE) Having a negative temperature coefficient and operating at unequal current densitiesBE) Proportional to absolute temperature. Such a band gap datumThe most common method for generating positive and negative temperature coefficient voltages in a circuit can meet the requirements of medium-precision application.
In the requirement of high-precision application, an important factor limiting the precision of the bandgap reference source is the influence of operational amplifier offset. In the prior art, there are two methods for eliminating offset, one is to design an amplifier with low offset voltage for the operational amplifier itself, for example, the operational amplifier adopts a pre-Chopper circuit or a correlated double sampling circuit to eliminate offset, and the other is to adopt Chopper technology to make the environments of two input ends of the operational amplifier consistent by controlling a clock-controlled switch so as to cancel the influence of offset of the operational amplifier on the bandgap reference output.
In the first scheme, the design of only the low-offset or zero-offset amplifier often sacrifices other performances of the operational amplifier, which is too costly, and the scheme adopting the Chopper technique needs to use a control signal of a digital circuit, so that the scheme is not suitable for the field of pure analog circuits.
Disclosure of Invention
It is an object of embodiments of the present invention to provide a bandgap reference circuit for solving one or more of the above mentioned technical problems.
In order to achieve the above object, an embodiment of the present invention provides a bandgap reference circuit, including: the power supply module is connected with a power supply end and used for outputting a current signal; and the error amplification module comprises an operational amplifier which is connected with the power supply module and is used for compensating the current signal so that the band-gap reference circuit outputs a first reference source voltage.
Optionally, the power module includes a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, and a ninth MOS transistor MP9, wherein a collector and a base of the first transistor Q1 are grounded, and a collector and a base of the second transistor Q2 are grounded; the emitter of the first transistor Q1 is connected to the drain of the ninth MOS transistor MP9 through the first resistor R1; the emitter of the second transistor Q2 is connected to the drain of the ninth MOS transistor MP9 through the third resistor R3 and the second resistor R2; the source of the ninth MOS transistor MP9 is connected to the power source terminal, and the gate of the ninth MOS transistor MP9 is connected to the error amplifying module.
Optionally, the error amplifying module includes a plurality of operational amplifiers, and the plurality of operational amplifiers are connected in cascade to form a multi-stage operational amplifier structure.
Optionally, each operational amplifier in the plurality of operational amplifiers has the same structure, the operational amplifier includes a tenth MOS transistor MP10, a first MOS transistor MP1, a second MOS transistor MP2, a third MOS transistor MP3, and a fourth MOS transistor MP4, a source of the tenth MOS transistor MP10 is connected to the power supply terminal, a drain of the tenth MOS transistor MP10 is connected to a source of the first MOS transistor MP1 and a source of the second MOS transistor MP2, and the tenth MOS transistor MP10 is configured to provide a tail current; the drain of the first MOS transistor MP1 is connected to the source of the third MOS transistor MP3 and then connected to the next-stage operational amplifier, and the gate of the first MOS transistor MP1 is connected to the emitter of the first transistor Q1; the drain of the second MOS transistor MP2 is connected to the source of the fourth MOS transistor MP4 and then connected to the next-stage operational amplifier, and the gate of the second MOS transistor MP2 is connected to the emitter of the second transistor Q2; the drain of the third MOS transistor MP3 is connected to the ground, the gate of the third MOS transistor MP3 is connected to the gate of the fourth MOS transistor MP4, wherein the first MOS transistor MP1 and the second MOS transistor MP2 are input transistors, and the third MOS transistor MP3 and the fourth MOS transistor MP4 are a set of current mirrors.
Optionally, the operational amplifier further includes a sixth resistor R6, wherein one end of the sixth resistor R6 is connected to the ground terminal, and the other end of the sixth resistor R6 is connected to the gate of the third MOS transistor MP3 and the gate of the fourth MOS transistor MP4, so as to filter noise at the ground terminal.
Optionally, the error amplifying module further includes an operational amplifier a, and an output end of the operational amplifier a is connected to the gate of the ninth MOS transistor MP9 and the gate of the MOS transistor in the error amplifying module for providing the tail current, and is configured to convert the differential output of the multiple operational amplifiers into a single-ended output.
Optionally, two input tubes in each of the operational amplifiers operate in a subthreshold region, and the width-to-length ratios between the two input tubes are not equal.
Optionally, the bandgap reference circuit further includes: and the voltage dividing resistor is arranged between the output end and the grounding end of the band-gap reference circuit and is used for dividing the first reference source voltage so as to enable the band-gap reference circuit to output reference source voltages with different voltage values.
Optionally, the voltage dividing resistor includes a fourth resistor R4 and a fifth resistor R5; the fourth resistor R4 and the fifth resistor R5 are connected in series and then connected between the output terminal and the ground terminal, wherein a second reference source voltage is output at a common point between the fourth resistor R4 and the fifth resistor R5.
Optionally, the first resistor R1, the second resistor R2 and the third resistor R3 are resistors of the same type.
Through the technical scheme, the band gap reference circuit provided by the embodiment of the invention can obtain the band gap reference voltage with high precision and low temperature drift by adopting the error amplification module consisting of the operational amplifier to compensate the electric signal, has a simple structure and can be suitable for the field of pure analog circuits.
Additional features and advantages of embodiments of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the embodiments of the invention without limiting the embodiments of the invention. In the drawings:
FIG. 1 is a schematic structural diagram of a bandgap reference circuit provided by an embodiment of the present invention;
FIG. 2 is a circuit schematic of a bandgap reference circuit provided by an embodiment of the present invention;
fig. 3 is a circuit schematic diagram of a bandgap reference circuit provided by an embodiment of the present invention.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating embodiments of the invention, are given by way of illustration and explanation only, not limitation.
It should be noted at the outset that the terms "first," "second," and the like in the embodiments of the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature and, where desired, the effect achieved by the feature may be substantially the same.
Fig. 1 is a schematic structural diagram of a bandgap reference circuit according to an embodiment of the present invention. As shown in fig. 1, a bandgap reference circuit provided by the embodiment of the present invention includes: a power supply module 110 and an error amplification module 120 connected thereto. The power module 110 is further connected to a power source terminal and is capable of outputting an electrical signal, and the error amplification module 120 is capable of compensating the electrical signal output by the power module 110, so that the bandgap reference circuit is capable of outputting a first reference source voltage, where the first reference source voltage is a constant voltage value and is independent of load, power supply, temperature drift, time and other influencing factors.
The error amplifying module 120 provided by the embodiment of the present invention is composed of an operational amplifier. For example, as shown in fig. 1, the error amplification block 120 includes an operational amplifier 121, operational amplifiers 122 and … …, and an operational amplifier 12 n.
The number of the operational amplifiers used for forming the error amplification module can be any value, and can be determined according to the actual situation, and the operational amplifiers are preferably connected in a cascade manner to form a multi-stage operational amplifier structure.
The band-gap reference circuit provided by the embodiment of the invention adopts the error amplification module consisting of the operational amplifier to compensate the electric signal, can obtain the band-gap reference voltage with high precision and low temperature drift, has a simple structure, and can be applied to the field of pure analog circuits.
Fig. 2 is a schematic circuit diagram of a bandgap reference circuit provided by an embodiment of the present invention, and the bandgap reference circuit provided by the embodiment of the present invention will be explained in detail with reference to fig. 2.
As shown in fig. 2, the power module includes a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, and a ninth MOS transistor MP 9. The ninth MOS transistor MP9 is a PMOS transistor, and the first transistor Q1 and the second transistor Q2 are bipolar transistors.
The collector and the base of the first transistor Q1 are grounded, the collector and the base of the second transistor Q2 are grounded, the emitter of the first transistor Q1 is connected to the drain of the ninth MOS transistor MP9 through the first resistor R1, the emitter of the second transistor Q2 is connected to the drain of the ninth MOS transistor MP9 through the third resistor R3 and the second resistor R2, the source of the ninth MOS transistor MP9 is connected to the power supply terminal VDD, and the gate of the ninth MOS transistor MP9 is connected to the first-stage operational amplifier in the error amplification module.
In the bandgap reference circuit provided by the embodiment of the invention, the ninth MOS transistor MP9 is used as a current source to divide the current I1 and the current I2 into two paths, and the two paths respectively flow through the first resistor R1 and the second resistor R2.
The number of the operational amplifiers used to form the error amplification module shown in fig. 2 of the present invention is M, and the structures of the operational amplifiers are the same, and on this basis, the structure of the first-stage operational amplifier is taken as an example for explanation.
In the first-stage operational amplifier shown in fig. 2, the first-stage operational amplifier includes a tenth MOS transistor MP10, a first MOS transistor MP1, a second MOS transistor MP2, a third MOS transistor MP3, and a fourth MOS transistor MP 4. The tenth MOS transistor MP10, the first MOS transistor MP1, the second MOS transistor MP2, the third MOS transistor MP3 and the fourth MOS transistor MP4 are all PMOS transistors.
A source of the tenth MOS transistor MP10 is connected to the power supply terminal VDD, a drain of the tenth MOS transistor MP10 is connected to a source of the first MOS transistor MP1 and a source of the second MOS transistor MP2, the tenth MOS transistor MP10 is configured to provide a tail current, a drain of the first MOS transistor MP1 is connected to a source of the third MOS transistor MP3 and then connected to an operational amplifier of a next stage, a gate of the first MOS transistor MP1 is connected to an emitter of the first transistor Q1, a drain of the second MOS transistor MP2 is connected to a source of the fourth MOS transistor MP4 and then connected to an operational amplifier of a next stage, a gate of the second MOS transistor MP2 is connected to an emitter of the second transistor Q2, a drain of the third MOS transistor MP3 is connected to a ground terminal GND, and a gate of the third MOS transistor MP3 is connected to a gate of the fourth MOS transistor MP 4.
The first MOS transistor MP1 and the second MOS transistor MP2 are input transistors, the third MOS transistor MP3 and the fourth MOS transistor MP4 are a set of current mirrors and are simultaneously used as a load of a single-stage operational amplifier, and the tenth MOS transistor MP10 is used as a tail current source to provide a constant bias current.
In the M-th stage operational amplifier shown in fig. 2, an eleventh MOS transistor MP11, a fifth MOS transistor MP5, a sixth MOS transistor MP6, a seventh MOS transistor MP7, and an eighth MOS transistor MP8 are included. The eleventh MOS transistor MP11, the fifth MOS transistor MP5, the sixth MOS transistor MP6, the seventh MOS transistor MP7, and the eighth MOS transistor MP8 are all PMOS transistors.
A source of the eleventh MOS transistor MP11 is connected to the power supply terminal VDD, a drain of the eleventh MOS transistor MP11 is connected to a source of the fifth MOS transistor MP5 and a source of the sixth MOS transistor MP6, the eleventh MOS transistor MP11 is configured to provide a tail current, a drain of the fifth MOS transistor MP5 is connected to a source of the seventh MOS transistor MP7, a gate of the fifth MOS transistor MP5 is connected to the operational amplifier of the previous stage, a drain of the sixth MOS transistor MP6 is connected to a source of the eighth MOS transistor MP8, a gate of the sixth MOS transistor MP6 is connected to the operational amplifier of the previous stage, a drain of the seventh MOS transistor MP7 is connected to the ground GND, and a gate of the seventh MOS transistor MP7 is connected to a gate of the eighth MOS transistor MP 8.
The fifth MOS transistor MP5 and the sixth MOS transistor MP6 are input transistors, the seventh MOS transistor MP7 and the eighth MOS transistor MP8 are a set of current mirrors, and are simultaneously used as a load of a single-stage operational amplifier, and the eleventh MOS transistor MP11 is used as a tail current source to provide a constant bias current.
Furthermore, a ground resistor connected to the ground GND may be further disposed in each operational amplifier for filtering noise at the ground.
Specifically, the sixth resistor R6 and the seventh resistor R7 shown in fig. 2 are the ground resistors. One end of the sixth resistor R6 is connected to the ground GND, the other end is connected to the gate of the third MOS transistor MP3 and the gate of the fourth MOS transistor MP4, one end of the seventh resistor R7 is connected to the ground GND, and the other end is connected to the gate of the seventh MOS transistor MP7 and the gate of the eighth MOS transistor MP 8.
As shown in fig. 2, the error amplification module provided in this embodiment is provided with, in addition to M operational amplifiers having the same structure, an operational amplifier a for converting the differential output of the operational amplifier in the last stage into a single-ended output.
Specifically, the negative input end of the operational amplifier a is connected to the drain of the fifth MOS transistor MP5 and the source of the seventh MOS transistor MP7, the positive input end of the operational amplifier a is connected to the drain of the sixth MOS transistor MP6 and the source of the eighth MOS transistor MP8, and the output end of the operational amplifier a is connected to the gate of the MOS transistor for providing the tail current (specifically, the gate of the ninth MOS transistor MP9, the gate of the tenth MOS transistor MP10, and the gate of the eleventh MOS transistor MP11, which are shown in fig. 2).
In the bandgap reference circuit provided by this embodiment of the present invention, the negative phase input terminal VIN of the error amplification module is connected to the emitter of the first transistor Q1, the positive phase input terminal VIP is connected to the common point of the second resistor R2 and the third resistor R3, the operational amplifier a converts the differential output of the plurality of cascade-connected operational amplifiers into a single-ended output after differential single-operational amplification, and connects the single-ended output to the gate of the ninth MOS transistor MP9, so as to form a closed loop, and simultaneously, a bias can be provided to the tail current sources in the operational amplification circuits of each stage.
In the bandgap reference circuit according to this embodiment of the present invention, a loop formed by the negative phase input terminal VIN, the error amplifying module, the ninth MOS transistor MP9, the resistor R1 and the first transistor Q1 is a positive feedback loop, and a negative feedback loop formed by the positive phase input terminal VIP, the error amplifying module, the ninth MOS transistor MP9, the second resistor R2, the third resistor R3 and the second transistor Q2 is a negative feedback loop. The feedback point in the positive feedback loop comes from the emitter voltage of the first transistor Q1, which increases with the current increase, but the emitter voltage of the transistor has very low sensitivity to the overcurrent, while the change of the feedback point voltage in the negative feedback loop is the product of the current I2 and the third resistor R3, so as long as the resistance of the third resistor R3 is not designed to be very small, it can be ensured that the negative feedback coefficient is larger than the positive feedback coefficient, and the loop behaves as negative feedback.
Each operational amplifier provided by the embodiment of the invention comprises two input tubes, each input tube works in a subthreshold region, and the width-length ratio of the two input tubes in the same operational amplifier is unequal, so that the influence of operational amplifier offset on the bandgap reference voltage can be effectively reduced, the performance of the bandgap reference circuit is improved, and the bandgap reference voltage with high precision and low temperature drift, namely the first reference source voltage, can be output.
In the bandgap reference circuit provided in the embodiment of the invention, when the loop is stabilized, the currents flowing through the first MOS transistor MP1 and the second MOS transistor MP2 have the same magnitude, so that a difference Δ V exists between the gate-source voltages of the first MOS transistor MP1 and the second MOS transistor MP2GSCorresponding to the division of Δ V between VIN and VIPBEIntroducing an Δ V artificiallyGSΔ V ofGSProportional to absolute temperature. The circuit structure proposed by the invention utilizes Δ VGSGenerating a PTAT (proportional to absolute temperature) current with a quadratic coefficient to be coupled to the transistor VBEThe quadratic terms of the two-dimensional curvature compensation are cancelled out, and curvature compensation is achieved.
Based on the technical solutions provided by the above embodiments of the present invention, although a first reference source voltage unrelated to temperature can be output, the voltage value thereof is fixed, so in order to meet different usage requirements, it may be considered to provide a voltage dividing resistor between the output terminal and the ground terminal of the bandgap reference circuit, so that the bandgap reference circuit can output reference source voltages having different voltage values.
As shown in fig. 3, the fourth resistor R4 and the fifth resistor R5 connected in series are connected between the output end of the bandgap reference circuit and the ground GND, the output voltage VBG is divided by the fourth resistor R4 and the fifth resistor R5, and the output voltage VBG is the second reference source voltage at the common point between the fourth resistor R4 and the fifth resistor R5. The specific voltage value of the second reference source voltage is determined by the output voltage VBG, the fourth resistor R4 and the fifth resistor R5, so that the resistance ratio of the fourth resistor R4 and the fifth resistor R5 can be set by a user according to actual requirements.
The first resistor R1, the second resistor R2 and the third resistor R3 provided in this embodiment of the present invention are preferably resistors of the same type, so as to obtain an output voltage (i.e., a reference source voltage) with high precision. When the voltage dividing resistor is provided, the voltage dividing resistor, the first resistor R1, the second resistor R2 and the third resistor R3 may all be the same type of resistor.
The bandgap reference circuit shown in fig. 3 will now be further explained.
In the embodiment of the invention, the gain of the error amplification module is large enough, and the input impedance is infinite, so that the voltage difference between VIN and VIP is equal to DeltaV of each stage of input tubeGSAnd (c) ignoring mismatches in the circuit (e.g., mismatches between resistors, mismatches between MOS transistors, and mismatches between transistors). The emitter-base voltage of the first transistor Q1 is VEB1Emitter-base voltage V of the second transistor Q2EB2The first resistor R1 and the second resistor R2 have the same resistance.
In fig. 3, the relationship between the collector current of a transistor and its emitter-base voltage is shown in equation (1):
wherein, ISIs the saturation current of the transistor, VTIs a thermal voltage, VTKT/q; q is an electronic charge, VEBK is the Boltzmann constant and T is the absolute temperature for the emitter-base voltage of the transistor.
The current in the transistor is shown in equation (2):
the emitter-base voltage of the transistor is therefore as shown in equation (3):
in fig. 3, the difference between the voltages at the positive and negative input terminals of the nth stage operational amplifier is Δ VGSnThe voltage difference between the two ends of the third resistor R3 is DeltaVR3As shown in equation (4):
in equation (4), n < M, if the ratio of the emitter areas of the first transistor Q1 and the second transistor Q2 is 1: n, then the ratio of the saturation currents of the first transistor Q1 and the second transistor Q2 is shown in equation (5):
IS1：IS2＝1：N (5)
then equation (4) can be transformed into equation (6):
current I of first transistor Q1Q1And current I of second transistor Q2Q2As shown in equation (7) and equation (8), respectively:
substituting formula (7) and formula (8) into formula (6) yields formula (9):
the current equation of the MOS tube working in the subthreshold region is shown as the formula (10):
in equation (10), n is a sub-threshold ramp factor, which is a process-related constant, typically 1 to 1.5.
In the bandgap reference circuit of this embodiment, the currents flowing through the first MOS transistor MP1 and the second MOS transistor MP2 are equal, and the formula (11) can be obtained by combining the above formula:
as can be seen from the above formula (11), Δ VGSProportional to absolute temperature.
Output voltage VBGAnd VBG_SUBAs shown in equations (12) and (13), respectively:
in the band gap reference circuit provided by the embodiment of the invention, M operational amplifiers connected in cascade are adopted, the input tube of each operational amplifier works in a subthreshold region, the ratio of the two input tubes is unequal (and the larger difference of the width-length ratio can enable the delta VGSGreater in value), is amplified in a first stage of operationThe difference input end of the amplifier can be overlapped with M deltaVGSThe output voltage expression of the final bandgap reference circuit covers the M multiplied by the delta VGSThe influence of offset voltage of the operational amplifier can be greatly reduced, and the performance of the band gap reference source is improved.
In the bandgap reference circuit provided by the embodiment of the invention, the current proportional to the absolute temperature is multiplied by the resistor, and the voltage V of the transistor is addedBEAnd finally, the band-gap reference voltage with high precision and low temperature drift can be output.
Although the embodiments of the present invention have been described in detail with reference to the accompanying drawings, the embodiments of the present invention are not limited to the details of the above embodiments, and various simple modifications can be made to the technical solutions of the embodiments of the present invention within the technical idea of the embodiments of the present invention, and the simple modifications all belong to the protection scope of the embodiments of the present invention.
It should be noted that the various features described in the above embodiments may be combined in any suitable manner without departing from the scope of the invention. In order to avoid unnecessary repetition, the embodiments of the present invention do not describe every possible combination.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in the process, method, article, or apparatus that comprises the element.
The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. A bandgap reference circuit, comprising:
the power supply module is connected with a power supply end and used for outputting a current signal; and
and the error amplification module comprises an operational amplifier which is connected with the power supply module and is used for compensating the current signal so that the band-gap reference circuit outputs a first reference source voltage.
2. The bandgap reference circuit of claim 1, wherein the power supply module comprises a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3 and a ninth MOS transistor MP9,
the collector and the base of the first transistor Q1 are grounded, and the collector and the base of the second transistor Q2 are grounded;
the emitter of the first transistor Q1 is connected to the drain of the ninth MOS transistor MP9 through the first resistor R1;
the emitter of the second transistor Q2 is connected to the drain of the ninth MOS transistor MP9 through the third resistor R3 and the second resistor R2;
the source of the ninth MOS transistor MP9 is connected to the power source terminal, and the gate of the ninth MOS transistor MP9 is connected to the error amplifying module.
3. The bandgap reference circuit according to claim 2, wherein the error amplifying module comprises a plurality of operational amplifiers, and the plurality of operational amplifiers are connected in cascade to form a multi-stage operational amplifier structure.
4. The bandgap reference circuit of claim 3, wherein each of the plurality of operational amplifiers has the same structure, and the operational amplifiers include a tenth MOS transistor MP10, a first MOS transistor MP1, a second MOS transistor MP2, a third MOS transistor MP3 and a fourth MOS transistor MP4,
the source of the tenth MOS transistor MP10 is connected to the power source terminal, the drain of the tenth MOS transistor MP10 is connected to the source of the first MOS transistor MP1 and the source of the second MOS transistor MP2, and the tenth MOS transistor MP10 is configured to provide a tail current;
the drain of the first MOS transistor MP1 is connected to the source of the third MOS transistor MP3 and then connected to the next-stage operational amplifier, and the gate of the first MOS transistor MP1 is connected to the emitter of the first transistor Q1;
the drain of the second MOS transistor MP2 is connected to the source of the fourth MOS transistor MP4 and then connected to the next-stage operational amplifier, and the gate of the second MOS transistor MP2 is connected to the emitter of the second transistor Q2;
the drain of the third MOS transistor MP3 is connected to the ground, the gate of the third MOS transistor MP3 is connected to the gate of the fourth MOS transistor MP4,
the first MOS transistor MP1 and the second MOS transistor MP2 are input transistors, and the third MOS transistor MP3 and the fourth MOS transistor MP4 are a set of current mirrors.
5. The bandgap reference circuit as claimed in claim 4, wherein the operational amplifier further comprises a sixth resistor R6, one end of the sixth resistor R6 is connected to the ground terminal, and the other end is connected to the gate of the third MOS transistor MP3 and the gate of the fourth MOS transistor MP4 for filtering noise at the ground terminal.
6. The bandgap reference circuit according to claim 4, wherein the error amplifying module further comprises an operational amplifier A, and an output terminal of the operational amplifier A is connected to the gate of the ninth MOS transistor MP9 and the gate of the MOS transistor for providing the tail current in the error amplifying module, for converting the differential outputs of the plurality of operational amplifiers into a single-ended output.
7. The bandgap reference circuit of claim 4, wherein the two input transistors in each of the operational amplifiers operate in the subthreshold region and the width-to-length ratio between the two input transistors is not equal.
8. The bandgap reference circuit according to claim 1, further comprising:
and the voltage dividing resistor is arranged between the output end and the grounding end of the band-gap reference circuit and is used for dividing the first reference source voltage so as to enable the band-gap reference circuit to output reference source voltages with different voltage values.
9. The bandgap reference circuit as claimed in claim 8, wherein the voltage dividing resistor comprises a fourth resistor R4 and a fifth resistor R5;
the fourth resistor R4 and the fifth resistor R5 are connected in series and then connected between the output end and the ground end,
wherein a second reference source voltage is output at a common point between the fourth resistor R4 and the fifth resistor R5.
10. The bandgap reference circuit as claimed in claim 2, wherein the first resistor R1, the second resistor R2 and the third resistor R3 are of the same type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011302615.1A CN112596576B (en) | 2020-11-19 | 2020-11-19 | Band gap reference circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011302615.1A CN112596576B (en) | 2020-11-19 | 2020-11-19 | Band gap reference circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112596576A true CN112596576A (en) | 2021-04-02 |
| CN112596576B CN112596576B (en) | 2024-02-02 |
Family
ID=75184718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011302615.1A Active CN112596576B (en) | 2020-11-19 | 2020-11-19 | Band gap reference circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112596576B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114356014A (en) * | 2021-11-22 | 2022-04-15 | 北京智芯微电子科技有限公司 | Low-voltage reference voltage generating circuit and chip |
| CN114899926A (en) * | 2022-07-13 | 2022-08-12 | 深圳市芯卓微科技有限公司 | Battery discharge system, battery discharge control circuit and control method thereof |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060017494A1 (en) * | 2004-07-26 | 2006-01-26 | Masashi Horiguchi | Semiconductor integrated circuit device |
| CN101825912A (en) * | 2010-04-30 | 2010-09-08 | 浙江大学 | Low-temperature coefficient high-order temperature compensated band gap reference voltage source |
| CN101916128A (en) * | 2010-08-18 | 2010-12-15 | 北京大学 | Method and corresponding circuit for improving output power supply rejection ratio of band-gap reference source |
| CN102262414A (en) * | 2010-05-29 | 2011-11-30 | 比亚迪股份有限公司 | Band-gap reference source generating circuit |
| CN103441741A (en) * | 2013-08-30 | 2013-12-11 | 江苏物联网研究发展中心 | Operational amplifying circuit structure reducing offset voltage based on band-gap reference |
| CN103955254A (en) * | 2014-03-18 | 2014-07-30 | 尚睿微电子（上海）有限公司 | Circuit capable of generating multiple current references |
| CN104067192A (en) * | 2011-11-01 | 2014-09-24 | 硅存储技术公司 | A low voltage, low power bandgap circuit |
| US9519304B1 (en) * | 2014-07-10 | 2016-12-13 | Ali Tasdighi Far | Ultra-low power bias current generation and utilization in current and voltage source and regulator devices |
| CN109725676A (en) * | 2017-10-31 | 2019-05-07 | 辛纳普蒂克斯公司 | Bandgap reference circuit |
-
2020
- 2020-11-19 CN CN202011302615.1A patent/CN112596576B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060017494A1 (en) * | 2004-07-26 | 2006-01-26 | Masashi Horiguchi | Semiconductor integrated circuit device |
| CN101825912A (en) * | 2010-04-30 | 2010-09-08 | 浙江大学 | Low-temperature coefficient high-order temperature compensated band gap reference voltage source |
| CN102262414A (en) * | 2010-05-29 | 2011-11-30 | 比亚迪股份有限公司 | Band-gap reference source generating circuit |
| CN101916128A (en) * | 2010-08-18 | 2010-12-15 | 北京大学 | Method and corresponding circuit for improving output power supply rejection ratio of band-gap reference source |
| CN104067192A (en) * | 2011-11-01 | 2014-09-24 | 硅存储技术公司 | A low voltage, low power bandgap circuit |
| CN103441741A (en) * | 2013-08-30 | 2013-12-11 | 江苏物联网研究发展中心 | Operational amplifying circuit structure reducing offset voltage based on band-gap reference |
| CN103955254A (en) * | 2014-03-18 | 2014-07-30 | 尚睿微电子（上海）有限公司 | Circuit capable of generating multiple current references |
| US9519304B1 (en) * | 2014-07-10 | 2016-12-13 | Ali Tasdighi Far | Ultra-low power bias current generation and utilization in current and voltage source and regulator devices |
| CN109725676A (en) * | 2017-10-31 | 2019-05-07 | 辛纳普蒂克斯公司 | Bandgap reference circuit |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114356014A (en) * | 2021-11-22 | 2022-04-15 | 北京智芯微电子科技有限公司 | Low-voltage reference voltage generating circuit and chip |
| CN114356014B (en) * | 2021-11-22 | 2024-03-15 | 北京智芯微电子科技有限公司 | Low-voltage reference voltage generating circuit and chip |
| CN114899926A (en) * | 2022-07-13 | 2022-08-12 | 深圳市芯卓微科技有限公司 | Battery discharge system, battery discharge control circuit and control method thereof |
| CN114899926B (en) * | 2022-07-13 | 2022-10-04 | 深圳市芯卓微科技有限公司 | Battery discharge system, battery discharge control circuit and control method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112596576B (en) | 2024-02-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10671109B2 (en) | Scalable low output impedance bandgap reference with current drive capability and high-order temperature curvature compensation | |
| US7880534B2 (en) | Reference circuit for providing precision voltage and precision current | |
| TWI459174B (en) | Low noise voltage reference circuit | |
| KR20060132845A (en) | Constant-current circuit and system power source using this constant-current circuit | |
| CN108710401B (en) | Band-gap reference voltage source with high precision and large driving current | |
| CN112596576B (en) | Band gap reference circuit | |
| Xu et al. | A novel 0.84 ppm/° C CMOS curvature-compensated bandgap with 1.2 V supply voltage | |
| CN115437442B (en) | High-order compensation band gap voltage reference circuit | |
| CN112859996A (en) | Low-voltage high-precision band-gap reference circuit | |
| CN115877907A (en) | Band-gap reference source circuit | |
| CN109343641B (en) | High-precision current reference circuit | |
| CN111293876B (en) | Linear circuit of charge pump | |
| CN116880644A (en) | High-order curvature temperature compensation band gap reference circuit | |
| CN219016862U (en) | Exponential temperature compensation band-gap reference circuit without operational amplifier | |
| JP2011017641A (en) | Temperature detecting method and temperature sensor | |
| CN114740938B (en) | Reference circuit and reference voltage ware applied to Sigma-Delta ADC | |
| CN115857610A (en) | Wide-range band gap reference voltage source | |
| US20220291707A1 (en) | Bandgap type reference voltage generation circuit | |
| CN115840486A (en) | Curvature compensation band gap reference circuit | |
| CN117130417A (en) | Band gap reference circuit and chip | |
| JP4314669B2 (en) | Bandgap reference circuit | |
| Zhang et al. | High precision low power CMOS bandgap for RFID | |
| CN112578841A (en) | Band gap reference circuit | |
| CN114035640B (en) | Reference voltage circuit and design method thereof | |
| CN113485511B (en) | Band gap reference circuit with low temperature coefficient |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |