CN112583210A - 用于功率模块的低杂散电感母排结构 - Google Patents

用于功率模块的低杂散电感母排结构 Download PDF

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CN112583210A
CN112583210A CN202011580372.8A CN202011580372A CN112583210A CN 112583210 A CN112583210 A CN 112583210A CN 202011580372 A CN202011580372 A CN 202011580372A CN 112583210 A CN112583210 A CN 112583210A
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毛先叶
孙靖雅
王长城
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Zhenghai Group Co.,Ltd.
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Shanghai Dajun Technologies Inc
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Priority to CN202011580372.8A priority Critical patent/CN112583210A/zh
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Priority to PCT/CN2021/126304 priority patent/WO2022142640A1/zh
Priority to US18/020,067 priority patent/US20230308027A1/en
Priority to EP21913385.7A priority patent/EP4191842A1/en
Priority to JP2022535074A priority patent/JP2023511821A/ja
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Abstract

本发明公开了一种用于功率模块的低杂散电感母排结构，本结构包括散热器、覆铜陶瓷基板、晶圆、塑壳、正负母排和灌封胶,覆铜陶瓷基板焊接在散热器上,晶圆焊接在覆铜陶瓷基板上,塑壳固定在散热器上，并且正母排和负母排通过灌封胶封装于塑壳内,正母排和负母排通过超声键合固定在覆铜陶瓷基板上,并且形成功率模块的电气回路,通过灌封胶进行灌封保证晶圆以及正负母排之间的电气间隙，正母排和负母排的叠层部分在塑壳内并从塑壳内延伸超出塑壳表面呈上下间隔叠层布置。本结构有效减少由杂散电感引起的浪涌电压，避免功率模块被击穿的危险，提高功率模块的抗振性能，确保功率模块的开关特性以及电机驱动控制的可靠性。

Description

用于功率模块的低杂散电感母排结构
技术领域
本发明涉及电机控制技术领域，尤其涉及一种用于功率模块的低杂散电感母排结构。
背景技术
三相交流电机驱动系统中，通常采用高频载波对功率半导体器件进行高速开闭管驱动,而与电机驱动主回路的杂散电感大小成比例的浪涌电压会加载到功率半导体器件上，当浪涌电压过大时有可能导致功率半导体器件被击穿损坏。可见，最大程度减小回路杂散电感可降低浪涌电压，以确保功率半导体器件的正常工作。尤其是针对新能源汽车电机控制器领域, 其中SiC、GaN功率模块在新能源汽车上的应用趋势愈发明显,开闭管驱动频率的要求越来越高,因此,如何降低功率模块母排的杂散电感是一个重要研究课题
通常浪涌电压 计算如式（1）：
Figure 619183DEST_PATH_IMAGE002
Figure DEST_PATH_IMAGE004
如图1和图2所示，一般三相交流电机驱动主回路结构包括散热器4、覆铜陶瓷基板5、晶圆6、塑壳3、正母排1、负母排2以及灌封胶7,覆铜陶瓷基板5焊接在散热器4上,若干晶圆6焊接在覆铜陶瓷基板5上,塑壳3固定在散热器4上, 正母排1和负母排2通过超声键合固定在覆铜陶瓷基板5上,形成功率模块6的电气回路,再通过灌封胶7保证晶圆以及母排之间的电气间隙，其中晶圆可以是Si、SiC、GaN等功率管芯片。该主回路结构中，正负母排注塑在塑壳3中并呈上下布置,图2所示L2区域为正母排1与负母排2的叠层布置区域,L1区域为塑壳3绝缘包裹正负母排区域,L3区域为正负母排错位非叠层区域。由于塑壳3需包裹住正母排1和负母排2, 且正母排1与负母排2错位布置并延伸出塑壳3与覆铜陶瓷基板5不同极性的铜层连接,因此L3区域一般为非叠层区域, L3区域的电流环路可以看成是与大地形成的电流环路,此时电流流经的环路面积S较大,也就是式2中的a×h较大,根据式2可知,杂散电感L增大, 杂散电感严重影响功率模块的开关特性，降低电机驱动控制的可靠性。
发明内容
本发明所要解决的技术问题是提供一种用于功率模块的低杂散电感母排结构，本结构克服传统三相交流电机驱动主回路结构的缺陷，有效减少由杂散电感引起的浪涌电压，避免功率模块被击穿的危险，提高功率模块的抗振性能，确保功率模块的开关特性以及电机驱动控制的可靠性。
为解决上述技术问题，本发明用于功率模块的低杂散电感母排结构包括散热器、覆铜陶瓷基板、晶圆、塑壳、正母排、负母排和灌封胶,所述覆铜陶瓷基板焊接在散热器上,所述晶圆焊接在所述覆铜陶瓷基板上,所述塑壳固定在所述散热器上，并且所述正母排和负母排通过灌封胶封装于所述塑壳内,所述正母排和负母排通过超声键合固定在覆铜陶瓷基板上,并且形成功率模块的电气回路,通过所述灌封胶进行灌封保证所述晶圆以及正负母排之间的电气间隙，所述正母排和负母排的叠层部分在所述塑壳内并从塑壳内延伸超出所述塑壳表面。
进一步，所述正母排与负母排的叠层部分从所述塑壳内延伸出塑壳表面的长度≥0。
进一步，所述正母排与负母排平行叠层布置延伸至所述覆铜陶瓷基板, 并且正母排居上、负母排居下或负母排居上、正母排居下叠层布置，所述正母排与负母排之间的间距≤3mm。
进一步，所述正母排与负母排叠层部分的宽度与长度之差≥0。
进一步，所述灌封胶的灌封面至少高于叠层布置的下层正母排或下层负母排。
进一步，所述灌封胶是硅胶或环氧树脂。
由于本发明用于功率模块的低杂散电感母排结构采用了上述技术方案，即本结构包括散热器、覆铜陶瓷基板、晶圆、塑壳、正母排、负母排和灌封胶,所述覆铜陶瓷基板焊接在散热器上,所述晶圆焊接在所述覆铜陶瓷基板上,所述塑壳固定在所述散热器上，并且所述正母排和负母排通过灌封胶封装于所述塑壳内,所述正母排和负母排通过超声键合固定在覆铜陶瓷基板上,并且形成功率模块的电气回路,通过所述灌封胶进行灌封保证所述晶圆以及正负母排之间的电气间隙，所述正母排和负母排的叠层部分在所述塑壳内并从塑壳内延伸超出所述塑壳表面。本结构克服传统三相交流电机驱动主回路结构的缺陷，有效减少由杂散电感引起的浪涌电压，避免功率模块被击穿的危险，提高功率模块的抗振性能，确保功率模块的开关特性以及电机驱动控制的可靠性。
附图说明
下面结合附图和实施方式对本发明作进一步的详细说明：
图1为三相交流电机驱动主回路结构示意图；
图2为图1的A-A向视图；
图3为本发明用于功率模块的低杂散电感母排结构示意图；
图4为正负母排叠层布置的负母排居上结构示意图；
图5为本结构的局部轴测示意图；
图6为本结构的局部平面示意图；
图7为本结构中正负母排叠层布置的正母排居上示意图；
图8为本结构中正负母排叠层布置的负母排居上示意图。
具体实施方式
如图3所示，本发明用于功率模块的低杂散电感母排结构包括散热器4、覆铜陶瓷基板5、晶圆6、塑壳3、正母排1、负母排2和灌封胶7,所述覆铜陶瓷基板5焊接在散热器4上,所述晶圆6焊接在所述覆铜陶瓷基板5上,所述塑壳3固定在所述散热器4上，并且所述正母排1和负母排2通过灌封胶7封装于所述塑壳3内,所述正母排1和负母排2通过超声键合固定在覆铜陶瓷基板5上,并且形成功率模块的电气回路,通过所述灌封胶7进行灌封保证所述晶圆6以及正负母排1、2之间的电气间隙，所述正母排1和负母排2的叠层部分在所述塑壳3内并从塑壳3内延伸超出所述塑壳3表面。
优选的，如图3、图4以及图5、图6所示，所述正母排1与负母排2的叠层部分从所述塑壳3内延伸出塑壳表面的长度≥0，即图中L4大于等于零。
优选的，如图3、图4以及图7、图8所示，所述正母排1与负母排2平行叠层布置延伸至所述覆铜陶瓷基板5, 并且正母排1居上、负母排2居下或负母排2居上、正母排1居下叠层布置，所述正母排1与负母排2之间的间距≤3mm。
优选的，所述正母排1与负母排2叠层部分的宽度与长度之差≥0。叠层部分的宽度以及长度优选相同尺寸。
优选的，所述灌封胶7的灌封面至少高于叠层布置的下层正母排1或下层负母排2。
优选的，所述灌封胶7是硅胶或环氧树脂。
本结构有效解决功率模块内部母排端子杂散电感过大的难题，正母排和负母排在L2区域呈叠层布置并且穿出塑壳延伸到功率模块内部,同时采用灌封胶进行绝缘灌封,以保证正负母排以及功率模块之间的电气间隙，极大减小了正负母排的非叠层区域,如此电流流经的环路面积S减小, 即式2中a×h减小,根据式2可知,杂散电感L相应减小, 有效降低浪涌电压，避免功率模块被击穿的危险,确保功率模块的开关特性,提高电机驱动控制的可靠性。

Claims (6)

1.一种用于功率模块的低杂散电感母排结构，包括散热器、覆铜陶瓷基板、晶圆、塑壳、正母排、负母排和灌封胶,所述覆铜陶瓷基板焊接在散热器上,所述晶圆焊接在所述覆铜陶瓷基板上,所述塑壳固定在所述散热器上，并且所述正母排和负母排通过灌封胶封装于所述塑壳内,所述正母排和负母排通过超声键合固定在覆铜陶瓷基板上,并且形成功率模块的电气回路,通过所述灌封胶进行灌封保证所述晶圆以及正负母排之间的电气间隙，其特征在于：所述正母排和负母排的叠层部分在所述塑壳内并从塑壳内延伸超出所述塑壳表面。
2.根据权利要求1所述的用于功率模块的低杂散电感母排结构，其特征在于：所述正母排与负母排的叠层部分从所述塑壳内延伸出塑壳表面的长度≥0。
3.根据权利要求1或2所述的用于功率模块的低杂散电感母排结构，其特征在于：所述正母排与负母排平行叠层布置延伸至所述覆铜陶瓷基板,并且正母排居上、负母排居下或负母排居上、正母排居下叠层布置，所述正母排与负母排之间的间距≤3mm。
4.根据权利要求3所述的用于功率模块的低杂散电感母排结构，其特征在于：所述正母排与负母排叠层部分的宽度与长度之差≥0。
5.根据权利要求3所述的用于功率模块的低杂散电感母排结构，其特征在于： 所述灌封胶的灌封面至少高于叠层布置的下层正母排或下层负母排。
6.根据权利要求3所述的用于功率模块的低杂散电感母排结构，其特征在于：所述灌封胶是硅胶或环氧树脂。
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CN115513163A (zh) * 2022-09-28 2022-12-23 上海海姆希科半导体有限公司 功率模块正负母排的优化结构

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