CN112563196A - Manufacturing method of active switch and display panel - Google Patents

Manufacturing method of active switch and display panel Download PDF

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Publication number
CN112563196A
CN112563196A CN202011325568.2A CN202011325568A CN112563196A CN 112563196 A CN112563196 A CN 112563196A CN 202011325568 A CN202011325568 A CN 202011325568A CN 112563196 A CN112563196 A CN 112563196A
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amorphous silicon
silicon layer
aluminum metal
aluminum
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陈阳
李伟
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HKC Co Ltd
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HKC Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1277—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using a crystallisation promoting species, e.g. local introduction of Ni catalyst
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors

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Abstract

The application discloses a manufacturing method of an active switch and a display panel, wherein the manufacturing method of the active switch comprises the following steps: sequentially forming an inducing layer, a buffer layer and an amorphous silicon layer on a substrate; irradiating the inducing layer, the buffer layer and the amorphous silicon layer by laser to form a polycrystalline silicon layer; sequentially forming a gate insulating layer, a gate electrode and an interlayer insulating layer on the polysilicon layer; and forming a source electrode and a drain electrode on the interlayer insulating layer, wherein the source electrode and the drain electrode respectively penetrate through the interlayer insulating layer and the grid electrode insulating layer and are respectively connected to two ends of the polycrystalline silicon layer. The application accelerates the crystallization speed of the amorphous silicon layer by utilizing the induction effect of the induction layer on the amorphous silicon layer and the dual effect of laser irradiation on crystallization of the amorphous silicon layer in the process of manufacturing the polycrystalline silicon layer, improves the crystallization effect, and increases the grain size in the polycrystalline silicon layer while not changing the power of a laser.

Description

Manufacturing method of active switch and display panel
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a method for manufacturing an active switch and a display panel.
Background
Thin film transistor liquid crystal displays (TFT-LCDs) are widely used in televisions, notebook computers, displays, mobile phone display screens, and the like. The TFT-LCD has the characteristics of low voltage, low power consumption, light weight, thin thickness, suitability for direct drive of large-scale integrated circuits and easiness in realization of full-color display, and occupies a leading position in the flat panel display technology. TFT-LCD development has resulted from research and development of TFT devices and materials. The semiconductor material of the TFT can be cadmium selenide (CdSe), tellurium (Te), amorphous silicon (a-Si), polysilicon (p-Si) and the like, the amorphous silicon TFT is most commonly applied, but the electron mobility of the amorphous silicon is lower than 1cm2/V.s, so that the development of the TFT-LCD towards higher fineness, lighter weight and more electricity saving is restricted. And the Low Temperature Polysilicon (LTPS) technology with the process Temperature lower than 600 ℃ is adopted, so that the electron mobility of the TFT can reach 300cm2/V.s, and the performance of the TFT is greatly improved. The LTPS technology basically adopts a preparation method in which an a-Si thin film is formed by Chemical Vapor Deposition (CVD), and then the a-Si thin film is processed by Excimer Laser Crystallization (ELC), Solid Phase Crystallization (SPC), or CW-Laser Crystallization (CLC) and then crystallized into a p-Si thin film.
At present, in the LTPS technology, ELA (excimer laser annealing) is a commonly used p-Si film preparation method at present. In the ELA process, the temperature of the a-Si film after being irradiated by laser is higher in the middle and lower at the two ends, and crystal nuclei are formed at the two ends and crystallized towards the middle in the cooling process, so that the size of the obtained polycrystalline silicon crystal grains is smaller; if the size of crystal grains is increased by increasing the laser irradiation energy to amorphous silicon, the substrate does not resist high temperature, and thus the high laser energy deteriorates the performance of the substrate.
Disclosure of Invention
The present application aims to provide a method for manufacturing an active switch and a display panel, which can obtain polysilicon with a large grain size without affecting a substrate, and is beneficial to improving the electrical characteristics of the active switch.
The application discloses a manufacturing method of an active switch, which comprises the following steps:
sequentially forming an inducing layer, a buffer layer and an amorphous silicon layer on a substrate;
irradiating the inducing layer, the buffer layer and the amorphous silicon layer by laser to form a polycrystalline silicon layer;
sequentially forming a gate insulating layer, a gate electrode and an interlayer insulating layer on the polysilicon layer; and
and forming a source electrode and a drain electrode on the interlayer insulating layer, wherein the source electrode and the drain electrode respectively penetrate through the interlayer insulating layer and the grid electrode insulating layer and are respectively connected to two ends of the polycrystalline silicon layer.
Optionally, the inducing layer is an aluminum metal layer, and the buffer layer is an aluminum metal oxide layer.
Optionally, the thickness ratio of the amorphous silicon layer to the aluminum metal layer is 3-5: 1.
Optionally, the thickness of the aluminum metal layer is between 90 nm and 110nm, the thickness of the aluminum metal oxide layer is between 30 nm and 50nm, and the thickness of the amorphous silicon layer is between 270 nm and 550 nm.
Optionally, the step of irradiating the inducing layer, the buffer layer and the amorphous silicon layer to form a polycrystalline silicon layer includes:
performing laser irradiation on the amorphous silicon layer to enable silicon atoms in the amorphous silicon layer to diffuse into an aluminum metal layer and crystallize to form an aluminum-doped polycrystalline silicon layer, and enabling aluminum atoms in the aluminum metal layer to diffuse into the amorphous silicon layer to form an aluminum metal layer doped with silicon atoms; and
and etching away the aluminum metal layer doped with silicon atoms and the aluminum metal oxide layer.
Optionally, the silicon atom-doped aluminum metal layer and the aluminum metal oxide layer are etched using an acidic solution.
Optionally, before forming the inducing layer, a light-shielding layer is further formed on the base substrate.
Optionally, the laser irradiates the inducing layer, the buffer layer and the amorphous silicon layer, and the step of forming the polycrystalline silicon layer includes:
placing a substrate base plate containing an inducing layer, a buffer layer and an amorphous silicon layer into an excimer laser reaction chamber:
controlling the temperature of the excimer laser reaction chamber at 200-300 ℃, and controlling the energy density at 300mJ/cm 2; and
and irradiating the amorphous silicon layer by using laser with the temperature not more than 1000 ℃ to convert the amorphous silicon layer into a polycrystalline silicon layer.
The application also discloses a manufacturing method of the active switch, which comprises the following steps:
sequentially forming a light shielding layer, an aluminum metal layer, an aluminum oxide layer and an amorphous silicon layer on the substrate;
inducing the amorphous silicon layer by laser, diffusing silicon atoms in the amorphous silicon layer into an aluminum metal layer and crystallizing to form an aluminum-doped polycrystalline silicon layer, and diffusing aluminum atoms in the aluminum metal layer into the amorphous silicon layer to form an aluminum metal layer doped with silicon atoms;
etching off the aluminum metal layer doped with silicon atoms and the aluminum oxide layer;
sequentially forming a gate insulating layer, a gate and an interlayer insulating layer on the aluminum-doped polycrystalline silicon layer; and
and forming a source electrode and a drain electrode on the interlayer insulating layer, wherein the source electrode and the drain electrode respectively penetrate through the interlayer insulating layer and the grid electrode insulating layer and are respectively connected to two ends of the aluminum-doped polycrystalline silicon layer.
The application also discloses a display panel, which comprises the active switch manufactured by the manufacturing method of the active switch and pixels configured to display pictures, wherein the active switch controls the pixels to be turned on or off.
Compared with the scheme that laser irradiation is adopted to convert amorphous silicon into polycrystalline silicon, the method has the advantages that in the process of manufacturing the polycrystalline silicon layer, the double effects of the induction effect of the induction layer on the amorphous silicon layer and the crystallization effect of the laser irradiation on the amorphous silicon layer are utilized, the crystallization speed of the amorphous silicon layer is accelerated, the crystallization effect is improved, the size of crystal grains in the polycrystalline silicon layer is increased while the power of a laser is not changed, the influence on a substrate of a substrate is avoided, and when the active switch is conducted, conductive particles easily penetrate through large-size crystal grain gaps, and the improvement of the electrical performance of the active switch is facilitated. In addition, a buffer layer is arranged between the amorphous silicon layer and the inducing layer, so that the longitudinal diffusion of particles in the amorphous silicon layer is slowed down when the amorphous silicon layer is irradiated by laser, the crystallization of the amorphous silicon layer is facilitated, and the grain size in the polycrystalline silicon layer is further increased.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:
fig. 1 is a schematic diagram of a display panel according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an active switch according to an embodiment of the present application;
FIG. 3 is a flow chart of a method of making an active switch according to an embodiment of the present application;
FIG. 4 is a schematic view of an aluminum oxide-free layer between an aluminum metal layer and an amorphous silicon layer according to an embodiment of the present disclosure;
FIG. 5 is a schematic view of an aluminum oxide layer between an aluminum layer and an amorphous silicon layer according to an embodiment of the present disclosure;
fig. 6 is a flowchart of a method for manufacturing an active switch according to another embodiment of the present application.
100, a display panel; 200. an active switch; 210. a substrate base plate; 220. a light-shielding layer; 230. a polysilicon layer; 231. an intrinsic region; 232. a low doped region; 233. a highly doped region; 234. a silicon atom; 235. an amorphous silicon layer; 240. a gate insulating layer; 250. a gate electrode; 260. a source electrode; 270. a drain electrode; 280. an interlayer insulating layer; 290. an inducing layer; 291. an aluminum atom; 300. a buffer layer; 310. a pixel.
Detailed Description
It is to be understood that the terminology, the specific structural and functional details disclosed herein are for the purpose of describing particular embodiments only, and are representative, but that the present application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or as implicitly indicating the number of technical features indicated. Thus, unless otherwise specified, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "plurality" means two or more. The terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that one or more other features, integers, steps, operations, elements, components, and/or combinations thereof may be present or added.
Further, terms of orientation or positional relationship indicated by "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, are described based on the orientation or relative positional relationship shown in the drawings, are simply for convenience of description of the present application, and do not indicate that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present application.
Furthermore, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly and may include, for example, fixed connections, removable connections, and integral connections; can be mechanically or electrically connected; either directly or indirectly through intervening media, or through both elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
The present application is described in detail below with reference to the figures and alternative embodiments.
As shown in fig. 1, the display panel 100 is a schematic diagram of a display panel 100, where the display panel 100 includes two array substrates and a color filter substrate which are oppositely disposed, an active switch 200 is disposed on the array substrates, and the active switch 200 is used to control the on and off of a pixel 310 in the display panel 100. As shown in fig. 2, the active switch 200 is a schematic diagram of a low temperature polysilicon thin film transistor, and includes a substrate 210, a light shielding layer 220, a polysilicon layer 230, a gate insulating layer 240, a gate 250, a source 260, a drain 270, and an interlayer insulating layer 280, wherein the interlayer insulating layer 280, the gate 250, the gate insulating layer 240, the polysilicon layer 230, the light shielding layer 220, and the substrate 210 are stacked in sequence from top to bottom, and the source 260 and the drain 270 penetrate through the interlayer insulating layer 280 and the gate insulating layer 240 and are respectively connected to two ends of the polysilicon layer 230; the polysilicon layer 230 includes two highly doped regions 233, two lowly doped regions 232 and an intrinsic region 231, the intrinsic region 231 is undoped, one end of each of the two lowly doped regions 232 is attached to both ends of the intrinsic region 230, the two highly doped regions 233 are respectively attached to the other ends of the two lowly doped regions 232, and the leakage current of the active switch 200 is reduced by doping the polysilicon. The material of the light-shielding layer 220 is an inorganic compound, such as black resin, and the light-shielding layer 220 is disposed to prevent the backlight from irradiating the polysilicon to generate a leakage current.
As shown in fig. 3, as another embodiment of the present application, a method for manufacturing an active switch is disclosed, which is used to manufacture the active switch, and the method for manufacturing the active switch includes the steps of:
s1: sequentially forming an inducing layer, a buffer layer and an amorphous silicon layer on a substrate;
s2: irradiating the inducing layer, the buffer layer and the amorphous silicon layer by laser to form a polycrystalline silicon layer;
s3: sequentially forming a gate insulating layer, a gate electrode and an interlayer insulating layer on the polysilicon layer;
s4: and forming a source electrode and a drain electrode on the interlayer insulating layer, wherein the source electrode and the drain electrode respectively penetrate through the interlayer insulating layer and the grid electrode insulating layer and are respectively connected to two ends of the polycrystalline silicon layer.
At present, a laser annealing technology is generally adopted to crystallize amorphous silicon, the amorphous silicon is rapidly heated and then melted during pulse laser irradiation, and after laser pulse is finished, the melted silicon is rapidly cooled and solidified in a short time, so that the amorphous silicon is converted into polycrystalline silicon; because the laser energy is limited by a laser, the laser energy cannot be increased infinitely, the mobility is reduced on the contrary due to too large energy density, the glass substrate cannot resist high temperature, generally needs less than 600 ℃, but too low energy is not beneficial to crystallization of amorphous silicon, and thus, the crystallization of the amorphous silicon is not thorough easily caused only by adopting a laser annealing technology. This application is at the in-process of preparation polycrystalline silicon, utilize induction layer to the induction effect of amorphous silicon layer and the dual effect of laser irradiation to amorphous silicon layer crystallization, the crystallization speed of amorphous silicon layer has been accelerated, and make the particle diffusion in the amorphous silicon layer complete, and greatly improved the crystallization rate of amorphous silicon layer, further improve the crystallization effect, make the grain size increase in the polycrystalline silicon layer when not changing laser instrument power, can not constitute the influence to substrate board like this, and when the initiative switch is switching on, conductive particle passes from the large size grain gap easily, be favorable to improving the electrical properties of initiative switch. In addition, a buffer layer is arranged between the amorphous silicon layer and the inducing layer, so that the longitudinal diffusion of atoms in the amorphous silicon is slowed down when the amorphous silicon layer is irradiated by laser, the crystallization of the amorphous silicon layer is facilitated, and the grain size in the polycrystalline silicon layer is further increased.
Specifically, in the step S1, the inducing layer is an aluminum metal layer, and the aluminum metal layer is deposited by a DC magnetron sputtering method, which includes the following steps: setting the substrate temperature at 200-300 deg.C to make the background vacuum in the chamber less than 1.0 × 10-4Pa, introducing argon into the chamber, wherein the pressure of the argon is 1.0 × 10-3Pa, the aluminum-containing target material in the chamber collides with argon ions under the action of an electric field, so as to sputter and form the aluminum metal film, wherein the power of the electric field is between 50W and 60W. In the step S1, the buffer layer is an aluminum metal oxide layer, specifically, an aluminum oxide layer, and the aluminum oxide layer is prepared by an RF magnetron sputtering method, specifically, the process is as follows: introducing oxygen gas with concentration of 18-22% into the chamber based on the step of S1, introducing argon gas, andthe pressure of the argon is 3.0-6.0Pa, the power of the electric field is 100-110W, the aluminum-containing target material in the chamber collides with the argon ions under the action of the electric field, and the sputtered aluminum ions react with the oxygen ions to produce the aluminum oxide. The aluminum metal layer and the aluminum oxide layer prepared by the method can improve the film quality effect and are beneficial to the deposition of the subsequent amorphous silicon thin film. As shown in fig. 4 and 5, after the inducing layer 290 and the buffer layer 300 are disposed below the amorphous silicon layer 235, the aluminum atom 291 in the aluminum metal layer will diffuse into the aluminum oxide layer after being irradiated by the laser, and is easily replaced by the aluminum ion in the aluminum oxide, and the newly generated aluminum atom will diffuse into the amorphous silicon layer 235 subsequently, so as to slow down the aluminum atom 291 in the aluminum metal layer from directly diffusing into the amorphous silicon layer, so as to prevent the amorphous silicon layer 235 from local crystallization; when a large number of silicon atoms 234 diffuse to the original aluminum metal layer, the remaining aluminum atoms weaken the bond energy of the silicon-silicon atom bonds, thereby accelerating the lattice reorganization and causing crystallization. If the aluminum oxide layer is not arranged, the amorphous silicon attached to the aluminum metal layer is locally crystallized by direct diffusion, and the film quality is affected.
Further, in the S1 step, before the inducing layer 290 is formed, the light shielding layer 220 is also formed on the base substrate 210.
The light-shielding layer 220 provided on the substrate 210 can prevent the semiconductor layer from being irradiated by a backlight source to generate a leakage current, and the light-shielding layer 220 can also play a role of buffering when the amorphous silicon is irradiated by laser, thereby reducing the damage to the substrate.
In step S2, crystallizing amorphous silicon using excimer laser, specifically including the steps of:
s21: placing a substrate base plate containing an inducing layer, a buffer layer and amorphous silicon into an excimer laser reaction chamber:
s22: the temperature of the excimer laser reaction chamber is controlled at 200-300 ℃, and the energy density is controlled at 300mJ/cm2；
S23: and irradiating the amorphous silicon layer by using laser with the temperature not more than 1000 ℃ to convert the amorphous silicon layer into a polycrystalline silicon layer.
Wherein the content of the first and second substances,the laser is an XeCl excimer laser with the wavelength of 308nm, the pulse width of 10-30ns, the frequency of 1-100Hz and the energy density of 120-480 mJ/cm2. The laser temperature is controlled within 1000 ℃, so that aluminum and silicon are diffused fully without damaging the material structure, and the polycrystalline silicon with continuity and more grain sizes is formed.
In the application, the thickness of the amorphous silicon layer is greater than that of the aluminum metal layer, the thickness of the aluminum metal layer is greater than that of the aluminum oxide layer, the ratio of the thickness of the amorphous silicon layer to that of the aluminum metal layer is 3-5:1, specifically, the thickness of the aluminum metal layer is between 90 nm and 110nm, the thickness of the aluminum metal oxide layer is between 30 nm and 50nm, and the thickness of the amorphous silicon layer is between 270 nm and 550 nm. The thickness of the amorphous silicon layer and the aluminum metal layer is set to be 3-5:1, mutual diffusion of aluminum and silicon is facilitated, and if the ratio of the amorphous silicon layer to the aluminum metal layer is too small or too large, material waste is caused, and the diffusion of the amorphous silicon layer and the silicon metal layer is not uniform.
In addition, in the step of S2, the method further includes an etching step, specifically including the steps of:
s24: performing laser irradiation on the amorphous silicon layer to enable silicon atoms in the amorphous silicon layer to diffuse into an aluminum metal layer and crystallize to form an aluminum-doped polycrystalline silicon layer, and enabling aluminum atoms in the aluminum metal layer to diffuse into the amorphous silicon layer to form an aluminum metal layer doped with silicon atoms;
s25: and etching away the aluminum metal layer doped with silicon atoms and the aluminum metal oxide layer.
The aluminum metal layer doped with silicon atoms and the aluminum metal oxide layer can be etched by adopting an acidic solution, the acidic solution comprises acetic acid, nitric acid, phosphoric acid and the like, and other films are deposited after the induction layer and the buffer layer are etched. Although the amorphous silicon is deposited above the inducing layer and the buffer layer, when the amorphous silicon layer is irradiated by laser, silicon ions in the amorphous silicon diffuse downwards, aluminum atoms in the aluminum metal layer diffuse upwards, and finally a polysilicon layer containing a discontinuous aluminum metal layer is formed at the position of the original aluminum metal layer. Therefore, during etching, only the aluminum metal layer and the aluminum metal oxide layer doped with silicon atoms above are etched.
As shown in fig. 6, as another embodiment of the present application, a method for manufacturing an active switch is also disclosed, which includes the steps of:
s5: sequentially forming a light shielding layer, an aluminum metal layer, an aluminum oxide layer and an amorphous silicon layer on the substrate;
s6: inducing the amorphous silicon layer by laser, diffusing silicon atoms in the amorphous silicon layer into an aluminum metal layer and crystallizing to form an aluminum-doped polycrystalline silicon layer, and diffusing aluminum atoms in the aluminum metal layer into the amorphous silicon layer to form an aluminum metal layer doped with silicon atoms;
s7: etching off the aluminum metal layer doped with silicon atoms and the aluminum oxide layer;
s8: sequentially forming a gate insulating layer, a gate and an interlayer insulating layer on the aluminum-doped polycrystalline silicon layer;
s9: and forming a source electrode and a drain electrode on the interlayer insulating layer, wherein the source electrode and the drain electrode respectively penetrate through the interlayer insulating layer and the grid electrode insulating layer and are respectively connected to two ends of the aluminum-doped polycrystalline silicon layer.
It should be noted that, the limitations of each step in the present disclosure are not considered to limit the order of the steps without affecting the implementation of the specific embodiments, and the steps written in the foregoing may be executed first, or executed later, or even executed simultaneously, and as long as the present disclosure can be implemented, all the steps should be considered as belonging to the protection scope of the present application.
The technical solution of the present application can be widely applied to various display panels, such as TN (Twisted Nematic) display panel, IPS (In-Plane Switching) display panel, VA (Vertical Alignment) display panel, MVA (Multi-Domain Vertical Alignment) display panel, and of course, other types of display panels, such as OLED (Organic Light-Emitting Diode) display panel, and the above solution can be applied thereto.
The foregoing is a more detailed description of the present application in connection with specific alternative embodiments, and the specific implementations of the present application are not to be considered limited to these descriptions. For those skilled in the art to which the present application pertains, several simple deductions or substitutions may be made without departing from the concept of the present application, and all should be considered as belonging to the protection scope of the present application.

Claims (10)

1. A method for manufacturing an active switch is characterized by comprising the following steps:
sequentially forming an inducing layer, a buffer layer and an amorphous silicon layer on a substrate;
irradiating the inducing layer, the buffer layer and the amorphous silicon layer by laser to form a polycrystalline silicon layer;
sequentially forming a gate insulating layer, a gate electrode and an interlayer insulating layer on the polysilicon layer; and
and forming a source electrode and a drain electrode on the interlayer insulating layer, wherein the source electrode and the drain electrode respectively penetrate through the interlayer insulating layer and the grid electrode insulating layer and are respectively connected to two ends of the polycrystalline silicon layer.
2. The method of claim 1, wherein the inducing layer is an aluminum metal layer and the buffer layer is an aluminum metal oxide layer.
3. The method of claim 2, wherein a ratio of the thickness of the amorphous silicon layer to the thickness of the aluminum metal layer is 3-5: 1.
4. The method as claimed in claim 3, wherein the thickness of the aluminum metal layer is between 90 nm and 110nm, the thickness of the aluminum metal oxide layer is between 30 nm and 50nm, and the thickness of the amorphous silicon layer is between 270 nm and 550 nm.
5. The method of claim 2, wherein the step of forming the polysilicon layer by laser irradiation of the inducing layer, the buffer layer and the amorphous silicon layer comprises:
performing laser irradiation on the amorphous silicon layer to enable silicon atoms in the amorphous silicon layer to diffuse into an aluminum metal layer and crystallize to form an aluminum-doped polycrystalline silicon layer, and enabling aluminum atoms in the aluminum metal layer to diffuse into the amorphous silicon layer to form an aluminum metal layer doped with silicon atoms; and
and etching away the aluminum metal layer doped with silicon atoms and the aluminum metal oxide layer.
6. The method of claim 5, wherein the silicon atom doped aluminum metal layer and aluminum metal oxide layer are etched using an acidic solution.
7. The method of claim 1, wherein a light-shielding layer is further formed on the substrate before the inducing layer is formed.
8. The method of claim 1, wherein the step of forming a polysilicon layer by laser irradiation of the inducing layer, the buffer layer and the amorphous silicon layer comprises:
placing a substrate base plate containing an inducing layer, a buffer layer and an amorphous silicon layer into an excimer laser reaction chamber:
the temperature of the excimer laser reaction chamber is controlled at 200-300 ℃, and the energy density is controlled at 300mJ/cm2(ii) a And
and irradiating the amorphous silicon layer by using laser with the temperature not more than 1000 ℃ to convert the amorphous silicon layer into a polycrystalline silicon layer.
9. A method for manufacturing an active switch is characterized by comprising the following steps:
sequentially forming a light shielding layer, an aluminum metal layer, an aluminum oxide layer and an amorphous silicon layer on the substrate;
inducing the amorphous silicon layer by laser, diffusing silicon atoms in the amorphous silicon layer into an aluminum metal layer and crystallizing to form an aluminum-doped polycrystalline silicon layer, and diffusing aluminum atoms in the aluminum metal layer into the amorphous silicon layer to form an aluminum metal layer doped with silicon atoms;
etching off the aluminum metal layer doped with silicon atoms and the aluminum oxide layer;
sequentially forming a gate insulating layer, a gate and an interlayer insulating layer on the aluminum-doped polycrystalline silicon layer; and
and forming a source electrode and a drain electrode on the interlayer insulating layer, wherein the source electrode and the drain electrode respectively penetrate through the interlayer insulating layer and the grid electrode insulating layer and are respectively connected to two ends of the aluminum-doped polycrystalline silicon layer.
10. A display panel comprising the active switch manufactured by the method of manufacturing an active switch according to any one of claims 1 to 9, and a pixel configured to display a picture, wherein the active switch controls the pixel to be turned on or off.
CN202011325568.2A 2020-11-24 2020-11-24 Manufacturing method of active switch and display panel Pending CN112563196A (en)

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Application publication date: 20210326