CN112334267B - 钎焊接合部 - Google Patents
钎焊接合部 Download PDFInfo
- Publication number
- CN112334267B CN112334267B CN202080003690.XA CN202080003690A CN112334267B CN 112334267 B CN112334267 B CN 112334267B CN 202080003690 A CN202080003690 A CN 202080003690A CN 112334267 B CN112334267 B CN 112334267B
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- layer
- solder
- mass
- joint
- plated layer
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
- B23K35/262—Sn as the principal constituent
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
- B23K1/0016—Brazing of electronic components
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/19—Soldering, e.g. brazing, or unsoldering taking account of the properties of the materials to be soldered
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/20—Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/001—Interlayers, transition pieces for metallurgical bonding of workpieces
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
- B23K35/302—Cu as the principal constituent
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- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
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- C22C13/02—Alloys based on tin with antimony or bismuth as the next major constituent
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- C22C19/03—Alloys based on nickel or cobalt based on nickel
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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- B23K2103/00—Materials to be soldered, welded or cut
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- B23K2103/12—Copper or alloys thereof
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
提供可靠性高的钎焊接合部。一种钎焊接合部,其包含:钎焊接合层,其是以Sn为主成分、且还包含Ag和/或Sb和/或Cu的软钎料熔融而得到的;和,被接合体,其在与前述钎焊接合层接触的表面上具备镀Ni‑P‑Cu层,前述镀Ni‑P‑Cu层以Ni为主成分,且包含0.5质量%以上且8质量%以下的Cu、和3质量%以上且10质量%以下的P,前述镀Ni‑P‑Cu层在与前述钎焊接合层的界面具有微晶层,前述微晶层具备:包含NiCuP三元合金的微晶的相、包含(Ni,Cu)3P的微晶的相、和包含Ni3P的微晶的相。
Description
技术领域
本发明涉及钎焊接合部。本发明涉及特别适合于半导体装置中的接合部的、高可靠性的钎焊接合部。
背景技术
近年来,作为应用于IGBT模块(功率模块)等半导体装置的软钎料,在目前已知的各种组成的无铅软钎料中,经常使用尤其在软钎料润湿性等接合性、机械特性、传热阻力等方面均衡性较好、且对制品也有实际效果的Sn-Ag系的无Pb软钎料。
出于节约能源、能源的有效使用的目的,市场上有进一步高水平的要求。例如,要求车载用的功率模块等小型化、轻量化。而且,输出功率密度变高(大电流化)、芯片附近温度变高,并且即使在超过100℃的高温下也使用,对高温恒时工作等的可靠性的要求不断提高。另外,由于对制品的安心、安全意识提高,因此要求在腐蚀气体环境中长寿命化。
已知有如下半导体装置的结构:在绝缘基板上进行了软钎料安装的半导体元件(IGBT:Insulated Gate Bipolar Transistor)的上面电极钎焊接合作为布线构件的兼有散热器的引线框,使半导体元件的产生热释放到引线框,并防止发热密度的集中(例如参照专利文献1)。
作为构成半导体装置的导电性构件,使用有导热性高的铜构件。对于这种铜构件,从耐腐蚀性的观点出发,已使用在其表面形成有镀镍-磷层的铜构件。另外,还已知有在钎焊接合部形成有化学镀镍-铜-磷覆膜的布线基板(例如参照专利文献2)。
现有技术文献
专利文献
专利文献1:日本特开2005-116702号公报
专利文献2:日本特开2001-313454号公报
发明内容
发明要解决的问题
被称为功率半导体的MOS(Metal Oxide Semiconductor)型、IGBT(InsulatedGate Bipolar Transistor)型的元件在工作时自身发热,成为高温度。重复发热与冷却的元件由软钎料接合,但由于元件的重复发热而对软钎料部重复施加应变而劣化。在高温下工作的半导体元件的接合中,优选使用散热性高的软钎料合金。特别是伴有发热的半导体中,为了减少热阻力所导致的损耗,大多采用铜(Cu)作为电连接材料。例如,已知有DCB(Direct Copper Bonding)基板的Cu板。
另一方面,硫(S)在通常环境中作为硫化气体等以几十ppb左右存在,在上下水道、处理瓦楞纸等的环境等中以几十ppm~几百ppm左右存在。这导致Cu腐蚀,Cu离子在相邻的电极间的绝缘物上移动。结果,产生使电极间的绝缘耐压降低、使电极间短路的迁移问题。而且,在硫化气体生成腐蚀物时,Cu变色为黑色,这也是作为制品外观不被用户喜欢的。
据说迁移有2个因素,在半导体中处理高电力的制品中也是由多个因素引起的。认为半导体装置在高温且高湿度的环境下使用。例如,由于硫化气体腐蚀,在模块的电极间发生迁移而电极间短路。因此,已经考虑采用比Cu更不易发生迁移的Ni。从量产性、均质性、耐腐蚀性的方面出发,为了形成Ni层而使用P浓度为22~12%的化学镀镍-磷(Ni-P)。
在这种背景下,例如,在将半导体元件与在铜板上镀有Ni-P的基板进行接合的情况下,由在高温下得到可靠性的Sn-Sb-Ag系软钎料与镀Ni-P层来接合的制品增多。此时,软钎料熔融中(接合时)镀层的Ni向作为接合体的软钎料溶出,并且在软钎料与镀Ni-P层的界面生成脆性的P的富集相(P富集层)。该P富集层中包含大量的孔等缺陷,很脆弱,因此,在软钎焊层与NiP层界面处发生剥离的现象,从而有接合体的可靠性降低的担心。在接合时会产生P富集相,在高温下工作的制品中,P富集层因热而生长,脆性层扩大。而且缺陷也会增加,使可靠性降低。
特别是,功率模块等中,由于为热容量大的构件的接合,因此,使用软钎料熔融温度高、接合时间也长的接合工序。如图8的照片,膜厚5μm的镀Ni-8%P层与Sn-Sb系软钎料接合时,Ni在软钎料中溶出,引起在镀Ni-P层中产生直径为0.1μm以上的孔隙(缺陷)的问题。为了调整接合时间与Ni溶出量,例如如果设为10μm以上的镀层厚度,则也可以防止在接合中Ni溶出并与Sn形成化合物,残留镀Ni-P层。然而,溶出了的部分会发生孔隙(缺陷),因此,可靠性变低。照片为在300℃下保持1.5分钟以上并进行钎焊接合的例子。由透射型电子显微镜(TEM:Transmission Electron Microscope)图像可知此时镀膜以柱状结晶。因此,认为Ni容易溶出。另外,钎焊接合部由于驱动制品时的电流施加而发热,并且该发热会引起热扩散。因此,例如,有时在软钎料与被接合体之间产生的金属间化合物的晶体生长并粗大化、或柱状化、或层的厚度变厚。由于该热扩散的不同种材料界面的变化也有使接合强度改善的情况。然而,如果扩散过度推进而成为100nm以上大小的晶粒,则认为可能有强度降低等的劣化。特别是认为具有大的比表面积的柱状的晶体在热扩散中也容易扩散。
本发明人等进行了深入研究,结果发现:使用在与软钎料接触的面上具备具有特定组成的镀Ni-P-Cu层而不是镀Ni-P的被接合体,与具有特定组成的软钎料组合而形成接合层,从而可以形成可靠性高的接合部,至此完成了本发明。
[1]根据一实施方式,本发明涉及一种钎焊接合部,其包含:钎焊接合层,其是以Sn为主成分、且还包含Ag和/或Sb和/或Cu的软钎料熔融而得到的;和,被接合体,其在与前述钎焊接合层接触的表面上具备镀Ni-P-Cu层,前述镀Ni-P-Cu层以Ni为主成分、且包含0.5质量%以上且8质量%以下的Cu、和3质量%以上且10质量%以下的P,前述镀Ni-P-Cu层在与前述钎焊接合层的界面具有微晶层,前述微晶层具备:包含NiCuP三元合金的微晶的相、包含(Ni,Cu)3P的微晶的相、和包含Ni3P的微晶的相。
[2]前述[1]所述的钎焊接合部中,优选前述NiCuP三元合金的微晶包含平均粒径为约10nm以下的微晶。
[3]前述[1]或[2]所述的钎焊接合部中,优选前述微晶层不含长径为75nm以上的柱状晶体或颗粒。
[4]前述[1]~[3]中的任一项所述的钎焊接合部中,优选前述软钎料包含Sn、Ag和Sb。
[5]前述[4]所述的钎焊接合部中,优选前述软钎料还含有Ni和/或Ge和/或Cu。
[6]前述[1]~[5]中的任一项所述的钎焊接合部中,优选具备前述镀Ni-P-Cu层的被接合体为在以Cu、Al或Cu合金为主成分的母材上设有化学镀Ni-P-Cu层的构件。
[7]根据另一实施方式,本发明涉及一种电子设备,其具备前述[1]~[5]中的任一项所述的钎焊接合部。
[8]根据另一实施方式,本发明还涉及一种半导体装置,其具备前述[1]~[5]中的任一项所述的钎焊接合部。
[9]前述[8]所述的半导体装置中,优选前述钎焊接合部为基板电极、引线框或插销与半导体元件的接合部、导电性板与散热板的接合部、和/或端子间的接合部。
[10]前述[9]所述的半导体装置中,优选前述半导体元件为Si半导体元件或SiC半导体元件。
发明的效果
本发明的钎焊接合部非常不易发生以往随时间推移在接合部中产生的缺陷,因此,制品寿命改善。因此,可以适合用于需求越发提高的大电流规格的电子设备,特别是可以适合用于半导体装置中的端子间的接合、其他构件的接合等广泛的半导体装置用途。
附图说明
图1为示意性示出本发明的钎焊接合部的概念图。
图2为示意性示出具备本发明的钎焊接合部的半导体装置的一例的概念图。
图3为示意性示出现有技术的钎焊接合部的概念图。
图4为实施例8的钎焊接合部的基于扫描型电子显微镜的截面照片。
图5为比较例4的钎焊接合部的基于扫描型电子显微镜的截面照片。
图6为实施例8的钎焊接合部的截面的透射型显微镜照片。
图7为图6的放大照片。
图8为比较例4的钎焊接合部的截面的透射型显微镜照片。
图9为图8的放大照片。
具体实施方式
以下,参照附图对本发明的实施方式进行说明。但是,本发明不受以下说明的实施方式的限定。本说明书整体中,将A、B、C、D设为金属元素、a、b设为整数的情况下,以(A,B)a(C,D)b特定的金属间化合物是指,包含在AaCb化合物中,A的一部分被B置换、C的一部分被D置换而得到的、多个金属间化合物混合的形态。另外,上述情况下,在括号内上述记载的元素A的存在比率多于之后记载的B的存在比率,同样地,C的存在比率多于D的存在比率。另外,本说明书中,钎焊接合层是指,软钎料被熔融而与被接合体接合的状态。另外,钎焊接合部是包含钎焊接合层和被接合体的概念。被接合体是指,与钎焊接合层的各面接触并由钎焊接合层接合的各构件。
[第1实施方式:钎焊接合部]
根据第1实施方式,本发明为一种钎焊接合部,其包含:钎焊接合层,其是以Sn为主成分、且还包含Ag或Sb的软钎料熔融而得到的;和,被接合体,其在与前述钎焊接合层接触的表面上具备镀Ni-P-Cu层。接合部的前述镀Ni-P-Cu层在与前述钎焊接合层的界面具有微晶层,前述微晶层具备:包含NiCuP三元合金的微晶的相、包含(Ni,Cu)3P的微晶的相、和包含Ni3P的微晶的相。
(被接合体)
构成本实施方式的接合部的被接合体为在与钎焊接合层接触的面上具备镀Ni-P-Cu层的构件。具备镀Ni-P-Cu层的构件可以为在导电性构件上形成有镀Ni-P-Cu层的构件。作为导电性构件,可以举出:以Cu、Al、Cu合金(例如Cu-Sn合金、Cu-Zn合金)为主成分的构件,但不限定于这些。
镀Ni-P-Cu层是以Ni为主成分、且以规定的量包含P以及Cu的化学镀层。镀Ni-P-Cu层中的Cu的含量为0.5质量%以上且8质量%以下。如果设为低于0.5质量%,则抑制Ni的扩散的Cu的置换量不足,无法得到钎焊接合时和使用制品时的发热所产生的热扩散的抑制效果。Cu量如果多于8质量%,则Cu比Ni还容易氧化,因此,钎焊接合性降低、在腐蚀气体等中的耐腐蚀性降低。Cu的含量优选2.0质量%以上且4质量%以下。伴有发热的钎焊接合中,软钎料的接合性(润湿性)良好也是重要的特性,如果考虑软钎料润湿性不降低、且氧化、腐蚀的性能不降低的方面,则作为以能形成后述的NiCuP三元合金的微细的晶体的范围内,其他特性不降低的范围,期望上述Cu的添加量。
镀Ni-P-Cu层中的P的含量为3质量%以上且10质量%以下。如果设为低于3质量%,则变得容易生成可能成为缺陷的原因的Ni的柱状结构。另外,如果超过10质量%,则NiP化合物析出,成为晶态的膜,Ni变得容易溶出至钎焊接合层,故不优选。优选P的含量为4质量%以上且6质量%以下。在该范围内,与软钎料接合时,也不易生成Ni的柱状结构,可以抑制之后详述的P富集层、缺陷。另外,润湿性也良好。需要说明的是,通常,在镀层的析出速度慢的镀Ni层中,通过添加作为催化剂的P,可以高速地进行镀覆。更具体而言,为了使Ni还原析出时使用磷酸作为还原剂,P进入至Ni膜中。据说在现有技术的通常镀Ni-P层中,以P浓度为10质量%左右形成混合有Ni3P化合物与Ni与P的镀层,但是在镀覆中Ni3P化合物析出,使润湿性降低。因此,在用作钎焊接合用的表面处理材料的以往的通常镀Ni-P层中,设为Ni3P化合物在镀覆中不会析出的P浓度,通常设为6~8质量%。然而,本实施方式中,在与以下详述的软钎料组合使用的情况下,P浓度设为8质量%以下时润湿性改善,进一步通过设为6质量%以下,可以改善润湿性。
镀Ni-P-Cu层中的余量实质上为Ni。通过以Ni为主成分且以上述规定量包含Cu和P,在形成钎焊接合层的情况下,可以抑制镀Ni-P-Cu层与软钎料中所含的Sn反应、生成的NiSn化合物的生成。亦即,可以抑制镀层中的Ni与软钎料中的Sn过剩地反应、镀层中的Ni溶出,形成Ni浓度低的层、换言之P浓度高的层。进而,可以降低孔隙(缺陷)。需要说明的是,镀Ni-P-Cu层中,除Ni、P、Cu以外有时还包含作为催化剂金属盐等源自添加剂的不可避免的杂质的Fe、Au、Ag、Pd、Bi、Pb、In元素。需要说明的是,在本发明的组成范围内,镀Ni-P-Cu层为非晶状态,即使进行X射线衍射分析,也无Ni3P等合金的峰,是宽波形。
镀Ni-P-Cu层的厚度没有特别限定,例如可以为1~10μm左右,优选设为2~5μm左右。
形成有镀Ni-P-Cu层的被镀母材只要为导电性构件就没有特别限定。典型地,可以为以Cu、Al、或Cu-Sn、Cu-Zn等Cu合金为主成分的构件。另外,被镀母材只要在接合面设有镀Ni-P-Cu层即可,对其形状等没有特别限定。
在母材上形成镀Ni-P-Cu层的形成方法没有特别限定,可以通过通常的化学镀方法进行。作为能形成镀Ni-P-Cu层的镀浴的组成,没有特别限定,可以使用包含镍盐、铜盐、次磷酸盐和络合剂的通常的镀浴的组成。进一步具体而言,使用包含硫酸镍、硫酸铜、次磷酸钠、柠檬酸钠、且能形成本发明的期望的范围的组成的镀膜的镀浴。另外,作为被镀母材的前处理,可以利用酸处理、锌酸盐处理(锌析出)、使Pd、Pt等催化剂附着的处理。
钎焊接合层位于二个以上的被接合体之间、将二个以上的被接合体间接合而形成接合部的情况下,只要至少一个被接合体为具备镀Ni-P-Cu层的被接合体即可。另一个被接合体可以为具备镀Ni-P-Cu层的被接合体,也可以为其他被接合体。作为其他被接合体,可以适宜选择适于包含接合部的制品的目的、且在该制品中不被成为问题的发热和由其产生的热应力而破坏的构件,例如可以举出Cu、Ni、Ag、Au、或包含它们的合金等,但不限定于这些。
(软钎料)
本实施方式的钎焊接合部中,作为熔融而形成钎焊接合层的软钎料,可以使用:以Sn为主成分、且包含Ag和/或Sb和/或Cu的软钎料。优选使用在这些成分的基础上,还包含选自Ni、Ge、Si、V、P、Bi、Au、Pb、Al、C中的1种以上的成分的软钎料。被称为无铅软钎料的、Pb为500ppm以下、且以Sn为主成分的软钎料中,有Sn-Ag、Sn-Ag-Cu、Sn-Sb、Sn-Sb-Ag等2元共晶系材料、3元共晶系材料等大量成分。分别有:对Sn以析出物使材料强度强化的析出强化系的Sn-Ag系材料、以固溶至Sn中的Sb、Bi等使材料强度强化的固溶强化系的材料。均具有:以物理形状强化的元素、固溶至Sn中、形成晶体结构能强化的元素。而且,还有:将其各自组合、能进行析出强化和固溶强化的组合。对Sn中的添加元素可以分别期待如下效果:使凝固组织致密、抑制热扩散所导致的组织的热变形。本发明中有用软钎料例如为Sn-Ag、Sn-Sb、Sn-Ag-Sb、Sn-Ag-Cu、Sn-Sb-Ag-Ni、Sn-Sb-Ag-Cu、Sn-Sb-Ag-Ni-Ge、Sn-Sb-Ag-Ni-Cu-Ge、Sn-Ag-Cu-Ni、Sn-Ag-Cu-Ge、Sn-Ag-Cu-Ni-Ge软钎料。需要说明的是,本说明书中,将E、F、G分别作为元素,表示为“E-F-G软钎料”时,是指,包含E、F和G、且任选包含不可避免的杂质的软钎料,元素的组成比没有特别限定。以下,更具体地对能优选使用的软钎料的方式进行说明。
(第1方式:Sn-Ag-Sb)
作为第1方式的Sn-Ag-Sb软钎料,可以优选使用:含有超过5.0质量%且10.0质量%以下的Sb、和2.0质量%~4.0质量%的Ag、余量由Sn和不可避免的杂质组成的合金。不可避免的杂质主要是指,Cu、Ni、Zn、Fe、Al、As、Cd、Au、In、P、Pb等。本发明的软钎料是Pb为500ppm以下的无铅软钎料合金。通过在以Sn为主成分的软钎料中以上述组成范围包含Ag和Sb,从而可以确保软钎料的润湿性,温度即使上升也可以抑制合金的导热率的降低。Sn-Ag-Sb软钎料进一步优选含有6.0质量%~8.0质量%的Sb、且含有3.0质量%~4.0质量%的Ag,余量由Sn和不可避免的杂质组成。通过设为这种组成范围,从而在上述优点的基础上,进一步随着温度的上升还可以使合金的导热率上升。需要说明的是,Ag不易与Ni、Cu、P反应,在镀Ni-Cu-P层与软钎焊层的界面不形成化合物,因此,不会引起P富集层、孔隙、晶体的粗大化等不良影响,具有利用Ag3Sn等合金改善软钎料本身的强度的效果。以下的第2方式~第6方式中也同样。
(第2方式:Sn-Sb-Ag-Ni)
作为第2方式的Sn-Sb-Ag-Ni软钎料,可以优选使用:含有超过5.0质量%且10.0质量%以下的Sb、2.0质量%~4.0质量%的Ag、超过0且1.0质量%以下的Ni、余量由Sn和不可避免的杂质组成的合金。作为在第1方式的组成中进一步以上述添加范围添加Ni的优点,这是由于,对合金的热扩散路径产生影响,使合金的导热率上升,且改善润湿性,形成接合层时可以实现低的空隙率。进一步优选含有6.0质量%~8.0质量%的Sb、含有3.0质量%~4.0质量%的Ag、含有0.01质量%~0.5质量%的Ni、余量由Sn和不可避免的杂质组成。通过设为这种组成范围,从而在上述的基础上,进一步还可以得到可以降低至软钎料的熔点260℃以下的优点。
(第3方式:Sn-Sb-Ag-Cu)
作为第3方式的Sn-Sb-Ag-Cu软钎料,可以优选使用:含有超过5.0质量%且10.0质量%以下的Sb、2.0质量%~4.0质量%的Ag、超过0且为1.2质量%以下的Cu、余量由Sn和不可避免的杂质组成的合金。作为在第1实施方式的组成中进一步添加Cu的优点,这是由于,对合金的热扩散路径产生影响,使合金的导热率上升,且改善润湿性,形成接合层时可以实现低的空隙率。进一步优选含有6.0质量%~8.0质量%的Sb、含有3.0质量%~4.0质量%的Ag、含有0.1质量%~0.9质量%的Cu、余量由Sn和不可避免的杂质组成。通过设为这种组成范围,从而在上述的基础上,进一步可以得到润湿性特别良好的优点。
(第4方式:Sn-Sb-Ag-Ni-Ge)
作为第4方式的Sn-Sb-Ag-Ni-Ge软钎料,可以优选使用:含有超过5.0质量%且为10.0质量%以下的Sb、2.0质量%~4.0质量%的Ag、超过0且为1.0质量%以下的Ni、含有0.001质量%~2.0质量%的Ge、余量由Sn和不可避免的杂质组成的合金。作为在第2方式的组成中进一步以上述添加范围添加Ge的优点,这是由于,对合金的热扩散路径产生影响,使合金的导热率上升,且改善润湿性,形成接合层时可以实现低的空隙率。进一步优选含有6.0质量%~8.0质量%的Sb、含有3.0质量%~4.0质量%的Ag、含有0.01质量%~0.5质量%的Ni、含有0.003质量%~0.01质量%的Ge、余量由Sn和不可避免的杂质组成。通过设为这种组成范围,从而在上述的基础上,进一步可以得到可以降低至软钎料的熔点260℃以下的优点。
(第5方式:Sn-Sb-Ag-Ni-Cu-Ge)
作为第5方式的Sn-Sb-Ag-Ni-Cu-Ge软钎料,可以优选使用:含有超过5.0质量%且为10.0质量%以下的Sb、2.0质量%~4.0质量%的Ag、超过0且为1.0质量%以下的Ni、超过0且为1.2质量%以下的Cu、0.001质量%~2.0质量%的Ge、余量由Sn和不可避免的杂质组成的合金。作为在第5方式的组成中进一步以上述添加范围添加Cu的优点,这是由于,对合金的热扩散路径产生影响,使合金的导热率上升,且改善润湿性,形成接合层时可以实现低的空隙率。进一步优选含有6.0质量%~8.0质量%的Sb、含有3.0质量%~4.0质量%的Ag、含有0.01质量%~0.5质量%的Ni、含有0.1质量%~0.9质量%的Cu、含有0.003质量%~0.01质量%的Ge、余量由Sn和不可避免的杂质组成。通过设为这种组成范围,从而在上述基础上,可以得到进一步可以降低至软钎料的熔点260℃以下的优点。
(第6方式:Sn-Ag-Cu)
作为第6方式的Sn-Ag-Cu软钎料,可以优选使用:含有2.0质量%~4.0质量%的Ag、0.1质量%~2质量%的Cu、余量由Sn和不可避免的杂质组成的合金。作为第6方式的优点,可以使软钎料的熔点低温化,还可以改善润湿性。进一步优选含有3.0质量%~4.0质量%的Ag、含有0.5质量%~0.9质量%的Cu、余量由Sn和不可避免的杂质组成。作为本方式的变形方式,可以举出在它们中进一步添加有Ni和/或Ge的、Sn-Ag-Cu-Ni软钎料、Sn-Ag-Cu-Ge软钎料、Sn-Ag-Cu-Ni-Ge软钎料。这些组成中,在Sn、Ag、Cu的基础上,可以含有0.02质量%~0.1质量%、优选0.03质量%~0.06质量%的Ni、和/或含有0.001质量%~2质量%、优选0.003质量%~0.01质量%的Ge。
(变形方式)
作为变形方式,第1~第6方式的软钎料均可以进一步添加Ge、P、或者这些两者。这是由于,Ge可以对合金的热扩散路径产生影响,而且Ge和P均具有软钎料的氧化抑制的效果,还可以有利于改善润湿性。上述情况下,软钎料优选含有0.001质量%~2.0质量%的Ge。或者,或在这些基础上,优选含有0.001质量%~0.1质量%的P。添加Ge、P这两者的情况下,也可以从上述范围中适宜选择添加量。Ge和P这两者均比Sn还容易氧化,以该添加范围可以防止Sn的氧化,可以确保软钎料的润湿性。需要说明的是,第4、第5方式和第6方式的变形方式中已经记载了Ge的添加以及其适合的添加量,因此,这些方式中也可以设为各方式中记载的Ge的添加量。另外,从第1~第6方式、和这些变形方式的软钎料的各组成中排除了Ag的组成也可以形成变形方式。
本发明中的软钎料的上述第1~第6方式和它们的变形方式均可以通过依据通常的方法,将Sn、Ag和/或Sb和/或Cu、和选自任意选择性添加元素中的各原料、或者包含各原料的母合金在电炉中熔解,从而制备。各原料优选使用纯度为99.99质量%以上的原料。
另外,第1~第6实施方式和它们的变形方式的软钎料可以作为板状的预成型坯材料(板状软钎料)使用,或者形成粉末状并与助焊剂一起作为焊膏使用。加工成粉末状并与助焊剂一起形成焊膏的情况下,作为软钎料粉末的粒径,优选粒径分布处于10~100μm的范围、进一步优选处于20~50μm的范围。对于平均粒径,例如在使用一般的激光衍射/散射式粒度分布测定装置测定的情况下,可以设为25~50μm。作为具有去除氧化膜的净化作用等的助焊剂,可以使用任意的助焊剂,可以特别优选使用松香系助焊剂。
钎焊接合层的形成中使用的软钎料的厚度、形状等可以根据目的和用途由本领域技术人员适宜设定,没有特别限定。作为一例,钎焊接合层的厚度可以设为约200~300μm左右,但不限定于该范围。接合部的形成如下进行:在被接合材的镀膜表面配置软钎料,并在规定的温度下进行加热。由此,构成镀膜的Ni等瞬时(几ms~几十ms)地扩散至熔融了的软钎焊层,形成合金层而进行接合。第1~第6实施方式和它们的变形方式的软钎料的情况下,使被接合构件彼此借助焊膏、软钎料粒料(板状软钎料)接触后,在作为接合温度的加热峰温度比软钎料的液相线温度(熔点)高20~50℃左右的温度、例如250℃以上且350℃以下左右的温度下,保持0.5分钟以上且30分钟以下左右、优选1分钟以上且5分钟以下左右并进行热处理。接合气氛可以设为氮气气氛,或也可以在氢、甲酸等活性气氛中进行接合。使用板状软钎料的情况下,特别优选使用具有还原作用的氢、甲酸等气体。在这些具有还原作用的活性气体气氛中进行接合的情况下,该气体优选设为将氧化物有效地还原的温度、例如250~280℃。实际的接合中,为了进行具有几℃以上的温度分布的接合,确保某个恒定以上的温度和时间,从而可以得到稳定的接合品质。之后,以规定的降温速度进行冷却,从而使熔融了的软钎料固化,形成钎焊接合层。该热处理的升温速度为1℃/秒左右,降温速度优选5℃/秒以上、更优选8℃/秒以上且15℃/秒以下。以往的接合方法中,用于形成钎焊接合层的热处理的降温速度为1℃/秒,但上述情况下,镀层中的微细晶体变得容易粗大化,通过设为上述降温速度范围,从而变得容易形成具有规定的构成的钎焊接合层。
(界面组织)
将上述被接合材与软钎料组合并使软钎料熔融而形成的接合部在镀Ni-P-Cu层的、与钎焊接合层的界面具备微晶层。图1为示意性示出本实施方式的钎焊接合部的概念图,图1的(a)为刚刚接合后的钎焊接合部的示意图,图1的(b)为接合后、以175℃进行了250小时处理后的钎焊接合部的示意图。
如果参照图1的(a),则依次形成有母材层6、镀Ni-P-Cu层5、微晶层1、第1金属间化合物层2、第2金属间化合物层3、软钎焊层4。其中,镀Ni-P-Cu层5、微晶层1源自被接合体的镀Ni-P-Cu层。母材层6为被镀母材,使用有铜、铜合金、铝、铝合金等。第1金属间化合物层2为(Ni,Cu)3(Sn,Sb)2层或Ni3(Sn,Sb)2的金属间化合物析出了的层,是镀层的Ni、Cu溶出、与软钎料的Sn等反应而形成的层。另外,第2金属间化合物层3为(Ni,Cu)3(Sn,Sb)4层或Ni3(Sn,Sb)4的金属间化合物析出了的层,同样地是镀层的Ni、Cu溶出、与软钎料的Sn等反应而形成的层。软钎焊层4源自软钎料。需要说明的是,图1为示意性的概念图,各层的厚度、它们的相对厚度的关系不限定本发明。特别是,第2金属间化合物层3和镀Ni-P-Cu层5比微晶层1具有更大的厚度,因此,标注省略线表示。镀Ni-P-Cu层5是维持钎焊接合前的初始的组成和结构的层。虽然未作图示,但在微晶层1与镀Ni-P-Cu层5之间存在有过渡层。过渡层为包含有原子缺陷的Ni、NiP的层。
对各层进行说明。母材层6、镀Ni-P-Cu层5源自上述被接合体,是与软钎料熔融前(形成接合层前)基本无变化的层。这些层可以通过基于扫描型电子显微镜(SEM)的钎焊接合部的截面照片观察、和元素分析、例如EDX(Energy dispersive X-ray spectrometry)点分析和映射分析而特定。需要说明的是,钎焊接合部的截面是指,垂直于钎焊接合层与被接合材的界面的截面。
微晶层1是形成于镀Ni-P-Cu层的、与钎焊接合层的界面的层。需要说明的是,镀Ni-P-Cu层的、与钎焊接合层的界面是指,接合前的软钎料与被接合体的界面,但图1中,基本为微晶层1与第1金属间化合物层2的界面。具体而言,形成软钎料与源自被接合体的镀Ni-P-Cu层的元素混合的层,但关于图1,镀Ni-P-Cu层的Ni等扩散而形成第1金属间化合物层2和第2金属间化合物层3。微晶层1是金属间化合物的晶粒散在于非晶层中的层。微晶层1的存在也可以通过基于扫描型电子显微镜的钎焊接合部的截面照片观察、和元素分析、例如EDX点分析和映射分析而特定。如果更详细地分析微晶层1,则共存有(1)包含(Ni,Cu)3P的微晶的相、(2)包含Ni3P的微晶的相、和(3)NiCuP三元合金的相,且除(1)、(2)以外的包含微晶的相的三相。图1中未具体示出这些三相。这些相可以通过基于透射型电子显微镜的晶体观察和元素分析而特定。如此,微晶层1中大致形成有三个相,各自的相的微晶的主要组成不同。这些微晶层1中所含的Cu源自被接合体的镀Ni-P-Cu层。软钎料的组成中包含Cu的情况下和不包含Cu的情况下,均对微晶层1的组成、化合物的量无实质影响。
(1)包含(Ni,Cu)3P的微晶的相包含(Ni,Cu)3P化合物的微晶,该(Ni,Cu)3P化合物可以通过元素分析而特定。(Ni,Cu)3P的微晶的晶粒的粒径为5~20nm左右且平均粒径为约10nm以下。约10nm以下的微晶可以由以扫描透射型电子显微镜(STEM:ScanningTransmission Electron Microscope)观察得到的图像根据对比度的差异而确认。可以以通常的透射电显电子显微镜(TEM)实现,但STEM图像中,可以得到更高的对比度,因此,对纳米水平的晶体的确认是有效的。STEM观察中,检测透过薄膜试样的电子束而得到者,可以得到全部散射吸收对比度、衍射对比度、相位对比度等以TEM得到的对比度,也可以由任意对比度特定该晶粒。(Ni,Cu)3P微晶的平均粒径是指,将利用透射型电子显微镜以80000倍观察时的每0.36μm2观察视野中的(Ni,Cu)3P微晶的颗粒的长径通过图像处理平均而得到的值。
(2)包含Ni3P的微晶的相包含Ni3P化合物的微晶。该化合物可以通过元素分析而特定。Ni3P的晶粒的粒径为5~20nm左右且平均粒径为约10nm以下。Ni3P微晶的特定方法和Ni3P微晶的平均粒径的测定方法与上述同样。
(3)包含NiCuP三元合金的微晶的相包含除(Ni,Cu)3P、Ni3P以外的组成为主体的晶粒,具体而言,包含(Ni,Cu)2P5、Ni2P5、Cu2P5、(Ni,Cu)12P5、Ni12P5、Cu12P5、(Ni,Cu)2P、Ni2P、Cu2P、Cu3P的微晶。该相包含晶粒径为5~20nm左右且平均粒径为约10nm以下的微晶。该NiCuP三元合金的颗粒可以通过STEM观察、TEM观察而特定。另外,该微晶为NiCuP三元合金时,可以通过在TEM观察试样中进行EDX分析而特定。需要说明的是,NiCuP三元合金的微晶颗粒的平均粒径是指,将利用透射型电子显微镜以80000倍观察时的每0.36μm2观察视野中的NiCuP三元合金的微晶颗粒的长径通过图像处理平均而得到的值。
对使用STEM以80000倍观察时的每0.09μm2(0.3μm×0.3μm)观察视野中的各微晶进行组成分析,如果分为(1)、(2)、(3)这3个相,则(1)(Ni,Cu)3P的微晶与(2)Ni3P的微晶总计为50%以上且低于80%。该百分率是(1)的微晶数与(2)的微晶数之和相对于观察视野内的微晶的总数所占的比率。
微晶层1中,基本不存在直径或长径超过75nm的颗粒的晶体。这可以通过基于扫描型电子显微镜的钎焊接合部的截面照片观察、基于透射型电子显微镜的晶体观察而确认。被接合体上所形成的镀Ni-P-Cu层如上述为1~10μm左右的范围的厚度的情况下,无论其厚度,微晶层1的厚度均为0.5~1.5μm左右,作为一例,为0.8~1.2μm左右。本实施方式的接合部中,微晶层1中的长径为10nm以上的孔隙的数量在接合部截面的每观察视野中为50个以下,优选为25个以下。该数值是利用透射型显微镜以80000倍观察接合部的微晶层1的截面时计数每0.36μm2观察视野中的孔隙时的数。
微晶层1中的、NiCuP三元合金的微晶颗粒的大小根据被接合体上所形成的镀Ni-P-Cu层中的Cu浓度而不同。例如,Cu浓度为0.5质量%~1质量%时,颗粒直径大致为50nm以下,Cu浓度为1%~3%时,成为颗粒直径大致为20nm以下的均匀的晶体,结晶被抑制而优选。另外,Cu浓度为3质量%~8质量%时,颗粒直径变得更小,成为微细的组织。需要说明的是,此处所谓直径是指,基于STEM图像的、观察接合部的截面照片而得到的、微晶颗粒的直径。20nm以下的微细结晶的平均粒径大致为15nm左右,其每单位体积mm3的表面积成为3540000mm2。与此相对,10~200nm的颗粒混合存在时的平均粒径大致为105nm左右,每单位体积mm3的表面积成为50571mm2。对于热所产生的相互扩散成为支配性的晶粒的晶界扩散的面积,晶体越小者,扩散所需的距离越变大,比表面积越大,从外部负荷相同的能源时的扩散量越变小。因此,在镀Ni-P层与钎焊接合部的界面处产生的孔可以被具有扩散距离大的微细的晶体的组织所抑制。
图1的(b)涉及在175℃下进行了250小时的处理的、加热后的钎焊接合层。需要说明的是,该加热处理为用于评价半导体装置等的可靠性的加速试验。本实施方式的钎焊接合层在加热后也基本无变化。特别是,未见微晶层1的晶体的生长、缺陷的生成、微晶层1的厚度的实质性的变化。另外,第1金属间化合物层2、第2金属间化合物层3也基本无变化。进一步,在175℃下进行了3000小时的处理后,也观察不到使用场发射型扫描电子显微镜(FE-SEM)、以10000倍观察时的每4.6μm2观察视野中的0.5μm以上的孔隙。
通过使用本实施方式的具备具有特定组成的镀Ni-P-Cu层的被接合体形成接合部,源自被接合体的镀Ni-P-Cu层的微晶层中,由于微晶的存在而扩散大的晶界的取向变得无规。由此,Ni的扩散的方向不对齐,并且Ni向钎焊接合层扩散的扩散速度变慢。因此,可以防止Ni对钎焊接合层的溶出和伴有其的界面处的脆化、缺陷,可以提供长期可靠性高的钎焊接合部。
图3为示意性示出现有技术的钎焊接合部的概念图。现有技术的钎焊接合部包含:钎焊接合层,其是以Sn为主成分、且还包含Ag和/或Sb和/或Cu的软钎料熔融而得到的;和,被接合体,其在与前述钎焊接合层接触的面上具备镀Ni-P层。图3的(a)为刚刚接合后的钎焊接合层的示意图,图3的(b)为在接合后、以175℃进行了250小时处理后的钎焊接合层的示意图。在现有技术的钎焊接合部,镀Ni-P层在与钎焊接合层的界面处不含微晶层,包含磷富集层(P富集层)。
如果参照图3的(a),则依次形成有母材层106、镀Ni-P层105、P富集层101、作为第1金属间化合物层102的Ni3(Sn,Sb)2层、作为第2金属间化合物层103的Ni3(Sn,Sb)4层、软钎焊层104。其中,镀Ni-P层105、P富集层101源自被接合体的镀Ni-P层,母材层106为被镀母材。作为第1金属间化合物层102的Ni3(Sn,Sb)2层、作为第2金属间化合物层103的Ni3(Sn,Sb)4层是镀层的Ni溶出、与软钎料的Sn等反应而形成的层,它们和软钎焊层104源自接合前的软钎料。需要说明的是,图3也是示意性的概念图,且各层的厚度的相对关系不限定本发明。特别是,第2金属间化合物层103和镀Ni-P层105具有比P富集层101还大的厚度,因此,标注省略线而表示。
在现有技术的钎焊接合部,形成有母材层106、镀Ni-P层105、第1金属间化合物层102、第2金属间化合物层103和软钎焊层104。镀Ni-P层105不含Cu,因此,第1金属间化合物层102、第2金属间化合物层103的组成不同于图1所示的本发明的实施方式的第1金属间化合物层2、第2金属间化合物层3的组成。而且,本发明的实施方式的、用Cu置换的第1金属间化合物层2、第2金属间化合物层3的特性与不含Cu的第1金属间化合物层102、第2金属间化合物层103相比,具有稳定、且不易生长的特性。
P富集层101的组织形态大幅不同于图1所示的本发明的实施方式的微晶层1。如果参照图3的(a),则在接合初始的接合部,与第1金属间化合物层102的界面附近的P富集层101a中,源自Ni向软钎料侧扩散而存在有大量的孔隙h,成为密度降低(粗糙化)的层。需要说明的是,如图5所示,如果通过扫描型电子显微镜观察P富集层101a的孔隙h,则孔隙h凹陷且观察到黑色。另外,如图8所示,基于透射型电子显微镜的观察时,观察到连续的孔隙呈白色部。图3中,孔隙h示意性地以黑填充而成的椭圆表示。另外,图3中,P富集层101a包括多个白色椭圆表示的稍柱状晶的包含P的Ni的颗粒。此处,稍柱状晶是指,其截面成为大致椭圆形的颗粒,图3所示的方式中,可以是指,其截面成为长径相对于各层朝向大致垂直方向的椭圆形的颗粒。在靠近与镀Ni-P层105的界面的P富集层101b中存在有包含P的Ni的粗大的柱状晶。该柱状晶的长径大致为75nm~200nm左右,以与镀Ni-P层105的界面附近为基端而生成。在P富集层101b与镀Ni-P层105之间附近处,存在有未作图示的、有原子缺陷的包含Ni、NiP的层的过渡层,将在与第1金属间化合物层102的界面附近的P富集层101a、与靠近镀Ni-P层105的界面的P富集层101b、和过渡层一并称为P富集层101。
如果参照示意性示出加热后的接合部的图3的(b),则母材层106、镀Ni-P层105、第1金属间化合物层102、第2金属间化合物层103和软钎焊层104与接合初始基本无变化。然而,与第1金属间化合物层102的界面附近的P富集层101c与接合初始的P富集层101a相比,更低密度区域增加,粗糙化推进(粗糙化的详细情况未作图示)。另外,在靠近与镀Ni-P层105的界面的P富集层101d中,结晶推进,柱状晶进展,柱状晶的长径粗大化至大致75nm~500nm左右。
镀Ni-P层中,扩散大的晶界的方向通过界面附近的柱状晶化而对齐。由此,扩散方向沿上下方向极大化,Ni向软钎料方向扩散的扩散速度增大,推定通过扫描型电子显微镜进行观察时形成可见呈白色的低密度区域。该柱状晶特别是剪切力较弱,因此认为在第1金属间化合物层102与镀Ni-P层105界面附近处,脆化推进。
图3所示的P富集层101中可见大量的孔隙,但图1所示的本发明的微晶层1中基本观察不到孔隙。具体而言,对于175℃×250小时热处理了的钎焊接合部,对于镀Ni-P层的P富集层与镀Ni-P-Cu层的微晶层,比较利用透射型电子显微镜以80000倍观察时的每0.36μm2观察视野中产生的10nm以上的孔的个数,结果确认了与镀Ni-P层相比,镀Ni-P-Cu层的孔发生数被抑制为1/5左右。亦即,在界面中也存在有能由TEM观察到的微小的孔隙,但本发明的镀Ni-Cu-P层中即使进行加热处理,微小孔隙也不增加而被抑制。进一步,在175℃下进行了3000小时的处理后,利用FE-SEM以10000倍观察时的每4.6μm2观察视野中的0.5μm以上的孔隙观察到5~20个左右。
接着,对第1实施方式的钎焊接合部的制造方法进行说明。第1实施方式的钎焊接合部的制造方法包括如下工序:第1工序,对母材金属实施Ni-P-Cu化学镀,制作被接合体;第2工序,使前述被接合体的实施了前述镀覆的面与软钎料接触;和,第3工序,将前述被接合体和前述软钎料进行加热。第1工序中,通过上述详述的方法,以本实施方式中说明的规定的浓度,在母材金属上形成包含P和Cu的化学镀Ni-P-Cu膜。由此,可以制作被接合体。接着,第2工序中,使被接合体的实施了前述镀覆的面与软钎料接触。软钎料的组成、形态可以为上述详述的任意形态,也可以为板状软钎料、焊膏。接下来的第3工序中,将被接合体和软钎料以规定的气氛和温度曲线进行加热,使软钎料熔融形成钎焊接合层。
[第2实施方式:电子设备]
第1实施方式的钎焊接合部构成电子设备的一部分,作为电子设备,可以举出逆变器、太阳能发电站、燃料电池、电梯、冷却装置、车载用半导体装置等电气/电力设备,但不限定于这些。典型地,电子设备为半导体装置。半导体装置的接合部可以为芯片接合接合部、导电性板与散热板的接合部、端子与端子的接合部、端子与其他构件的接合部、或者此外的任意的接合部,但不限定于这些。以下,作为具备本实施方式的接合部的电子设备的一例,列举半导体装置,参照附图对本发明进一步详细地进行说明。
[第3实施方式:半导体装置]
根据第3实施方式,本发明涉及一种半导体装置,其具备第1实施方式的接合部。
图1中示出作为半导体装置的一例的、功率模块的概念性的剖视图。功率模块100主要成为如下层叠结构:在散热板13上以钎焊接合层10接合层叠基板12,且在层叠基板12上以钎焊接合层10接合半导体元件11。在半导体元件11的与层叠基板12相反一侧的主面上,以钎焊接合层10接合有引线框18。在散热板13上粘接内置有外部端子15的壳体16,层叠基板12的电极与外部端子15以铝线14连接。模块内部填充有树脂封固材料17。半导体元件11可以为Si半导体元件、SiC半导体元件,但不限定于这些。例如搭载于IGBT模块的这些元件的情况下,与层叠基板12接合的背面电极通常由Au或Ag构成。层叠基板12例如在由氧化铝、SiN等形成的陶瓷绝缘层122的表面背面设有铜、铝的导电性板121、123。作为散热板13,可以使用导热性优异的铜、铝等金属。
图示的功率模块100中,作为形成有能与钎焊接合层10接合的镀Ni-P-Cu层的被接合构件,有:构成层叠基板12的上下各自的面的导电性板121、123、散热板13、引线框18。作为这些被接合构件,可以使用在与钎焊接合层10接触的面上形成有第1实施方式中详述的镀Ni-P-Cu层者。
而且,图2所示的功率模块100中,特别是,钎焊接合层10与形成有镀Ni-P-Cu层的Cu所形成的导电性板123的接合部P、钎焊接合层10与形成有镀Ni-P-Cu层的Cu散热体13的接合部Q、钎焊接合层10与形成有镀Ni-P-Cu层的引线框18的接合部R、钎焊接合层10与形成有镀Ni-P-Cu层的Cu所形成的导电性板121的接合部S属于第1实施方式的钎焊接合部。
需要说明的是,本实施方式中图示的半导体装置为一例,本发明的半导体装置不限定于具备图示的装置构成者。例如,本申请人的专利文献1中公开的具备引线框的半导体装置构成中,形成引线框镀Ni-P-Cu层,使用上述详述的规定组成的软钎料,也可以形成本发明的接合部。或者,具备本申请人的日本特开2012-191010号公报中公开的构成的半导体装置中,绝缘基板与半导体元件的接合、插销与半导体元件的接合中,在设置于绝缘基板的一个面的导电性板的表面、或插销的表面上形成镀Ni-P-Cu层,使用规定组成的软钎料,同样地可以得到具备本发明的接合部的半导体装置。此外,在与使用焊料球进行接合时的被接合构件、例如BGA(Ball Grid Array)、CSP(Chip Size Package)的焊料球的接触面上可以形成镀Ni-P-Cu层。这些半导体装置在使用条件下工作温度成为100~250℃的高温。
实施例
制造钎焊接合部,对镀膜的特性和接合性进行评价。接合性由与软钎料的接合部和界面的缺陷观察和润湿性评价。软钎料使用的是,实施例和比较例的全部接合部中为相同组成的含有3.5质量%的Ag、7.5质量%的Sb、0.1质量%的Ni、0.01质量%的Ge、余量由Sn和不可避免的杂质组成的无铅软钎料。作为被接合体,在被镀母材的铜上通过化学镀法形成有镀Ni-P-Cu层、或镀Ni-P层。所使用的镀层的组成示于表1。
(镀层对母材的制造)
作为前处理,将母材的Cu板以50℃×4分钟进行碱脱脂,进行水洗、酸脱脂40℃×4分钟、水洗后、过硫酸钠30℃×0.5分蚀刻,进行水洗,以98%硫酸25℃×0.5分钟进行表面处理。接着,进行水洗,对于基于盐酸溶液和作为催化剂的Pd的活化,以25~30℃,进行0.5分钟的浸渍处理,进行水洗后,进行规定组成的化学镀Ni-P-Cu或化学镀Ni-P。化学镀Ni-P-Cu或化学镀Ni-P在空气搅拌下、在90℃下以成为5μm的厚度的时间进行处理。镀覆后进行水洗,在干燥机干燥中进行最终加工。
(润湿性评价)
软钎料润湿性的评价中,使用如下样品:在30×5×0.3mm的韧铜板(JIS C1100)上以目标为约5μm的值对各镀层实施了镀覆。润湿性参照整体润湿润湿性试验(bulk wettingwettability test)(JIS Z3198-4:2003)方法而实施。对于软钎料,使用上述记载的组成的软钎料,将约1kg熔融了的软钎料浴加热至280℃,使样品以深度3mm浸渍于该软钎料浴20秒。润湿性的判断如下进行:使样品浸渍,润湿开始的零交叉时间(软钎料润湿于试验片为止的时间)为3秒以内的情况判断为○、2秒~3秒的情况判断为△、耗费3秒以上的情况判断为×。将未镀覆的韧铜板作为本试验的参照条件,此时,可以在约1秒左右内确保润湿时间。
(钎焊接合体的制造)
在母材(铜板)上以膜厚5μm形成各组成的镀层作为被接合构件,使上述记载的组成的板软钎料重叠。接合考虑使用了间歇式加热板的接合装置进行,使气氛减压至20Pa,用氮气进行置换后,再一次减压至50Pa,用氢进行置换。在置换后的气氛中,保持300℃×2分钟,进行钎焊接合。冷却速度以1℃/秒进行冷却。热处理作为用于评价半导体装置的可靠性的加速试验而进行。
(钎焊接合部的缺陷评价)
对于制造的钎焊接合部,评价初始和热处理后的缺陷。初始是指,刚刚接合后的时刻。热处理是在热风式的125℃和175℃的恒温槽中放置。判定在250小时内进行。需要说明的是,热处理实验实施直至500小时、1000小时。需要说明的是,具有为×的接合部的半导体装置即使在初始的状态下在软钎料与镀层的界面附近也发生了剥离。进一步,如果进行加热处理,则该剥离更明显地发生。因此,将×的条件作为判定基准。
初始缺陷和热处理后的缺陷的判定进行基于SEM的截面观察而确认。对于截面进行机械的镜面研磨等后,对样品用扫描型电子显微镜、以观察视野为约5000~20000倍的倍率进行观察。能确认到的缺陷如下:将约0.1μm~1μm左右者连续3~10个左右的情况记作×,将0.1μm左右的缺陷、但不连续而分散存在的情况记作△,将基本无法确认的情况记作○。
(评价结果)
镀Ni-P层的P浓度低于3质量%的较低的情况下,Ni向软钎料中溶出的溶出能力高,因此,镀层与Sn反应,成为Ni3Sn2与Ni3Sn4化合物的层,会在界面产生孔隙。镀Ni-P层的P浓度为8质量%以上的高浓度时,镀Ni-P层中,生成Ni3P的金属间化合物,抑制Ni的溶出。这是由于,Ni3P的金属间化合物在镀Ni-P层中结晶,而不是在Ni3P的均匀的化合物层中结晶。因此,认为Ni从无Ni3P的部分向钎焊接合层侧溶出,溶出可大可小,因此,容易产生接合缺陷。
另外,比较例的镀Ni-P层中,在任意P添加量下,均为NiP的非晶,但在功率模块等中进行接合的250℃以上的接合条件下晶体结晶。而且,随着热处理时间的增大,该晶体生长成75nm~几100nm的粗大的柱状的晶体。Ni的溶出量、扩散的速度在具有微晶的晶界和粗大的晶界的晶体中不同,因此,具有粗大的晶体的镀Ni-P层中,Ni变得容易溶出,容易产生接合缺陷。
在以下表1中示出镀层的组成、接合缺陷和软钎料润湿性的评价结果。
[表1]
对于实施热处理实验直至500小时、1000小时的情况,在初始接合有缺陷的比较例的接合部中,温度越高、时间越长,缺陷越增加,确认了进行大者如剥离那样连接。另一方面,对于实施例8~9的接合部,即使在175℃下进行了1000小时的热处理,也观察不到缺陷、剥离。
(截面观察照片)
将实施例的钎焊接合部的代表性的截面观察照片示于图4。图4为具有Cu为2质量%、P为8质量%、余量为Ni的镀层组成、软钎料组成与上述相同、在与上述相同的条件下进行了接合时的钎焊接合部(实施例8)的扫描型电子显微镜(SEM)照片。另一方面,图5为具有P为8质量%、余量为Ni的镀层组成、软钎料组成与上述相同、在与上述相同的条件下进行了接合时的钎焊接合部(比较例4)的扫描型电子显微镜照片。图5中,P富集层101中可见直径0.1~0.5μm左右的孔隙h。由图4可知,实施例的接合部中,在镀Ni-Cu-P层与钎焊接合层的界面附近处基本未见孔隙。
(基于透射型显微镜观察的微晶的特定)
图6为实施例8的钎焊接合部的界面的透射型电子显微镜照片。可以确认在接合界面从照片上部的软钎料侧起有(Ni,Cu)3(Sn,Sb)2化合物和Ni3(Sn,Sb)2化合物的层,并且在该界面约5nm~20nm左右的粒状的微细的晶体具有层状的组织结构。图7为图6的左上部的放大照片,可以确认a的元素分析结果是,其为P 21.8at%、Ni 75.1at%、Cu 2.6at%、Ni∶P大致以3∶1共存有微小Cu的微晶层中的微晶。同样地可以确认b的元素分析结果是,其为P22.4at%、Ni 75.8at%、Cu 1.2at%、并且在透射型电子显微镜照片中可确认的微细的粒状物为Ni、P和Cu所形成的微晶层中的(Ni,Cu)3P微晶。可以确认c为以层状排列而成的化合物层。可以确认c的EDX分析结果为Ni 52.6at%、Sn 40.6at%、Sb 5.2at%,推定为第1金属间化合物层的Ni3(Sn,Sb)2化合物层。可以确认d的EDX分析结果为Ni∶P=3.7∶1左右的比率,由于Cu低至0.15at%以下,因此可以确认为Ni3P相。同样地推定e为(Ni,Cu)5P2微晶、f为(Ni,Cu)12P5微晶、g为(Ni,Cu)2P微晶。需要说明的是,根据透射型电子显微镜的电子束衍射,衍射谱图的衍射斑点(spot)也清晰,可知它们以晶体的形式存在。表示第1金属间化合物层的点c以外的a、b、d~g中,均基本不包含源自软钎料成分的Ag、Sn、Sb。
在以下表2中示出图7的照片的a、b、c、d、e、f、g所示的部位的EDX分析结果。表中的数值表示原子%(at%)。
[表2]
a | b | c | d | e | f | g | |
P | 21.80 | 22.36 | 0.45 | 21.23 | 26.55 | 28.41 | 31.54 |
Ni | 75.11 | 75.81 | 52.65 | 78.25 | 71.53 | 70.12 | 66.95 |
Cu | 2.66 | 1.16 | 0.71 | 0.15 | 1.6 | 1.18 | 1.22 |
Ag | 0.18 | 0.12 | 0.37 | 0.14 | 0.10 | 0.11 | 0.13 |
Sn | 0.25 | 0.49 | 40.62 | 0.23 | 0.22 | 0.18 | 0.16 |
Sb | 0.00 | 0.05 | 5.19 | 0.00 | 0.00 | 0.00 | 0.00 |
图8为比较例4的钎焊接合部的界面的透射型电子显微镜照片。钎焊接合层与镀Ni-P层的接合界面的结构如下:成为从软钎料侧照片上部起Ni3Sn4化合物层(第2金属间化合物层103)/Ni3Sn2化合物层(第1金属间化合物层102)/粗糙化了的微细粒的层(101c)/柱状晶体相(101d)/粗糙化了的微细粒的过渡层/镀Ni-P层和与接合界面不同的层结构。图9示出图8的柱状晶体附近的放大照片。
而且,对于图9的i、j、k的部位进行了EDX分析,将结果示于以下。表中的数值表示原子%(at%)。
[表3]
i | j | k | |
P | 26.27 | 23.95 | 25.92 |
Ni | 73.51 | 75.81 | 74.08 |
Cu | 0.00 | 0.00 | 0.00 |
Ag | 0.22 | 0.00 | 0.00 |
Sn | 0.00 | 0.24 | 0.00 |
Sb | 0.00 | 0.00 | 0.00 |
图9中,在i所示的部位确认到50~500nm左右的粗大的Ni的柱状晶体。该部位的EDX定量分析结果为P 26.27at%、Ni 73.51at%,可以确认为由Ni3P构成的化合物。图9中,在柱状晶体附近的j所示的部位确认到粒状的化合物。该部位的EDX定量分析结果为P23.9at%、Ni 75.8at%。图9的k所示的部位的EDX定量分析结果为P 25.9at%、Ni74.1at%,推定存在于j、k的任意部位的晶体均为包含Ni3P的晶体。
由实施例8与比较例4的基于透射型电子显微镜的组织结构的观察和EDX定量分析的结果可知,在实施例8的镀Ni-P-Cu层中,在接合界面的镀层中生成微细的5~20nm左右的粒状的层。另一方面,比较例4中,镀Ni-P层由包含粗糙化了的缺陷(孔隙)的微细的组织和50~500nm左右的粗大的柱状晶体所形成的组织构成。实施例的接合界面的缺陷的抑制通过用Cu置换由NiP所形成的晶体结构,从而其结构被微细化。认为该微细的致密层较大关系到耐热性改善。
(基于透射型显微镜观察的孔隙数的比较)
对于将实施例8与比较例4的接合体进行了175℃×250小时热处理的材料,计数利用透射型电子显微镜以80000倍观察截面时的每0.36μm2观察视野中的孔隙的数量。对于实施例的接合部,计数微晶层的观察视野(0.36μm2)的10nm以上的孔隙的个数,对于比较例的接合部,计数P富集层的观察视野(0.36μm2)的10nm以上的孔隙的个数。其结果,在实施例8的接合部中孔隙的个数为45个左右,而比较例4的接合部中孔隙的个数为230个左右,可以将孔发生数抑制为1/5左右。其他实施例中,10nm以上的孔隙在前述单位面积中也可以抑制为50个以下。基于SEM观察的孔隙的评价为0.1μm以上的孔隙是对象,但若通过如TEM那样的分辨率进一步高的评价,则也明确了进一步小的孔隙的存在。而且可知,本申请的发明的镀膜的情况下,也可以抑制微细的孔隙。
由以上的结果,如果使用本申请发明的镀Ni-P-Cu膜和软钎料,则在接合界面附近可以形成孔隙少、可靠性良好的接合部。具体而言,通过SEM能观察的0.1μm以上的大孔隙在单位观察视野100μm2中为2个以下,通过TEM观察的10nm以上的孔隙在单位观察视野0.36μm2中为50个以下。
具有本实施例中使用的软钎料以外的组成的软钎料、上述软钎料所示的软钎料以外,例如对于Sn-0.75Cu软钎料(包含0.75质量%的Cu、余量由Sn和不可避免的杂质组成的软钎料)、Sn-0.6Cu-0.05Ni软钎料(包含0.6质量%的Cu和0.05质量%的Ni、余量由Sn和不可避免的杂质组成的软钎料)、Sn-0.3Ag-0.5Cu软钎料(包含0.3质量%的Ag和0.5质量%的Cu、余量由Sn和不可避免的杂质组成的软钎料),认为也可以得到大致同样的结果。
产业上的可利用性
本发明的钎焊接合部可以用于大电流功率的电子设备全部的接合部。特别适合用于IC等封装部件。而且可以适合用于发热大的部件、例如LED元件、功率二极管等功率半导体器件的芯片接合接合部、进一步搭载于印刷电路板等的电子部件全部的IC元件等内部连接的芯片接合接合部、任意的金属构件间的接合部。
附图标记说明
1微晶层、2第1金属间化合物层、3第2金属间化合物层
4软钎焊层、5镀Ni-P-Cu层、6母材层、PQRS钎焊接合部
10接合层、11半导体元件、12层叠基板、13散热板
14铝线、15外部端子、16壳体、17树脂封固材料
18引线框、100功率模块
101P富集层、102第1金属间化合物层、103第2金属间化合物层
104软钎焊层、105镀Ni-P层、106母材层、h孔隙
Claims (13)
1.一种钎焊接合部,其包含:钎焊接合层,其是以Sn为主成分、且还包含Ag和/或Sb和/或Cu的软钎料熔融而得到的;和,被接合体,其在与所述钎焊接合层接触的表面上具备镀Ni-P-Cu层,
所述镀Ni-P-Cu层以Ni为主成分,且包含0.5质量%以上且8质量%以下的Cu、和3质量%以上且10质量%以下的P,
所述镀Ni-P-Cu层在与所述钎焊接合层的界面具有微晶层,所述微晶层具备:包含NiCuP三元合金的微晶的相、包含(Ni,Cu)3P的微晶的相、和包含Ni3P的微晶的相。
2.根据权利要求1所述的钎焊接合部,其中,所述NiCuP三元合金的微晶包含平均粒径为10nm以下的微晶。
3.根据权利要求1所述的钎焊接合部,其中,所述微晶层不含长径为75nm以上的柱状晶体或颗粒。
4.根据权利要求2所述的钎焊接合部,其中,所述微晶层不含长径为75nm以上的柱状晶体或颗粒。
5.根据权利要求1~4中任一项所述的钎焊接合部,其中,所述软钎料包含Sn、Ag和Sb。
6.根据权利要求5所述的钎焊接合部,其中,所述软钎料还含有Ni和/或Ge和/或Cu。
7.根据权利要求1~4中任一项所述的钎焊接合部,其中,具备所述镀Ni-P-Cu层的被接合体为在以Cu、Al或Cu合金为主成分的母材上设有化学镀Ni-P-Cu层的构件。
8.根据权利要求5所述的钎焊接合部,其中,具备所述镀Ni-P-Cu层的被接合体为在以Cu、Al或Cu合金为主成分的母材上设有化学镀Ni-P-Cu层的构件。
9.根据权利要求6所述的钎焊接合部,其中,具备所述镀Ni-P-Cu层的被接合体为在以Cu、Al或Cu合金为主成分的母材上设有化学镀Ni-P-Cu层的构件。
10.一种电子设备,其具备权利要求1~9中任一项所述的钎焊接合部。
11.一种半导体装置,其具备权利要求1~9中任一项所述的钎焊接合部。
12.根据权利要求11所述的半导体装置,其中,所述钎焊接合部为基板电极、引线框或插销与半导体元件的接合部、导电性板与散热板的接合部、和/或端子间的接合部。
13.根据权利要求12所述的半导体装置,其中,所述半导体元件为Si半导体元件或SiC半导体元件。
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4981741A (en) * | 1986-03-19 | 1991-01-01 | Mitsubishi Denki Kabushiki Kaisha | Coating alloy |
CN1102150A (zh) * | 1993-10-23 | 1995-05-03 | 浙江省冶金研究所 | 一种Ni-P-Cu系镍基钎焊料 |
JP2000226274A (ja) * | 1998-12-01 | 2000-08-15 | Aichi Steel Works Ltd | セラミックス−金属接合体の製造方法 |
CN102560576A (zh) * | 2012-02-21 | 2012-07-11 | 合肥工业大学 | 一种作为焊点反应阻挡层的Ni-Cu-P三元合金涂层及其电镀制备工艺 |
CN104822486A (zh) * | 2012-11-30 | 2015-08-05 | 千住金属工业株式会社 | 异种电极接合用层叠软钎料以及电子部件的异种电极的接合方法 |
WO2018069788A1 (en) * | 2016-10-10 | 2018-04-19 | Kemijski Institut | The method for improvement of responsiveness of cells to ultrasound and mechanical stimuli with gas vesicles and sensitised mechanosensors |
WO2018168858A1 (ja) * | 2017-03-17 | 2018-09-20 | 富士電機株式会社 | はんだ材 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2001313454A (ja) | 2000-04-28 | 2001-11-09 | Okuno Chem Ind Co Ltd | 配線基板 |
JP2002028775A (ja) * | 2000-05-10 | 2002-01-29 | Denso Corp | 耐腐食性熱交換器の製造方法 |
JP3682654B2 (ja) | 2002-09-25 | 2005-08-10 | 千住金属工業株式会社 | 無電解Niメッキ部分へのはんだ付け用はんだ合金 |
JP2005116702A (ja) | 2003-10-06 | 2005-04-28 | Fuji Electric Holdings Co Ltd | パワー半導体モジュール |
US7005745B2 (en) * | 2004-01-22 | 2006-02-28 | Texas Instruments Incorporated | Method and structure to reduce risk of gold embrittlement in solder joints |
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Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4981741A (en) * | 1986-03-19 | 1991-01-01 | Mitsubishi Denki Kabushiki Kaisha | Coating alloy |
CN1102150A (zh) * | 1993-10-23 | 1995-05-03 | 浙江省冶金研究所 | 一种Ni-P-Cu系镍基钎焊料 |
JP2000226274A (ja) * | 1998-12-01 | 2000-08-15 | Aichi Steel Works Ltd | セラミックス−金属接合体の製造方法 |
CN102560576A (zh) * | 2012-02-21 | 2012-07-11 | 合肥工业大学 | 一种作为焊点反应阻挡层的Ni-Cu-P三元合金涂层及其电镀制备工艺 |
CN104822486A (zh) * | 2012-11-30 | 2015-08-05 | 千住金属工业株式会社 | 异种电极接合用层叠软钎料以及电子部件的异种电极的接合方法 |
WO2018069788A1 (en) * | 2016-10-10 | 2018-04-19 | Kemijski Institut | The method for improvement of responsiveness of cells to ultrasound and mechanical stimuli with gas vesicles and sensitised mechanosensors |
WO2018168858A1 (ja) * | 2017-03-17 | 2018-09-20 | 富士電機株式会社 | はんだ材 |
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