CN112309260A - Display screen structure and driving method thereof - Google Patents

Display screen structure and driving method thereof Download PDF

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Publication number
CN112309260A
CN112309260A CN202011239087.XA CN202011239087A CN112309260A CN 112309260 A CN112309260 A CN 112309260A CN 202011239087 A CN202011239087 A CN 202011239087A CN 112309260 A CN112309260 A CN 112309260A
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sub
pixel
demux
wire
data
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谢建峰
熊克
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Fujian Huajiacai Co Ltd
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Fujian Huajiacai Co Ltd
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Priority to CN202011239087.XA priority Critical patent/CN112309260A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/302Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0267Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention relates to the technical field of display screens, in particular to a display screen structure and a driving method thereof, which comprises more than two pixel units, a first Demux wire, a second Demux wire, a third Demux wire and a plurality of grid wires, wherein one pixel unit is provided with two grid wires and is positioned between the two grid wires, the grids of all TFT switches in a first sub-pixel group are electrically connected with the first Demux wire, the grids of all TFT switches in a second sub-pixel group are electrically connected with the second Demux wire, the grids of all TFT switches in a third sub-pixel group are electrically connected with the third Demux wire, the input end of each TFT switch is respectively and correspondingly connected with one source wire, thus the number of the source wires of an IC is reduced to 1/6 of a common panel, due to the fact that the number of the source electrode wires of the IC is reduced, the IC becomes narrower on the Y axis, and therefore the display screen can achieve the effect of a full screen.

Description

Display screen structure and driving method thereof
Technical Field
The invention relates to the technical field of display screens, in particular to a display screen structure and a driving method thereof.
Background
The design of the display screen of the frame and the full-face screen becomes mainstream, with the wide popularization of the display screen, the ratio of the initial generation iPhone screen in 2007 is only about 50% from the aspect of the ratio of the screen, and the ratio of the mobile phone screen is continuously improved in the following years, but the improvement range is not large. In the existing display screen, the Y-axis length of a driving unit is an important factor influencing the overall screen or the narrow-frame screen. The conventional display screen is an Integrated Circuit (IC) and is also used as a driving unit, wherein one Source Line (Source Line) of the IC corresponds to one Data Line (Data Line) in the surface, and one Data Line of the display screen controls one sub-pixel, so that the Source Line is excessive, the Y axis of the IC cannot be reduced, the power consumption of the display screen is increased, and the manufacturing cost of the driving unit is increased.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: a display screen structure and a driving method thereof are provided.
In order to solve the above technical problems, a first technical solution adopted by the present invention is:
a display screen structure comprises more than two pixel units, a first Demux routing, a second Demux routing, a third Demux routing and a plurality of grid routing, wherein one pixel unit is provided with two grid routing and is positioned between the two grid routing;
each pixel unit comprises six rows of sub-pixel pairs which are sequentially arranged from left to right, the sub-pixel pair positioned in a first row and the sub-pixel pair positioned in a second row are divided into a first sub-pixel group, the sub-pixel pair positioned in a third row and the sub-pixel pair positioned in a fourth row are divided into a second sub-pixel group, the sub-pixel pair positioned in a fifth row and the sub-pixel pair positioned in the sixth row are divided into a third sub-pixel group, the sub-pixel pairs in one row are provided with two data routing lines and are positioned between the two data routing lines, and the sub-pixel pairs in two adjacent rows share one data routing line, the data wires of all the sub-pixel pairs in the first sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the second sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the third sub-pixel group are respectively and correspondingly connected with a TFT switch;
the grid electrodes of all the TFT switches in the first sub-pixel group are electrically connected with a first Demux trace, the grid electrodes of all the TFT switches in the second sub-pixel group are electrically connected with a second Demux trace, the grid electrodes of all the TFT switches in the third sub-pixel group are electrically connected with a third Demux trace, and the input end of each TFT switch is correspondingly connected with a source trace;
the TFT switch at the nth position, the TFT switch at the (n +2) th position and the TFT switch at the (n +4) th position share one source wire, wherein the value of n is 1 or 2.
The second technical scheme adopted by the invention is as follows:
a driving method of a display screen structure includes the following steps:
step S1, in a pixel unit, controlling one of two grid wires to be opened;
step S2, during the period of starting one grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S3, controlling the other grid wire of the two grid wires to be opened;
step S4, during the period of starting another grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S5, loop through steps S1-S4, drives each pixel cell.
The invention has the beneficial effects that:
according to the scheme, the first Demux routing, the second Demux routing and the third Demux routing are arranged to be correspondingly connected with the TFT switches in the first sub-pixel group, the second sub-pixel group and the third sub-pixel group in the pixel unit respectively, the number of the source electrode routing of the IC is reduced to 1/6 of a common panel through the special Layout routing, and the IC is narrower on a Y axis due to the reduction of the number of the source electrode routing of the IC, so that the display screen can achieve a comprehensive screen effect; the pixel arrangement mode designed by the scheme can save the power consumption of a white picture and solve the problem of service life shortening of a display screen caused by a heat effect.
Drawings
FIG. 1 is a schematic structural diagram of a display screen structure according to the present invention;
FIG. 2 is a schematic structural diagram of a display screen structure according to the present invention;
FIG. 3 is a timing diagram of a source trace S1 of a display panel structure according to the invention;
FIG. 4 is a timing diagram of a source trace S2 of a display panel structure according to the invention;
FIG. 5 is a flow chart illustrating the steps of a method for driving a display panel structure according to the present invention;
description of reference numerals:
1. a pixel unit.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, a technical solution provided by the present invention:
a display screen structure comprises more than two pixel units, a first Demux routing, a second Demux routing, a third Demux routing and a plurality of grid routing, wherein one pixel unit is provided with two grid routing and is positioned between the two grid routing;
each pixel unit comprises six rows of sub-pixel pairs which are sequentially arranged from left to right, the sub-pixel pair positioned in a first row and the sub-pixel pair positioned in a second row are divided into a first sub-pixel group, the sub-pixel pair positioned in a third row and the sub-pixel pair positioned in a fourth row are divided into a second sub-pixel group, the sub-pixel pair positioned in a fifth row and the sub-pixel pair positioned in the sixth row are divided into a third sub-pixel group, the sub-pixel pairs in one row are provided with two data routing lines and are positioned between the two data routing lines, and the sub-pixel pairs in two adjacent rows share one data routing line, the data wires of all the sub-pixel pairs in the first sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the second sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the third sub-pixel group are respectively and correspondingly connected with a TFT switch;
the grid electrodes of all the TFT switches in the first sub-pixel group are electrically connected with a first Demux trace, the grid electrodes of all the TFT switches in the second sub-pixel group are electrically connected with a second Demux trace, the grid electrodes of all the TFT switches in the third sub-pixel group are electrically connected with a third Demux trace, and the input end of each TFT switch is correspondingly connected with a source trace;
the TFT switch at the nth position, the TFT switch at the (n +2) th position and the TFT switch at the (n +4) th position share one source wire, wherein the value of n is 1 or 2.
From the above description, the beneficial effects of the present invention are:
according to the scheme, the first Demux routing, the second Demux routing and the third Demux routing are arranged to be correspondingly connected with the TFT switches in the first sub-pixel group, the second sub-pixel group and the third sub-pixel group in the pixel unit respectively, the number of the source electrode routing of the IC is reduced to 1/6 of a common panel through the special Layout routing, and the IC is narrower on a Y axis due to the reduction of the number of the source electrode routing of the IC, so that the display screen can achieve a comprehensive screen effect; the pixel arrangement mode designed by the scheme can save the power consumption of a white picture and solve the problem of service life shortening of a display screen caused by a heat effect.
Further, each column of the sub-pixel pairs comprises two sub-pixels, and all the sub-pixels in the pixel unit are sequentially arranged in an array manner of R, G and B.
Furthermore, each data wire connects two adjacent sub-pixels, and the two sub-pixels connected by each data wire are electrically connected with the data wire through the corresponding gate wire.
Further, the output end of the TFT switch is electrically connected to the corresponding data trace and the two gate traces, respectively.
Furthermore, the driving unit is electrically connected with the source electrode wires respectively.
Referring to fig. 5, another technical solution provided by the present invention:
a driving method of a display screen structure includes the following steps:
step S1, in a pixel unit, controlling one of two grid wires to be opened;
step S2, during the period of starting one grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S3, controlling the other grid wire of the two grid wires to be opened;
step S4, during the period of starting another grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S5, loop through steps S1-S4, drives each pixel cell.
Referring to fig. 1 to 4, a first embodiment of the present invention is:
referring to fig. 1 and fig. 2, a display screen structure includes more than two pixel units 1, a first Demux trace (the Demux trace is also called a de-composite unit structure trace), a second Demux trace, a third Demux trace, and a plurality of gate traces, where one pixel unit 1 is configured with two gate traces and is located between two gate traces;
referring to fig. 1 and fig. 2, each of the pixel units 1 includes six rows of sub-pixel pairs sequentially arranged from left to right, the sub-pixel pair located in the first row and the sub-pixel pair located in the second row are divided into a first sub-pixel group, the sub-pixel pair located in the third row and the sub-pixel pair located in the fourth row are divided into a second sub-pixel group, the sub-pixel pair located in the fifth row and the sub-pixel pair located in the sixth row are divided into a third sub-pixel group, one row of the sub-pixel pairs is configured with two data traces and is located between the two data traces, two adjacent rows of the sub-pixel pairs share one data trace, the data wires of all the sub-pixel pairs in the first sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the second sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the third sub-pixel group are respectively and correspondingly connected with a TFT switch;
referring to fig. 1 and fig. 2, the gates of all the TFT switches in the first sub-pixel group are electrically connected to the first Demux trace, the gates of all the TFT switches in the second sub-pixel group are electrically connected to the second Demux trace, the gates of all the TFT switches in the third sub-pixel group are electrically connected to the third Demux trace, and the input end of each TFT switch is correspondingly connected to a source trace;
referring to fig. 1 and 2, the TFT switch located at the nth position, the TFT switch located at the (n +2) th position, and the TFT switch located at the (n +4) th position share one source line, where n is 1 or 2.
Referring to fig. 1 and fig. 2, each column of the sub-pixel pairs includes two sub-pixels, and all the sub-pixels in the pixel unit 1 are sequentially arranged in an array manner of R, G and B.
Referring to fig. 1 and fig. 2, each of the data traces connects two adjacent sub-pixels, and the two sub-pixels connected to each of the data traces are electrically connected to the data trace through a corresponding gate trace.
Referring to fig. 1 and 2, the output end of the TFT switch is electrically connected to the corresponding data trace and the two gate traces, respectively.
Referring to fig. 1 and fig. 2, the liquid crystal display further includes a driving unit, and the driving unit is electrically connected to the plurality of source lines respectively.
The source trace S1 is connected to D1 (data trace at the first position)/D3 (data trace at the third position)/D5 (data trace at the fifth position) inside the display screen through SW1 (first Demux trace)/SW 2 (second Demux trace)/SW 3 (third Demux trace), and the source trace S2 is connected to D2 (data trace at the second position)/D4 (data trace at the fourth position)/D6 (data trace at the sixth position) inside the display screen through SW1/SW2/SW 3; S1/S2 and SW1/SW2/SW3 are connected until the in-plane data traces D1-D6 form a pixel unit 1 sequence, as shown in FIG. 1 and FIG. 2, a plurality of cyclic sequences appear in the display screen, the resolution of the display screen is different, and the cyclic sequences appear in different numbers.
Referring to fig. 2 and fig. 3, fig. 3 is a timing diagram of the source trace S1, and the data transmission process of the present embodiment is described by taking the source trace S1 as an example: when G1 (first gate trace) is turned on and SW1 is turned on, S1 transmits R sub-pixel data; when G1 is turned on, SW1 is turned off, and SW2 is turned on, S1 transfers G sub-pixel data; when G1 is turned on, SW1 and SW2 are turned off, and SW3 is turned on, S1 transmits B sub-pixel data; when G2 (second gate trace) is turned on and SW1 is turned on, S1 transmits B sub-pixel data; when G2 is turned on, SW1 is turned off, and SW2 is turned on, S1 transfers R sub-pixel data; s1 transfers G sub-pixels when G2 is on, SW1 and SW2 are both off, and SW3 is on; when G3 (third gate trace) is turned on, the case of S1 transferring data is the same as that when G1 is turned on, which can be referred to the case of G3 being turned on in fig. 3; when G4 is opened, the case of S1 transferring data is the same as when G2 is opened, and reference may be made to the case when G4 is opened in fig. 3.
Referring to fig. 2 and 4, fig. 4 is a timing diagram of the source trace S2, when G1 is turned on and SW1 is turned on, S2 transmits G sub-pixel data; when G1 is turned on, SW1 is turned off, and SW2 is turned on, S2 transfers the B sub-pixel data; when G1 is turned on, SW1 and SW2 are turned off, and SW3 is turned on, S2 transmits R sub-pixel data; when G2 is turned on and SW1 is turned on, S2 transfers the R sub-pixel data; when G2 is turned on, SW1 is turned off, and SW2 is turned on, S2 transfers G sub-pixel data; when G2 is turned on, SW1 and SW2 are turned off, and SW3 is turned on, S2 transmits B sub-pixel data; when G3 is opened, the case of S2 transferring data is the same as when G1 is opened, and reference may be made to the case when G3 is opened in fig. 4; when G4 is opened, the case of S2 transferring data is the same as when G2 is opened, and reference may be made to the case when G4 is opened in fig. 4.
Therefore, the data cycle sequence of S1 transmits data according to the R/G/B/B/R/G rule, and repeatedly transmits the data to the display screen according to the rule; and the data circulation sequence of S2 transmits data according to the G/B/R/R/G/B rule, and repeatedly transmits the data to the display screen according to the rule. The data transmission mode of the S1 and the S2 can enable the display screen to have only one polarity voltage in one frame on the S1 when displaying white pictures, so that the frequency of the positive and negative voltage reversal of the S1 in one frame is reduced (other source lines have the rule), thereby reducing the power consumption of the white pictures of the display screen. Because this patent uses the Layout mode of Demux + HSD structure, finally makes the line of walking of this display screen only 1/6 of ordinary display screen, and HSD is half source drive promptly, and HSD Layout mode is that two kinds or more different subpixels of colour must connect on a source line, and final source line of walking quantity need be less than the quantity of ordinary panel.
Referring to fig. 5, a second embodiment of the present invention is:
a driving method of a display screen structure includes the following steps:
step S1, in a pixel unit 1, controlling one of the two gate lines to open;
step S2, during the period of starting one grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S3, controlling the other grid wire of the two grid wires to be opened;
step S4, during the period of starting another grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S5, loop through steps S1-S4, drives each pixel cell 1.
The specific embodiment of the driving method of the display screen structure is as follows:
the source trace S1 is connected to D1 (data trace at the first position)/D3 (data trace at the third position)/D5 (data trace at the fifth position) inside the display screen through SW1 (first Demux trace)/SW 2 (second Demux trace)/SW 3 (third Demux trace), and the source trace S2 is connected to D2 (data trace at the second position)/D4 (data trace at the fourth position)/D6 (data trace at the sixth position) inside the display screen through SW1/SW2/SW 3; S1/S2 and SW1/SW2/SW3 are connected until the in-plane data traces D1-D6 form a pixel unit 1 sequence, as shown in FIG. 1 and FIG. 2, a plurality of cyclic sequences appear in the display screen, the resolution of the display screen is different, and the cyclic sequences appear in different numbers.
Referring to fig. 2 and fig. 3, fig. 3 is a timing diagram of the source trace S1, and the data transmission process of the present embodiment is described by taking the source trace S1 as an example: when G1 (first gate trace) is turned on and SW1 is turned on, S1 transmits R sub-pixel data; when G1 is turned on, SW1 is turned off, and SW2 is turned on, S1 transfers G sub-pixel data; when G1 is turned on, SW1 and SW2 are turned off, and SW3 is turned on, S1 transmits B sub-pixel data; when G2 (second gate trace) is turned on and SW1 is turned on, S1 transmits B sub-pixel data; when G2 is turned on, SW1 is turned off, and SW2 is turned on, S1 transfers R sub-pixel data; s1 transfers G sub-pixels when G2 is on, SW1 and SW2 are both off, and SW3 is on; when G3 (third gate trace) is turned on, the case of S1 transferring data is the same as that when G1 is turned on, which can be referred to the case of G3 being turned on in fig. 3; when G4 is opened, the case of S1 transferring data is the same as when G2 is opened, and reference may be made to the case when G4 is opened in fig. 3.
Referring to fig. 2 and 4, fig. 4 is a timing diagram of the source trace S2, when G1 is turned on and SW1 is turned on, S2 transmits G sub-pixel data; when G1 is turned on, SW1 is turned off, and SW2 is turned on, S2 transfers the B sub-pixel data; when G1 is turned on, SW1 and SW2 are turned off, and SW3 is turned on, S2 transmits R sub-pixel data; when G2 is turned on and SW1 is turned on, S2 transfers the R sub-pixel data; when G2 is turned on, SW1 is turned off, and SW2 is turned on, S2 transfers G sub-pixel data; when G2 is turned on, SW1 and SW2 are turned off, and SW3 is turned on, S2 transmits B sub-pixel data; when G3 is opened, the case of S2 transferring data is the same as when G1 is opened, and reference may be made to the case when G3 is opened in fig. 4; when G4 is opened, the case of S2 transferring data is the same as when G2 is opened, and reference may be made to the case when G4 is opened in fig. 4.
In summary, according to the display screen structure and the driving method thereof provided by the present invention, the first Demux routing, the second Demux routing and the third Demux routing are respectively and correspondingly connected to the TFT switches in the first sub-pixel group, the second sub-pixel group and the third sub-pixel group in the pixel unit, so that the number of the source routing of the IC is reduced to 1/6 of a common panel through the special Layout routing, and the IC becomes narrower on the Y axis due to the reduction of the number of the source routing of the IC, so that the display screen can achieve a full screen effect; the pixel arrangement mode designed by the scheme can save the power consumption of a white picture and solve the problem of service life shortening of a display screen caused by a heat effect.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.

Claims (6)

1. A display screen structure is characterized by comprising more than two pixel units, a first Demux routing, a second Demux routing, a third Demux routing and a plurality of grid routing, wherein one pixel unit is provided with two grid routing and is positioned between the two grid routing;
each pixel unit comprises six rows of sub-pixel pairs which are sequentially arranged from left to right, the sub-pixel pair positioned in a first row and the sub-pixel pair positioned in a second row are divided into a first sub-pixel group, the sub-pixel pair positioned in a third row and the sub-pixel pair positioned in a fourth row are divided into a second sub-pixel group, the sub-pixel pair positioned in a fifth row and the sub-pixel pair positioned in the sixth row are divided into a third sub-pixel group, the sub-pixel pairs in one row are provided with two data routing lines and are positioned between the two data routing lines, and the sub-pixel pairs in two adjacent rows share one data routing line, the data wires of all the sub-pixel pairs in the first sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the second sub-pixel group are respectively and correspondingly connected with a TFT switch, the data wires configured by all the sub-pixel pairs in the third sub-pixel group are respectively and correspondingly connected with a TFT switch;
the grid electrodes of all the TFT switches in the first sub-pixel group are electrically connected with a first Demux trace, the grid electrodes of all the TFT switches in the second sub-pixel group are electrically connected with a second Demux trace, the grid electrodes of all the TFT switches in the third sub-pixel group are electrically connected with a third Demux trace, and the input end of each TFT switch is correspondingly connected with a source trace;
the TFT switch at the nth position, the TFT switch at the (n +2) th position and the TFT switch at the (n +4) th position share one source wire, wherein the value of n is 1 or 2.
2. The panel structure of claim 1 wherein each column of sub-pixel pairs includes two sub-pixels, and all sub-pixels in the pixel unit are sequentially arranged in an array of R, G and B.
3. The display screen structure of claim 2, wherein each data trace connects two adjacent sub-pixels, and the two sub-pixels connected by each data trace are electrically connected to the data trace through a corresponding gate trace.
4. The display screen structure of claim 1, wherein the output terminals of the TFT switches are electrically connected to the corresponding data traces and the two gate traces, respectively.
5. The display screen structure of claim 1, further comprising a driving unit electrically connected to the plurality of source traces, respectively.
6. A driving method of a display panel structure, applied to the display panel structure of any one of claims 1 to 5, comprising the steps of:
step S1, in a pixel unit, controlling one of two grid wires to be opened;
step S2, during the period of starting one grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S3, controlling the other grid wire of the two grid wires to be opened;
step S4, during the period of starting another grid wire, sequentially controlling the first Demux wire, the second Demux wire and the third Demux wire to be started; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the first position and the second position during the starting period of the first Demux wire; controlling the source wire to transmit signals to the pixel pairs connected with the data wires at the third position and the fourth position during the starting period of the second Demux wire; during the starting period of the third Demux trace, controlling the source trace to transmit signals to the pixel pairs connected with the data traces at the fifth position to the sixth position;
step S5, loop through steps S1-S4, drives each pixel cell.
CN202011239087.XA 2020-11-09 2020-11-09 Display screen structure and driving method thereof Pending CN112309260A (en)

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CN111477142A (en) * 2020-04-08 2020-07-31 福建华佳彩有限公司 Full-screen display structure and driving method thereof
CN111477146A (en) * 2020-04-09 2020-07-31 福建华佳彩有限公司 Display screen structure with high screen ratio and driving method thereof
CN111477143A (en) * 2020-04-09 2020-07-31 福建华佳彩有限公司 Special full-screen framework and driving method
CN111477138A (en) * 2020-04-08 2020-07-31 福建华佳彩有限公司 Power consumption-saving display screen framework and driving method
CN111477136A (en) * 2020-04-08 2020-07-31 福建华佳彩有限公司 Power consumption-saving display screen framework and driving method
CN111477144A (en) * 2020-04-09 2020-07-31 福建华佳彩有限公司 Display screen structure and driving method thereof

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Publication number Priority date Publication date Assignee Title
KR20200078995A (en) * 2018-12-24 2020-07-02 엘지디스플레이 주식회사 Display Device
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