CN110956921A - Array substrate, driving method thereof, pixel driving device and display device - Google Patents
Array substrate, driving method thereof, pixel driving device and display device Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
Abstract
The embodiment of the invention provides an array substrate, a driving method of the array substrate, a pixel driving device and a display device, relates to the technical field of display, and can improve the display effect. An array substrate, comprising: a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; a plurality of gate line pairs; the grid line pair comprises two grid lines which are arranged in parallel, the pixels in the same row are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; a plurality of data lines; two sub-pixels in each sub-pixel pair are respectively connected with the same data line, and the same data line is connected with each sub-pixel pair positioned in an odd-numbered row in one row of sub-pixel pairs and is connected with each sub-pixel pair positioned in an even-numbered row in the adjacent row of sub-pixel pairs.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a driving method of the array substrate, a pixel driving device and a display device.
Background
Under the background that display devices are developing toward low cost and high quality, a Dual Gate (Dual Gate) driven Array substrate line Driver (GOA) design is widely used.
In addition, in order to increase the screen occupation ratio of the display device, the sub-pixels are usually driven by driving two adjacent columns with one data line, as shown in fig. 1, so as to achieve the purpose of reducing the frame by reducing the number of data lines.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a driving method thereof, a pixel driving device and a display device, which can improve the display effect.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in one aspect, an array substrate is provided, including: a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; a plurality of gate line pairs; the grid line pair comprises two grid lines which are arranged in parallel, the pixels in the same row are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; a plurality of data lines; two sub-pixels in each sub-pixel pair are respectively connected with the same data line, the same data line is connected with each sub-pixel pair positioned in an odd-numbered row in one row of the sub-pixel pairs, and is connected with each sub-pixel pair positioned in an even-numbered row in the adjacent row of the sub-pixel pairs.
Optionally, each of the pixels comprises three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; and the switch unit of the first color sub-pixel in the same row is connected with one grid line in the same grid line pair, and the switch unit of the second color sub-pixel is connected with the other grid line in the same grid line pair.
Optionally, the first color is red, the second color is green, and the third color is blue.
Optionally, two gate lines of the same gate line pair are distributed at two sides of the pixel in the same row; and aiming at each sub-pixel in each column of sub-pixels, the grid lines are respectively connected with the grid lines which are distributed on the same side of the pixel in the row where the sub-pixel is positioned in the corresponding grid line pair.
Optionally, the color of the sub-pixels connected to the same data line is different, and the sub-pixels are connected to the same data line.
In another aspect, a driving method for an array substrate as described above is provided, in which gate scanning signals are provided to a plurality of gate lines in a preset order; when a gate scan signal is supplied to each gate line, a corresponding data signal is input to each data line.
Optionally, the providing a gate scanning signal to the plurality of gate lines in a preset order includes: sequentially providing a grid scanning signal to the ith (n-1) multiplied by 4 rows of grid lines; i belongs to {1,3,2,4 }; n belongs to {1,2,3,4 }; the above steps are cycled until all gate lines are provided with gate scanning signals, and each value of i is increased by 16 every cycle.
In another aspect, there is provided a pixel driving device including: and the driving module is used for providing a grid scanning signal to the grid lines according to a preset sequence, and inputting a corresponding data signal to each data line when the grid scanning signal is provided to each grid line.
Optionally, the driving module comprises: the grid line driving units are used for sequentially providing grid scanning signals to the ith + (n-1) multiplied by 4 rows of grid lines; i belongs to {1,3,2,4 }; n is equal to {1,2,3,4 }.
In a further aspect, there is provided a display device comprising an array substrate as described above, and/or a pixel driving device as described above.
According to the array substrate and the driving method thereof, the pixel driving device and the display device provided by the embodiment of the invention, by arranging the plurality of pixels, the plurality of grid line pairs and the plurality of data lines which are distributed in an array, each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; the grid line pair comprises two grid lines which are arranged in parallel, the pixels in the same row are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; two sub-pixels in each sub-pixel pair are respectively connected with the same data line, and the same data line is connected with each sub-pixel pair positioned in an odd-numbered row in one row of sub-pixel pairs and is connected with each sub-pixel pair positioned in an even-numbered row in the adjacent row of sub-pixel pairs; the data lines are zigzag and cross over the sub-pixel pairs of adjacent rows for multiple times, so that when a pure color picture is displayed, the corresponding polarities of the sub-pixels are irregular, and the problem of inconsistent brightness of positive and negative polarities caused by coupling is solved, thereby improving the display effect.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an array substrate in the prior art;
fig. 2 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 6 is a schematic flow chart illustrating a driving method of an array substrate according to an embodiment of the present invention;
FIG. 7 is a diagram illustrating a clock signal according to an embodiment of the present invention;
FIG. 8 is a diagram illustrating a clock signal according to another embodiment of the present invention;
fig. 9 is a schematic structural diagram of a pixel driving device according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Reference numerals:
1-a display device; 2-an array substrate; 3-pixel driving means; 4-a drive module; 41-gate line driving unit; 10-subpixel pairs.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, the array substrate 2 of the related art includes a plurality of pixels arranged in an array, a plurality of gate line pairs, and a plurality of data lines. Each pixel of the same row includes a plurality of sub-pixels corresponding to different colors (e.g., each pixel includes three sub-pixels corresponding to three primary colors, i.e., a red sub-pixel, a green sub-pixel, and a blue sub-pixel), and the sub-pixels of the same column correspond to the same color. The grid line pair comprises two grid lines which are arranged in parallel, each sub-pixel positioned in an odd column in the same row of pixels is connected with one grid line in the grid line pair, and each sub-pixel positioned in an even column is connected with the other grid line in the same grid line pair; every two columns of sub-pixels are connected with a data line.
The driving module sequentially provides grid scanning signals to the grid lines under the control of the clock signals. When the gate scan signal of the 2N +1 th row (N is a positive integer greater than or equal to 0) is at a high level, the pixel corresponding to the on-state of the 2N +1 th row is always in a state of storing electric quantity, and when the gate scan signal of the 2N th row is pulled down, the pixel driven by the gate scan signal of the 2N +1 th row is coupled, so that the corresponding pixel is under-driven in electric charge, and the positive and negative polarities of the pixels displaying the same color are inconsistent in brightness, thereby causing adverse effects on the display effect and quality.
In view of the above problems, an embodiment of the present invention provides an array substrate, as shown in fig. 2 to 5, including:
a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of pixels form a sub-pixel pair 10, and the sub-pixel pairs 10 in the same column correspond to the same color.
It is understood that, if each pixel includes a plurality of sub-pixels corresponding to different colors, the sub-pixels corresponding to different colors are arranged periodically for the same row of pixels.
Example one, each pixel includes sub-pixels corresponding to three colors, namely a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; in the same row, the first color sub-pixel and the second color sub-pixel in the first pixel form a sub-pixel pair 10, the third color sub-pixel in the first pixel and the first color sub-pixel in the second pixel adjacent to the third color sub-pixel form a sub-pixel pair 10, the second color sub-pixel and the third color sub-pixel in the second pixel form a sub-pixel pair 10, and so on.
Example two, each pixel includes sub-pixels corresponding to four colors, namely a first color sub-pixel, a second color sub-pixel, a third color sub-pixel and a fourth color sub-pixel; in the same row, the first color sub-pixel and the second color sub-pixel in the first pixel form a sub-pixel pair 10, the third color sub-pixel and the fourth color sub-pixel in the first pixel form a sub-pixel pair 10, and so on.
A plurality of gate line pairs; the gate line pair includes two gate lines arranged in parallel, the pixels in the same row are connected to the two gate lines in the same gate line pair, and two sub-pixels in each sub-pixel pair 10 are respectively connected to different gate lines.
For example, if two gate lines included in a gate line pair are a first gate line and a second gate line, respectively, in a sub-pixel pair 10 including a first color sub-pixel and a second color sub-pixel, the first color sub-pixel is connected to the first gate line, and the second color sub-pixel is connected to the second gate line, or the first color sub-pixel is connected to the second gate line, and the second color sub-pixel is connected to the first gate line.
A plurality of data lines; the two sub-pixels in each sub-pixel pair 10 are respectively connected to a same data line, and the same data line is connected to each sub-pixel pair 10 in the odd-numbered row of the sub-pixel pair 10 in one column and is connected to each sub-pixel pair 10 in the even-numbered row of the sub-pixel pair 10 in the adjacent column.
It will be appreciated that since the same data line is connected to each sub-pixel pair 10 in the odd-numbered row of the sub-pixel pairs 10 in one column and each sub-pixel pair 10 in the even-numbered row of the sub-pixel pairs 10 in the adjacent column, the data line extends in a right-angled Zigzag (Zigzag) shape along the pixel column direction.
For example, if there are multiple columns of sub-pixel pairs 10, for the second column of sub-pixel pairs 10, two sub-pixels in each sub-pixel pair 10 are respectively connected to the same data line, and on this basis, for each sub-pixel pair 10 in the second column of sub-pixel pairs 10, the sub-pixel pair 10 in the odd-numbered row and the sub-pixel pair 10 in the even-numbered row in the first column of sub-pixel pairs 10 are connected to the same data line; the sub-pixel pairs 10 in the even-numbered rows and the sub-pixel pairs 10 in the odd-numbered rows in the third column of sub-pixel pairs 10 are connected to the same data line; or, the sub-pixel pairs 10 in the odd-numbered rows and the sub-pixel pairs 10 in the even-numbered rows in the third column of sub-pixel pairs 10 are connected to the same data line; the sub-pixel pairs 10 in the even-numbered rows and the sub-pixel pairs 10 in the odd-numbered rows of the first column of sub-pixel pairs 10 are connected to the same data line.
It should be noted that, in the embodiment of the present invention, the polarities of the data signals transmitted by two adjacent data lines are opposite. For example, in one frame period, the data signal transmitted by the first data line is positive, the data signal transmitted by the second data line is negative, and the data signal transmitted by the third data line is positive.
Since one data line is connected to each sub-pixel pair 10 in the odd-numbered row of the sub-pixel pair 10 in one column and each sub-pixel pair 10 in the even-numbered row of the sub-pixel pair 10 in the adjacent column, the polarities of the sub-pixel pairs 10 in the two adjacent columns are opposite, and the polarities of the sub-pixel pairs 10 in the two adjacent rows are also opposite, so that the double-dot inversion with the sub-pixel pair 10 as a unit is realized along the row direction, and the single-dot inversion with the sub-pixel as a unit is realized along the column direction, which is beneficial to improving the wobbling pattern and reducing the visual defects of the display.
In the array substrate provided by the embodiment of the invention, by arranging a plurality of pixels, a plurality of gate line pairs and a plurality of data lines which are distributed in an array, each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, every two adjacent sub-pixels in the same row of pixels form a sub-pixel pair 10, and the sub-pixel pairs 10 in the same column correspond to the same color; the gate line pair comprises two gate lines which are arranged in parallel, the pixels in the same row are connected with the two gate lines in the same gate line pair, and two sub-pixels in each sub-pixel pair 10 are respectively connected with different gate lines; two sub-pixels in each sub-pixel pair 10 are respectively connected with the same data line, and the same data line is connected with each sub-pixel pair 10 positioned in an odd-numbered row in one column of sub-pixel pairs 10 and is connected with each sub-pixel pair 10 positioned in an even-numbered row in the adjacent column of sub-pixel pairs 10; the data lines are zigzag and cross over the sub-pixel pairs 10 of adjacent rows for multiple times, so that when a pure color picture is displayed, the corresponding polarities of the sub-pixels are irregular, and the problem of inconsistent brightness of positive and negative polarities caused by coupling is solved, thereby improving the display effect.
Alternatively, as shown in fig. 2-5, each pixel includes three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel.
The switch unit of the first color sub-pixel in the same row is connected with one grid line in the same grid line pair, and the switch unit of the second color sub-pixel is connected with the other grid line in the same grid line pair.
It should be noted that, when the switch unit of the same color sub-pixel in the same row is partially connected to one gate line in the same gate line pair and partially connected to another gate line, the switch unit of the first color sub-pixel in the same row is connected to one gate line in the same gate line pair, and the switch unit of the second color sub-pixel is connected to another gate line in the same gate line pair, under the control of the clock signal, the gate scanning signals provided by the gate lines are consistent, that is, the opening conditions of the switch units are consistent and have no difference, so that the display uniformity of the first color sub-pixel and the second color sub-pixel in the same row is ensured, and the display effect is improved.
It can be understood that, since the two sub-pixels in each sub-pixel pair 10 are respectively connected to different gate lines, when the switching unit of the first color sub-pixel in the same row is connected to one gate line in the same gate line pair, and the switching unit of the second color sub-pixel is connected to the other gate line in the same gate line pair, the gate line connected to the switching unit of the third color sub-pixel depends on the connection condition of the other sub-pixel in the same sub-pixel pair 10, and the gate line that should be connected to the other sub-pixel belongs to different gate lines in the same gate line pair.
For example, the gate line pair includes a first gate line and a second gate line, and if the first color is red and the second color is green, the switching unit of the red sub-pixel in the same row is connected to the first gate line in the same gate line pair, and the switching unit of the green sub-pixel is connected to the second gate line; or the switch unit of the red sub-pixel is connected with the second grid line in the same grid line pair, and the switch unit of the green sub-pixel is connected with the first grid line; based on this, the switching unit of the blue sub-pixel is connected to the first gate line or the second gate line, which should be determined according to the fact that the gate line connected to the other sub-pixel in the same sub-pixel pair 10 belongs to different gate lines in the same gate line pair.
If the first color is green and the second color is blue, the switching unit of the green sub-pixel in the same row is connected with the first grid line in the same grid line pair, and the switching unit of the blue sub-pixel is connected with the second grid line; or the switch unit of the green sub-pixel is connected with the second grid line in the same grid line pair, and the switch unit of the blue sub-pixel is connected with the first grid line; based on this, the switching unit of the red sub-pixel is connected to the first gate line or the second gate line, which should be determined according to the fact that the gate line connected to the other sub-pixel in the same sub-pixel pair 10 belongs to different gate lines in the same gate line pair.
If the first color is blue and the second color is red, the switching unit of the blue sub-pixel in the same row is connected with the first grid line in the same grid line pair, and the switching unit of the red sub-pixel is connected with the second grid line; or the switch unit of the blue sub-pixel is connected with the second grid line in the same grid line pair, and the switch unit of the red sub-pixel is connected with the first grid line; based on this, the switching unit of the green sub-pixel is connected to the first gate line or the second gate line, which should be determined according to the fact that the gate line connected to the other sub-pixel in the same sub-pixel pair 10 belongs to different gate lines in the same gate line pair.
Alternatively, as shown in fig. 2-5, the first color is red, the second color is green, and the third color is blue.
Alternatively, as shown in fig. 3 to 5, two gate lines of the same gate line pair are distributed on both sides of the same row of pixels.
And aiming at each sub-pixel in each column of sub-pixels, the grid lines are respectively connected with the grid lines which are distributed on the same side of the row of pixels where the sub-pixels are positioned in the corresponding grid line pair.
Illustratively, a plurality of pixels are arranged in an array, each pixel comprises a red sub-pixel, a green sub-pixel and a blue sub-pixel, and the sub-pixels in the same column correspond to 10 same colors. If the grid lines comprise a first grid line and a second grid line, the first grid line is distributed on the upper side of the same row of pixels, and the second grid line is distributed on the lower side of the same row of pixels.
The first column is a red sub-pixel, the second column is a green sub-pixel, and the red sub-pixel of the first column and the green sub-pixel of the second column in each row are a sub-pixel pair 10, so that the red sub-pixel of the first column in the first row is connected with the first grid line distributed at the upper side in the corresponding first grid line pair, the red sub-pixel of the first column in the second row is connected with the first grid line distributed at the upper side in the corresponding second grid line pair, and so on, the red sub-pixel of the first column in the last row is connected with the first grid line distributed at the upper side in the corresponding last grid line pair; meanwhile, the green sub-pixels in the first row and the second column are connected with the second grid lines which are distributed on the lower side of the corresponding first grid line pair, the green sub-pixels in the second row and the second column are connected with the second grid lines which are distributed on the lower side of the corresponding second grid line pair, and so on, and the green sub-pixels in the last row and the second column are connected with the second grid lines which are distributed on the lower side of the corresponding last grid line pair.
Or, the first row and first column of red subpixels are connected to the second gate line distributed on the lower side of the corresponding first gate line pair, the second row and first column of red subpixels are connected to the second gate line distributed on the lower side of the corresponding second gate line pair, and so on, and the last row and first column of red subpixels are connected to the second gate line distributed on the lower side of the corresponding last gate line pair; meanwhile, the green sub-pixels in the first row and the second column are connected with the first grid lines which are distributed on the upper side in the corresponding first grid line pairs, the green sub-pixels in the second row and the second column are connected with the first grid lines which are distributed on the upper side in the corresponding second grid line pairs, and so on, and the green sub-pixels in the last row and the second column are connected with the first grid lines which are distributed on the upper side in the corresponding last grid line pairs.
It should be noted that "upper side" and "lower side" are only used to indicate a positional relationship, and when the absolute position of the description object is changed, the relative positional relationship may also be changed accordingly.
Alternatively, as shown in fig. 5, the sub-pixel pairs 10 connected to different gate lines in adjacent gate line pairs between two adjacent rows of pixels and connected to the same data line have different colors.
Illustratively, the first row and second column subpixel pairs 10 comprise red subpixelsPrime R12And green sub-pixel G12Red sub-pixel R12Connecting the first gate line of the corresponding first gate line pair, green sub-pixel G12And connecting the second grid line in the corresponding first grid line pair. If each sub-pixel in each row of sub-pixels is connected to the gate line distributed on the same side of the row of pixels where the sub-pixel is located in the corresponding gate line pair, the second row and second column of sub-pixel pair 10 includes a red sub-pixel R22And green sub-pixel G22Then the red sub-pixel R22Connecting the first gate line of the corresponding second gate line pair, green sub-pixel G22Connecting the second gate line in the corresponding second pair of gate lines.
The first row and third column subpixel pair 10 comprises a blue subpixel B13And a red sub-pixel R13Blue sub-pixel B13Connecting the second gate line of the corresponding first gate line pair, the red sub-pixel R13And connecting the first grid line in the corresponding first grid line pair.
On this basis, the same data line is connected to the first row and the third column of sub-pixel pairs 10, and the second row and the second column of sub-pixels. In this way, the sub-pixel connected to the second gate line in the first gate line pair is a blue sub-pixel, the sub-pixel connected to the first gate line in the second gate line pair is a red sub-pixel, and the blue sub-pixel and the red sub-pixel are connected to the same data line, but the corresponding colors are different.
Optionally, the array substrate further includes a plurality of common electrode lines.
The common electrode line is perpendicular to the gate line and is disposed between two adjacent sub-pixel pairs 10 of each row of pixels.
By arranging the common electrode line between the two sub-pixels of each sub-pixel pair 10, the display uniformity of the two sub-pixels is ensured and the display effect is improved by using the relatively stable voltage of the common electrode line.
An embodiment of the present invention further provides a driving method of an array substrate, as shown in fig. 6, including:
and S10, providing a grid scanning signal to the grid lines according to a preset sequence.
It is understood that the plurality of gate lines supply the gate scan signals to the plurality of gate lines in a predetermined sequence under the control of the clock signal.
S20, when a gate scanning signal is supplied to each gate line, a corresponding data signal is input to each data line.
For example, as shown in fig. 7, if the Gate scan signals are sequentially provided to the Gate lines in a predetermined sequence, and for an image frame, the Gate scan signals are respectively provided to the 1 st to 8 th Gate lines (Gate1 to Gate8) under the control of the first to eighth clock signals (CLK 1 to CLK8 shown in the figure), and the sub-pixels connected to each Gate line are correspondingly charged.
Specifically, after charging of each sub-pixel connected to the 1 st gate line is completed, a gate scanning signal is provided to the 2 nd gate line; after the charging of each sub-pixel connected with the 2 nd grid line is completed, providing a grid scanning signal for the 3 rd grid line; and the rest is repeated until the 8 th grid line is provided with a grid scanning signal after the charging of each sub-pixel connected with the 7 th grid line is completed.
In the driving method of the array substrate provided by the embodiment of the invention, the gate scanning signals are provided to the plurality of gate lines according to the preset sequence, and when the gate scanning signals are provided to each gate line, the corresponding data signals are input to each data line, so as to drive the array substrate to display.
On the basis of the above, since the data line crosses the sub-pixel pair 10 of the adjacent column a plurality of times to realize the same color, the polarity irregularity occurs. However, when a pure color picture is displayed, the output voltage on each data line needs to be changed continuously.
For example, taking red as an example, assuming that the data voltage Vp is +5V and the common voltage Vcom is 0V, to drive the array substrate shown in fig. 5, when the first gate line is turned on, the data line S2 needs to output +5V to the red subpixel on the right side; when the second gate line is turned on, the data line S2 needs to output 0V to the left blue subpixel; when the third gate line is turned on, the data line S2 needs to output +5V to the red subpixel on the left side; when the fourth gate line is turned on, the data line S2 needs to output 0V to the green sub-pixel on the right. Thus, the output voltage of the data line needs to be converted from 0V to +5V many times, resulting in poor expressive force in terms of heavy-duty driving power consumption.
In order to solve the above problem, optionally, the supplying a gate scan signal to a plurality of gate lines in a preset order includes:
sequentially providing a grid scanning signal to the ith (n-1) multiplied by 4 rows of grid lines; i belongs to {1,3,2,4 }; n is equal to {1,2,3,4 }.
The above steps are cycled until all gate lines are provided with gate scanning signals, and each value of i is increased by 16 every cycle.
It should be noted that, for an image frame, under the control of the first clock signal to the sixteenth clock signal, the following specific steps are performed:
after the charging of each sub-pixel connected with the 1 st grid line is completed, providing a grid scanning signal for the 5 th grid line;
after the charging of each sub-pixel connected with the 5 th grid line is completed, a grid scanning signal is provided for the 9 th grid line;
after the charging of each sub-pixel connected with the 9 th grid line is completed, providing a grid scanning signal for the 13 th grid line;
after the charging of each sub-pixel connected with the 13 th grid line is completed, providing a grid scanning signal for the 3 rd grid line;
after the charging of each sub-pixel connected with the 3 rd grid line is completed, a grid scanning signal is provided for the 7 th grid line;
after the charging of each sub-pixel connected with the 7 th grid line is completed, a grid scanning signal is provided for the 11 th grid line;
after the charging of each sub-pixel connected with the 11 th grid line is completed, providing a grid scanning signal for the 15 th grid line;
after the charging of each sub-pixel connected with the 15 th grid line is completed, providing a grid scanning signal for the 2 nd grid line;
after the charging of each sub-pixel connected with the 2 nd grid line is completed, providing a grid scanning signal for the 6 th grid line;
after the charging of each sub-pixel connected with the 6 th grid line is completed, a grid scanning signal is provided for the 10 th grid line;
after the charging of each sub-pixel connected with the 10 th grid line is completed, providing a grid scanning signal to the 14 th grid line;
after the charging of each sub-pixel connected with the 14 th grid line is completed, a grid scanning signal is provided for the 4 th grid line;
after the charging of each sub-pixel connected with the 4 th grid line is completed, a grid scanning signal is provided for the 8 th grid line;
after the charging of each sub-pixel connected with the 8 th grid line is completed, a grid scanning signal is provided for the 12 th grid line;
after the charging of each sub-pixel connected with the 12 th grid line is completed, a grid scanning signal is provided for the 16 th grid line;
then, each value of i is increased by 16 and updated to {17,19,18,20 }.
Under the control of 16 clock signals, cycling is started from the 17 th grid line, namely, after the charging of each sub-pixel connected with the 16 th grid line is completed, a grid scanning signal is supplied to the 17 th grid line;
after the charging of each sub-pixel connected with the 17 th grid line is completed, a grid scanning signal is provided for the 21 st grid line; and the rest is done until all the grid lines are provided with grid scanning signals.
For example, as shown in fig. 8, the driving module outputs clock signals, each clock signal corresponds to two gate lines, and sequentially provides gate scanning signals to the gate lines in the i + (n-1) x 4 th row according to a preset sequence; i belongs to {1,3,2,4 }; n is equal to {1,2,3,4 }. Thus, for example, the gate scan signal is supplied to the 1 st to 16 th gate lines, the sub-pixel color corresponding to the data signal output order of the data line S1 is rrrrrrbbbbggg, and when a pure color picture, for example, red is displayed, the data line S1 continues to output a constant +5V, and then to the blue sub-pixel, the voltage is switched only once, and a constant 0V is continuously output.
Similarly, the sub-pixel color corresponding to the data signal output sequence of the data line S2 is bbbbrrggggbbbb; when a pure color picture, for example, blue is displayed, the data line S2 continuously outputs a constant +5V, and then to the red sub-pixel, the voltage is switched and a constant 0V is continuously output; and then to the blue sub-pixel, the switching voltage continues to output a constant + 5V.
Similarly, the sub-pixel color corresponding to the data signal output sequence of the data line S3 is rrrrbbbbggrrrr; when a pure color picture, for example, green is displayed, the data line S3 continuously outputs a constant 0V and then to the green sub-pixel, the voltage is switched and continuously outputs a constant + 5V; and then to the red sub-pixel, the conversion voltage continues to output a constant 0V.
Based on the driving method, the voltage conversion times of the data lines are greatly reduced, and the power consumption when a pure color picture is displayed is effectively reduced.
An embodiment of the present invention further provides a pixel driving device 3, as shown in fig. 9, including:
the driving module 4 is configured to provide a gate scanning signal to the plurality of gate lines according to a preset sequence, and input a corresponding data signal to each data line when the gate scanning signal is provided to each gate line.
Alternatively, as shown in fig. 9, the driving module 4 includes:
a plurality of gate line driving units 41 for sequentially supplying gate scanning signals to the ith + (n-1) x 4 th row of gate lines; i belongs to {1,3,2,4 }; n is equal to {1,2,3,4 }.
Embodiments of the present invention also provide a display device 1, as shown in fig. 10, including the array substrate 2 as described above, and/or the pixel driving device 3 as described above.
The display device 1 provided by the invention has the same beneficial effects as the array substrate 2, and the description is omitted here.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. An array substrate, comprising:
a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color;
a plurality of gate line pairs; the grid line pair comprises two grid lines which are arranged in parallel, the pixels in the same row are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines;
a plurality of data lines; two sub-pixels in each sub-pixel pair are respectively connected with the same data line, the same data line is connected with each sub-pixel pair positioned in an odd-numbered row in one row of the sub-pixel pairs, and is connected with each sub-pixel pair positioned in an even-numbered row in the adjacent row of the sub-pixel pairs.
2. The array substrate of claim 1, wherein each of the pixels comprises three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel;
and the switch unit of the first color sub-pixel in the same row is connected with one grid line in the same grid line pair, and the switch unit of the second color sub-pixel is connected with the other grid line in the same grid line pair.
3. The array substrate of claim 2, wherein the first color is red, the second color is green, and the third color is blue.
4. The array substrate of claim 1, wherein two gate lines of a same pair of gate lines are distributed on two sides of a same row of the pixels;
and aiming at each sub-pixel in each column of sub-pixels, the grid lines are respectively connected with the grid lines which are distributed on the same side of the pixel in the row where the sub-pixel is positioned in the corresponding grid line pair.
5. The array substrate of claim 1, wherein the sub-pixels connected to the same data line and connected to different gate lines in adjacent pairs of gate lines between two adjacent rows of pixels have different colors.
6. A driving method for the array substrate according to any one of claims 1 to 5, comprising:
providing a grid scanning signal to a plurality of grid lines according to a preset sequence;
when a gate scan signal is supplied to each gate line, a corresponding data signal is input to each data line.
7. The method for driving the array substrate according to claim 6, wherein the providing the gate scanning signals to the plurality of gate lines according to the predetermined sequence comprises:
sequentially providing a grid scanning signal to the ith (n-1) multiplied by 4 rows of grid lines; i belongs to {1,3,2,4 }; n belongs to {1,2,3,4 };
the above steps are cycled until all gate lines are provided with gate scanning signals, and each value of i is increased by 16 every cycle.
8. A pixel driving device, comprising:
and the driving module is used for providing a grid scanning signal to the grid lines according to a preset sequence, and inputting a corresponding data signal to each data line when the grid scanning signal is provided to each grid line.
9. The pixel driving device according to claim 8, wherein the driving module comprises:
the grid line driving units are used for sequentially providing grid scanning signals to the ith + (n-1) multiplied by 4 rows of grid lines; i belongs to {1,3,2,4 }; n is equal to {1,2,3,4 }.
10. A display device comprising an array substrate according to any one of claims 1 to 5 and/or a pixel driving device according to any one of claims 8 to 9.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111477138A (en) * | 2020-04-08 | 2020-07-31 | 福建华佳彩有限公司 | Power consumption-saving display screen framework and driving method |
| CN112562573A (en) * | 2020-12-30 | 2021-03-26 | 厦门天马微电子有限公司 | Display panel and display device |
| CN113936619A (en) * | 2021-10-28 | 2022-01-14 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display panel, driving method thereof and terminal |
| CN113948025A (en) * | 2020-07-15 | 2022-01-18 | 瀚宇彩晶股份有限公司 | Driving method of display panel |
| WO2022205164A1 (en) * | 2021-03-31 | 2022-10-06 | 京东方科技集团股份有限公司 | Display panel and driving method therefor, and display device |
| CN115240612A (en) * | 2022-08-24 | 2022-10-25 | 北京京东方显示技术有限公司 | Display panel and display device |
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1722198A (en) * | 2004-04-19 | 2006-01-18 | 三星电子株式会社 | Display device |
| CN1808250A (en) * | 2004-12-20 | 2006-07-26 | 三星电子株式会社 | Thin film transistor array panel and display device |
| CN101387804A (en) * | 2008-11-03 | 2009-03-18 | 友达光电股份有限公司 | LCD with double-point inversion |
| CN101726952A (en) * | 2009-12-30 | 2010-06-09 | 昆山龙腾光电有限公司 | Liquid crystal display panel and liquid crystal display device |
| CN102087842A (en) * | 2009-12-03 | 2011-06-08 | 乐金显示有限公司 | Liquid crystal display |
| CN102290026A (en) * | 2011-07-19 | 2011-12-21 | 南京中电熊猫液晶显示科技有限公司 | Pixel framework |
| CN104090440A (en) * | 2014-06-30 | 2014-10-08 | 上海天马微电子有限公司 | Pixel structure, liquid crystal display array substrate and liquid crystal display panel |
| WO2017177491A1 (en) * | 2016-04-13 | 2017-10-19 | 深圳市华星光电技术有限公司 | Liquid crystal display circuit and liquid crystal display driving method |
| US20170301696A1 (en) * | 2015-05-22 | 2017-10-19 | Boe Technology Group Co., Ltd. | Array Substrate, Display Panel and Display Apparatus |
| US20180053478A1 (en) * | 2016-01-13 | 2018-02-22 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Liquid crystal display panel and driving method thereof |
| CN109817150A (en) * | 2019-03-28 | 2019-05-28 | 京东方科技集团股份有限公司 | A kind of image element driving method, pixel driving device and display device |
| CN110349550A (en) * | 2019-07-18 | 2019-10-18 | 京东方科技集团股份有限公司 | Image element driving method and its circuit and display device |
| CN110379390A (en) * | 2019-07-01 | 2019-10-25 | 武汉天马微电子有限公司 | A kind of display panel, its driving method and display device |
| CN110456585A (en) * | 2019-08-19 | 2019-11-15 | 京东方科技集团股份有限公司 | Double grid array substrate and display device |
-
2020
- 2020-01-03 CN CN202010006364.6A patent/CN110956921B/en active Active
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1722198A (en) * | 2004-04-19 | 2006-01-18 | 三星电子株式会社 | Display device |
| CN1808250A (en) * | 2004-12-20 | 2006-07-26 | 三星电子株式会社 | Thin film transistor array panel and display device |
| CN101387804A (en) * | 2008-11-03 | 2009-03-18 | 友达光电股份有限公司 | LCD with double-point inversion |
| CN102087842A (en) * | 2009-12-03 | 2011-06-08 | 乐金显示有限公司 | Liquid crystal display |
| CN101726952A (en) * | 2009-12-30 | 2010-06-09 | 昆山龙腾光电有限公司 | Liquid crystal display panel and liquid crystal display device |
| CN102290026A (en) * | 2011-07-19 | 2011-12-21 | 南京中电熊猫液晶显示科技有限公司 | Pixel framework |
| CN104090440A (en) * | 2014-06-30 | 2014-10-08 | 上海天马微电子有限公司 | Pixel structure, liquid crystal display array substrate and liquid crystal display panel |
| US20170301696A1 (en) * | 2015-05-22 | 2017-10-19 | Boe Technology Group Co., Ltd. | Array Substrate, Display Panel and Display Apparatus |
| US20180053478A1 (en) * | 2016-01-13 | 2018-02-22 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Liquid crystal display panel and driving method thereof |
| WO2017177491A1 (en) * | 2016-04-13 | 2017-10-19 | 深圳市华星光电技术有限公司 | Liquid crystal display circuit and liquid crystal display driving method |
| CN109817150A (en) * | 2019-03-28 | 2019-05-28 | 京东方科技集团股份有限公司 | A kind of image element driving method, pixel driving device and display device |
| CN110379390A (en) * | 2019-07-01 | 2019-10-25 | 武汉天马微电子有限公司 | A kind of display panel, its driving method and display device |
| CN110349550A (en) * | 2019-07-18 | 2019-10-18 | 京东方科技集团股份有限公司 | Image element driving method and its circuit and display device |
| CN110456585A (en) * | 2019-08-19 | 2019-11-15 | 京东方科技集团股份有限公司 | Double grid array substrate and display device |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111477138A (en) * | 2020-04-08 | 2020-07-31 | 福建华佳彩有限公司 | Power consumption-saving display screen framework and driving method |
| CN113948025A (en) * | 2020-07-15 | 2022-01-18 | 瀚宇彩晶股份有限公司 | Driving method of display panel |
| CN112562573A (en) * | 2020-12-30 | 2021-03-26 | 厦门天马微电子有限公司 | Display panel and display device |
| WO2022205164A1 (en) * | 2021-03-31 | 2022-10-06 | 京东方科技集团股份有限公司 | Display panel and driving method therefor, and display device |
| US11948529B2 (en) | 2021-03-31 | 2024-04-02 | Beijing Boe Display Technology Co., Ltd. | Display panel with good display effect and method of driving the same, and display apparatus |
| CN113936619A (en) * | 2021-10-28 | 2022-01-14 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display panel, driving method thereof and terminal |
| CN113936619B (en) * | 2021-10-28 | 2022-08-23 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display panel, driving method thereof and terminal |
| US11922895B2 (en) | 2021-10-28 | 2024-03-05 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Liquid crystal display panel, driving method, and terminal thereof |
| CN115240612A (en) * | 2022-08-24 | 2022-10-25 | 北京京东方显示技术有限公司 | Display panel and display device |
| CN115240612B (en) * | 2022-08-24 | 2023-12-05 | 北京京东方显示技术有限公司 | Display panel and display device |
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