CN110956921B - Array substrate, driving method thereof, pixel driving device and display device - Google Patents
Array substrate, driving method thereof, pixel driving device and display device Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 33
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- 230000000694 effects Effects 0.000 abstract description 8
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
Abstract
The embodiment of the invention provides an array substrate, a driving method thereof, a pixel driving device and a display device, relates to the technical field of display, and can improve the display effect. An array substrate, comprising: a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; a plurality of gate line pairs; the grid line pair comprises two grid lines which are arranged in parallel, the same row of pixels are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; a plurality of data lines; the two sub-pixels in each sub-pixel pair are respectively connected with the same data line, and the same data line is connected with each sub-pixel pair in an odd-numbered row in one column of sub-pixel pairs and each sub-pixel pair in an even-numbered row in an adjacent column of sub-pixel pairs.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to an array substrate, a driving method thereof, a pixel driving device, and a display device.
Background
In the background of the continuous development of low cost and high quality display devices, array substrate row driving (GOA, gate Driver On Array) designs driven by Dual gates have been widely used.
In addition, in order to increase the duty ratio of the display device, a data line is generally used to drive two adjacent columns to drive the sub-pixels, as shown in fig. 1, so as to achieve the purpose of reducing the frame by reducing the number of data lines.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a driving method thereof, a pixel driving device and a display device, which can improve the display effect.
In order to achieve the above purpose, the embodiment of the present invention adopts the following technical scheme:
in one aspect, there is provided an array substrate including: a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of the pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; a plurality of gate line pairs; the grid line pair comprises two grid lines which are arranged in parallel, the same row of pixels are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; a plurality of data lines; the two sub-pixels in each sub-pixel pair are respectively connected with the same data line, the same data line is connected with each sub-pixel pair in an odd-numbered row in one row of the sub-pixel pairs, and is connected with each sub-pixel pair in an even-numbered row in an adjacent row of the sub-pixel pairs.
Optionally, each of the pixels comprises three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; the switch units of the first color sub-pixels in the same row are connected with one grid line in the same grid line pair, and the switch units of the second color sub-pixels are connected with the other grid line in the same grid line pair.
Optionally, the first color is red, the second color is green, and the third color is blue.
Optionally, two gate lines of the same gate line pair are distributed on two sides of the pixels of the same row; each sub-pixel in each column of the sub-pixels is respectively connected with the corresponding grid line which is distributed on the same side of one row of the pixels where the sub-pixels are located.
Optionally, colors corresponding to the sub-pixels connected to the same data line are different, each of the colors being connected to a different one of adjacent pairs of gate lines between two adjacent rows of pixels.
In still another aspect, there is provided a driving method for an array substrate as described above, supplying gate scan signals to a plurality of gate lines in a preset order; when a gate scan signal is supplied to each gate line, a corresponding data signal is input to each data line.
Optionally, the providing the gate scan signals to the plurality of gate lines in a preset sequence includes: sequentially providing gate scanning signals for the (i+ (n-1) x 4 row gate lines; i e {1,3,2,4}; n.epsilon {1,2,3,4}; the above steps are cycled until gate scan signals are provided to all gate lines, and each value of i is increased by 16 every cycle.
In another aspect, there is provided a pixel driving apparatus including: and a driving module for providing gate scan signals to the plurality of gate lines in a preset order, and inputting corresponding data signals to the data lines when the gate scan signals are provided to each gate line.
Optionally, the driving module includes: a plurality of gate line driving units for sequentially supplying gate scan signals to the (n-1) th x 4 th row gate lines; i e {1,3,2,4}; n.epsilon. {1,2,3,4}.
In yet another aspect, a display device is provided, comprising an array substrate as described above, and/or a pixel driving device as described above.
According to the array substrate, the driving method thereof, the pixel driving device and the display device, the plurality of pixels, the plurality of grid line pairs and the plurality of data lines are distributed in an array mode, each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, every two adjacent sub-pixels in the same row of pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; the grid line pair comprises two grid lines which are arranged in parallel, the same row of pixels are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; the two sub-pixels in each sub-pixel pair are respectively connected with the same data line, and the same data line is connected with each sub-pixel pair in an odd-numbered row in one column of sub-pixel pairs and each sub-pixel pair in an even-numbered row in the adjacent column of sub-pixel pairs; the data lines are zigzag and cross the sub-pixel pairs of adjacent columns for a plurality of times, so that when a pure-color picture is displayed, the problem of inconsistent brightness of positive and negative polarities caused by scattering coupling occurs due to irregular polarities of the sub-pixels, and the display effect is further improved.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an array substrate in the prior art;
fig. 2 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 6 is a schematic flow chart of a driving method of an array substrate according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a clock signal according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another clock signal according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a pixel driving device according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Reference numerals:
1-a display device; 2-an array substrate; 3-pixel driving means; 4-a driving module; 41-a gate line driving unit; 10-subpixel pairs.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
As shown in fig. 1, the array substrate 2 of the related art includes a plurality of pixels, a plurality of gate line pairs, and a plurality of data lines arranged in an array. Each pixel of the same row includes a plurality of subpixels corresponding to different colors (e.g., each pixel includes three subpixels corresponding to three primary colors, i.e., a red subpixel, a green subpixel, and a blue subpixel), and subpixels of the same column correspond to the same color. The grid line pair comprises two grid lines which are arranged in parallel, each sub-pixel positioned in an odd column in the same row of pixels is connected with one grid line in the grid line pair, and each sub-pixel positioned in an even column is connected with the other grid line in the same grid line pair; every two columns of sub-pixels are connected with one data line.
The driving module sequentially provides gate scanning signals for the gate lines under the control of the clock signals. During the period that the gate scanning signal of 2n+1 (N is a positive integer greater than or equal to 0) is at high level, the pixels corresponding to the 2n+1 row are always in a storage electric quantity state, and when the gate scanning signal of 2n row is pulled down, the pixels driven by the gate scanning signal of 2n+1 row are coupled, so that the corresponding pixels are not sufficiently driven to cause inconsistent brightness of positive and negative polarities of the pixels displaying the same color, and further adverse effects are caused on display effect and quality.
In view of the foregoing, an embodiment of the present invention provides an array substrate, as shown in fig. 2 to 5, including:
a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of pixels form a sub-pixel pair 10, and the sub-pixel pairs 10 in the same column correspond to the same color.
It will be appreciated that if each pixel includes a plurality of sub-pixels corresponding to different colors, the sub-pixels corresponding to the different colors are arranged periodically for the same row of pixels.
In one example, each pixel includes sub-pixels corresponding to three colors, namely, a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; wherein, in the same row, the first color sub-pixel and the second color sub-pixel in the first pixel form a sub-pixel pair 10, the third color sub-pixel in the first pixel and the first color sub-pixel in the second pixel adjacent to the first color sub-pixel form a sub-pixel pair 10, the second color sub-pixel and the third color sub-pixel in the second pixel form a sub-pixel pair 10, and so on.
Example two, each pixel includes sub-pixels corresponding to four colors, namely a first color sub-pixel, a second color sub-pixel, a third color sub-pixel and a fourth color sub-pixel; wherein, in the same row, the first color sub-pixel and the second color sub-pixel in the first pixel form a sub-pixel pair 10, the third color sub-pixel and the fourth color sub-pixel in the first pixel form a sub-pixel pair 10, and so on.
A plurality of gate line pairs; the gate line pair includes two gate lines arranged in parallel, and the same row of pixels is connected to two gate lines in the same gate line pair, wherein two sub-pixels in each sub-pixel pair 10 are respectively connected to different gate lines.
For example, if two gate lines included in a gate line pair are a first gate line and a second gate line, in the sub-pixel pair 10 including a first color sub-pixel and a second color sub-pixel, the first color sub-pixel is connected to the first gate line, the second color sub-pixel is connected to the second gate line, or the first color sub-pixel is connected to the second gate line, and the second color sub-pixel is connected to the first gate line.
A plurality of data lines; the two sub-pixels in each sub-pixel pair 10 are respectively connected with the same data line, and the same data line is connected with each sub-pixel pair 10 in the odd-numbered row in one column of sub-pixel pairs 10 and is connected with each sub-pixel pair 10 in the even-numbered row in the adjacent column of sub-pixel pairs 10.
It will be appreciated that since the same data line is connected to each subpixel pair 10 in an odd row of one column of subpixel pairs 10 and to each subpixel pair 10 in an even row of an adjacent column of subpixel pairs 10, the data line extends in a right angle Zigzag (Zigzag) along the pixel column direction.
For example, if there are a plurality of columns of sub-pixel pairs 10, for the second column of sub-pixel pairs 10, two sub-pixels in each sub-pixel pair 10 are respectively connected to the same data line, and on the basis, for each sub-pixel pair 10 in the second column of sub-pixel pairs 10, each sub-pixel pair 10 located in an odd-numbered row and each sub-pixel pair 10 located in an even-numbered row in the first column of sub-pixel pairs 10 are connected to the same data line; each sub-pixel pair 10 located in even rows and each sub-pixel pair 10 located in odd rows of the third column sub-pixel pair 10 are connected to the same data line; alternatively, each subpixel pair 10 located in the odd-numbered row and each subpixel pair 10 located in the even-numbered row of the third column subpixel pair 10 are connected to the same data line; the sub-pixel pairs 10 located in even rows and the sub-pixel pairs 10 located in odd rows of the first column of sub-pixel pairs 10 are connected to the same data line.
It should be noted that, in the embodiment of the present invention, the polarities of the data signals transmitted by the two adjacent data lines are opposite. For example, in one frame period, the data signal transmitted by the first data line has positive polarity, the data signal transmitted by the second data line has negative polarity, and the data signal transmitted by the third data line has positive polarity.
Since one data line is connected to each of the sub-pixel pairs 10 located in the odd-numbered rows of the one column of sub-pixel pairs 10 and is connected to each of the sub-pixel pairs 10 located in the even-numbered rows of the adjacent column of sub-pixel pairs 10, the polarities of the adjacent two columns of sub-pixel pairs 10 are opposite, and the polarities of the adjacent two rows of sub-pixel pairs 10 are also opposite, so that the double dot inversion in the unit of the sub-pixel pairs 10 is realized along the row direction, the single dot inversion in the unit of the sub-pixel is realized along the column direction, the improvement of the shaking pattern is facilitated, and the visual defects of the display are reduced.
In the array substrate provided by the embodiment of the invention, a plurality of pixels, a plurality of grid line pairs and a plurality of data lines are distributed in an array manner, each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of pixels form a sub-pixel pair 10, and the sub-pixels in the same column correspond to the same color 10; the grid line pair comprises two grid lines which are arranged in parallel, the same row of pixels are connected with the two grid lines in the same grid line pair, and two sub-pixels in each sub-pixel pair 10 are respectively connected with different grid lines; the two sub-pixels in each sub-pixel pair 10 are respectively connected with the same data line, and the same data line is connected with each sub-pixel pair 10 in an odd row in one column of sub-pixel pairs 10 and is connected with each sub-pixel pair 10 in an even row in the adjacent column of sub-pixel pairs 10; the data lines are zigzag and cross the sub-pixel pairs 10 of adjacent columns for a plurality of times, so that when a pure-color picture is displayed, the problem of inconsistent brightness of positive and negative polarities caused by scattering coupling occurs due to irregular polarities of the sub-pixels, and the display effect is further improved.
Alternatively, as shown in fig. 2-5, each pixel includes three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are a first color sub-pixel, a second color sub-pixel and a third color sub-pixel respectively.
The switch units of the first color sub-pixels of the same row are connected with one gate line of the same gate line pair, and the switch units of the second color sub-pixels are connected with the other gate line of the same gate line pair.
It should be noted that, when the switch units of the same row of the same color sub-pixels are partially connected to one gate line in the same gate line pair and partially connected to the other gate line, the switch units of the same row of the first color sub-pixels are connected to one gate line in the same gate line pair, and the switch units of the second color sub-pixels are connected to the other gate line in the same gate line pair, under the control of the clock signal, the gate scan signals provided by the gate lines are consistent, that is, the opening conditions of the switch units are consistent and have no difference, so that the display uniformity of the first color sub-pixels and the second color sub-pixels in the same row is ensured, and the display effect is improved.
It will be appreciated that since the two sub-pixels in each sub-pixel pair 10 are respectively connected to different gate lines, when the switch unit of the first color sub-pixel of the same row is connected to one gate line in the same gate line pair and the switch unit of the second color sub-pixel is connected to the other gate line in the same gate line pair, the gate line to which the switch unit of the third color sub-pixel is connected depends on the connection condition of the other sub-pixel in the same sub-pixel pair 10, and the gate line to which the other sub-pixel should be connected belongs to different gate lines in the same gate line pair.
For example, the gate line pair includes a first gate line and a second gate line, if the first color is red and the second color is green, the switch units of the same row of red sub-pixels are connected to the first gate line in the same gate line pair, and the switch units of the green sub-pixels are connected to the second gate line; or the switch unit of the red sub-pixel is connected with the second grid line in the same grid line pair, and the switch unit of the green sub-pixel is connected with the first grid line; based on this, the switching unit of the blue subpixel is connected to the first gate line or the second gate line, depending on whether the gate line connected to the other subpixel in the same subpixel pair 10 belongs to a different gate line in the same pair.
If the first color is green and the second color is blue, the switch units of the same row of green sub-pixels are connected with the first grid line in the same grid line pair, and the switch units of the blue sub-pixels are connected with the second grid line; or the switch unit of the green sub-pixel is connected with the second grid line in the same grid line pair, and the switch unit of the blue sub-pixel is connected with the first grid line; based on this, the switching unit of the red subpixel is connected to the first gate line or the second gate line, depending on whether the gate line connected to the other subpixel in the same subpixel pair 10 belongs to a different gate line in the same pair.
If the first color is blue and the second color is red, the switch units of the same row of blue sub-pixels are connected with the first grid line in the same grid line pair, and the switch units of the red sub-pixels are connected with the second grid line; or the switch unit of the blue sub-pixel is connected with the second grid line in the same grid line pair, and the switch unit of the red sub-pixel is connected with the first grid line; based on this, the switching unit of the green sub-pixel is connected to the first gate line or the second gate line, and should be determined according to the gate line connected to the other sub-pixel of the same sub-pixel pair 10 belonging to different gate lines of the same gate line pair.
Alternatively, as shown in fig. 2-5, the first color is red, the second color is green, and the third color is blue.
Alternatively, as shown in fig. 3 to 5, two gate lines of the same gate line pair are distributed on both sides of the same row of pixels.
Each sub-pixel in each column of sub-pixels is respectively connected with the grid lines distributed on the same side of a row of pixels where the sub-pixels are located in the corresponding grid line pair.
For example, a plurality of pixels are arranged in an array, each pixel includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel, and the same column of sub-pixels corresponds to the same color as 10. If the grid lines comprise a first grid line and a second grid line, the first grid line is distributed on the upper side of the pixels in the same row, and the second grid line is distributed on the lower side of the pixels in the same row.
The first column is a red sub-pixel, the second column is a green sub-pixel, and the red sub-pixel and the green sub-pixel of the second column in each row are a sub-pixel pair 10, the red sub-pixel of the first row and the first column is connected with the first grid line distributed on the upper side of the corresponding first grid line pair, the red sub-pixel of the second row and the first column is connected with the first grid line distributed on the upper side of the corresponding second grid line pair, and the red sub-pixel of the last row and the first column is connected with the first grid line distributed on the upper side of the corresponding last grid line pair; meanwhile, the first row and the second column of green sub-pixels are connected with the second grid lines distributed on the lower side of the corresponding first grid line pair, the second row and the second column of green sub-pixels are connected with the second grid lines distributed on the lower side of the corresponding second grid line pair, and the like, and the last row and the second column of green sub-pixels are connected with the second grid lines distributed on the lower side of the corresponding last grid line pair.
Or the first row and the first column of red subpixels are connected with the second grid lines distributed on the lower side of the corresponding first grid line pair, the second row and the first column of red subpixels are connected with the second grid lines distributed on the lower side of the corresponding second grid line pair, and so on, and the last row and the first column of red subpixels are connected with the second grid lines distributed on the lower side of the corresponding last grid line pair; meanwhile, the first row and the second column of green sub-pixels are connected with the first grid lines distributed on the upper side of the corresponding first grid line pair, the second row and the second column of green sub-pixels are connected with the first grid lines distributed on the upper side of the corresponding second grid line pair, and the last row and the second column of green sub-pixels are connected with the first grid lines distributed on the upper side of the corresponding last grid line pair.
It should be noted that "upper side" and "lower side" are used only to indicate a positional relationship, and when the absolute position of the object is described as being changed, the relative positional relationship may be changed accordingly.
Alternatively, as shown in fig. 5, the sub-pixel pairs 10 respectively connected to different ones of the adjacent pairs of the gate lines between the adjacent two rows of pixels and connected to the same data line are different in color.
The first row and second column subpixel pair 10 includes a red subpixel R 12 And green subpixel G 12 Red subpixel R 12 A first grid line of the corresponding first grid line pair is connected with the green sub-pixel G 12 And connecting the second grid line in the corresponding first grid line pair. If each of the sub-pixels in each column is connected to the corresponding gate line on the same side of the row of pixels where the sub-pixels are located, the second row and second column sub-pixel pair 10 includes red sub-pixel R 22 And green subpixel G 22 Red subpixel R 22 A first grid line of a corresponding second grid line pair is connected with the green sub-pixel G 22 Connect the second gate of the corresponding second gate line pairA wire.
The first row and third column subpixel pair 10 includes a blue subpixel B 13 And red subpixel R 13 Blue sub-pixel B 13 A second grid line of the corresponding first grid line pair is connected with the red sub-pixel R 13 And connecting the first grid line in the corresponding first grid line pair.
On this basis, the same data line is connected to the first row and third column subpixel pair 10 and the second row and second column subpixels. In this way, the sub-pixel connected to the second gate line in the first pair is a blue sub-pixel, the sub-pixel connected to the first gate line in the second pair is a red sub-pixel, and the blue sub-pixel and the red sub-pixel are connected to the same data line, but the corresponding colors are different.
Optionally, the array substrate further includes a plurality of common electrode lines.
The common electrode line is perpendicular to the gate line and is disposed between two adjacent pairs of subpixels 10 of each row of pixels.
By arranging the common electrode line between the two sub-pixels of each sub-pixel pair 10, the display uniformity of the two sub-pixels is ensured and the display effect is improved by utilizing the relatively stable voltage of the common electrode line.
The embodiment of the invention also provides a driving method of the array substrate, as shown in fig. 6, including:
s10, providing grid scanning signals to a plurality of grid lines according to a preset sequence.
It is understood that the plurality of gate lines supply the gate scan signals to the plurality of gate lines in a preset order under the control of the clock signal.
S20, when a gate scan signal is supplied to each gate line, a corresponding data signal is input to each data line.
For example, as shown in fig. 7, if the Gate scan signals are sequentially provided to the Gate lines in a predetermined order, for an image frame, the corresponding 1 st Gate line to 8 th Gate line (Gate 1 to Gate 8) respectively provide the Gate scan signals under the control of the first clock signal to the eighth clock signal (CLK 1 to CLK8 as shown in the figure), and the sub-pixel connected to each Gate line is accordingly turned on for charging.
Specifically, after the charging of each subpixel connected to the 1 st gate line is completed, a gate scan signal is supplied to the 2 nd gate line; providing a gate scan signal to the 3 rd gate line after the charging of each sub-pixel connected to the 2 nd gate line is completed; and so on until each subpixel connected to the 7 th gate line is charged, and a gate scan signal is supplied to the 8 th gate line.
In the driving method of the array substrate provided by the embodiment of the invention, the gate scanning signals are provided to the plurality of gate lines according to the preset sequence, and when the gate scanning signals are provided to each gate line, the corresponding data signals are input to each data line so as to drive the array substrate to display.
On the basis of the above, since the data line spans the sub-pixel pairs 10 of the adjacent columns a plurality of times, the polarity irregularity occurs under the same color. However, when a solid-color screen is displayed, the output voltage on each data line needs to be changed continuously.
For example, taking red display as an example, assuming that the data voltage vp= +5v and the common voltage vcom=0v, driving the array substrate as shown in fig. 5, the data line S2 needs to output +5v to the right red sub-pixel when the first gate line is turned on; when the second gate line is turned on, the data line S2 needs to output 0V to the blue subpixel on the left side; when the third gate line is turned on, the data line S2 needs to output +5v to the red subpixel on the left side; when the fourth gate line is turned on, the data line S2 needs to output 0V to the right green sub-pixel. Thus, the output voltage of the data line needs to be converted from 0V to +5v plural times, resulting in poor performance in terms of heavy-duty driving power consumption.
In order to solve the above-described problem, optionally, providing gate scan signals to a plurality of gate lines in a preset order includes:
sequentially providing gate scanning signals for the (i+ (n-1) x 4 row gate lines; i e {1,3,2,4}; n.epsilon. {1,2,3,4}.
The above steps are cycled until gate scan signals are provided to all gate lines, and each value of i is increased by 16 every cycle.
It should be noted that, for an image frame, under the control of the first clock signal to the sixteenth clock signal, specifically:
providing a gate scan signal to the 5 th gate line after the charging of each sub-pixel connected to the 1 st gate line is completed;
providing a gate scan signal to the 9 th gate line after the charging of each sub-pixel connected to the 5 th gate line is completed;
providing a gate scan signal to the 13 th gate line after the charging of each sub-pixel connected to the 9 th gate line is completed;
providing a gate scan signal to the 3 rd gate line after the charging of each sub-pixel connected to the 13 th gate line is completed;
providing a gate scan signal to the 7 th gate line after the charging of each sub-pixel connected to the 3 rd gate line is completed;
providing a gate scan signal to the 11 th gate line after the charging of each sub-pixel connected to the 7 th gate line is completed;
providing a gate scan signal to the 15 th gate line after the charging of each sub-pixel connected to the 11 th gate line is completed;
providing a gate scan signal to the 2 nd gate line after the charging of each sub-pixel connected to the 15 th gate line is completed;
providing a gate scan signal to the 6 th gate line after the charging of each sub-pixel connected to the 2 nd gate line is completed;
providing a gate scan signal to the 10 th gate line after the charging of each sub-pixel connected to the 6 th gate line is completed;
providing a gate scan signal to the 14 th gate line after the charging of each sub-pixel connected to the 10 th gate line is completed;
providing a gate scan signal to the 4 th gate line after the charging of each sub-pixel connected to the 14 th gate line is completed;
providing a gate scan signal to the 8 th gate line after the charging of each sub-pixel connected to the 4 th gate line is completed;
providing a gate scan signal to the 12 th gate line after the charging of each sub-pixel connected to the 8 th gate line is completed;
providing a gate scan signal to the 16 th gate line after the charging of each sub-pixel connected to the 12 th gate line is completed;
then, each value of i is increased by 16 and updated to {17,19,18,20}.
A cycle is started from the 17 th gate line, that is, a gate scan signal is supplied to the 17 th gate line after the completion of charging of each sub-pixel connected to the 16 th gate line, again under the control of 16 clock signals;
providing a gate scan signal to the 21 st gate line after the charging of each sub-pixel connected to the 17 th gate line is completed; and so on until all gate lines are provided with gate scan signals.
As an example, as shown in fig. 8, the driving module outputs clock signals, each corresponding to two gate lines, and sequentially supplies gate scan signals to the gate lines of the i+ (n-1) x 4 th row in a preset order; i e {1,3,2,4}; n.epsilon. {1,2,3,4}. Thus, for example, the 1 st to 16 th gate lines are supplied with the gate scan signal, the sub-pixel color corresponding to the data signal output sequence of the data line S1 is rrrrrrbbbbgggg, and when a pure color screen is displayed, for example, red is displayed, the data line S1 continuously outputs a constant +5v, and then the voltage is switched only once and continuously outputs a constant 0V when going to the blue sub-pixel.
Similarly, the sub-pixel color corresponding to the data signal output sequence of the data line S2 is BBBBRRRRGGGGBBBBB; when a pure color picture is displayed, for example, blue is displayed, the data line S2 continuously outputs constant +5V, and then the voltage is converted when the data line S2 reaches the red sub-pixel, and the data line S2 continuously outputs constant 0V; and then to the blue sub-pixel, the conversion voltage continuously outputs constant +5V.
Similarly, the sub-pixel color corresponding to the data signal output sequence of the data line S3 is RRRRBBBBGGGGRRRR; when a pure color picture is displayed, for example, green is displayed, the data line S3 continuously outputs constant 0V, and then the voltage is converted when the data line S reaches the green sub-pixel, and the data line S continuously outputs constant +5V; and then to the red sub-pixel, the conversion voltage continuously outputs constant 0V.
Based on the driving method, the voltage conversion times of the data lines are greatly reduced, and the power consumption when the pure-color pictures are displayed is effectively reduced.
An embodiment of the present invention also provides a pixel driving apparatus 3, as shown in fig. 9, including:
and a driving module 4 for supplying gate scan signals to the plurality of gate lines in a preset order, and inputting corresponding data signals to the respective data lines when the gate scan signals are supplied to each gate line.
Alternatively, as shown in fig. 9, the driving module 4 includes:
a plurality of gate line driving units 41 for sequentially supplying gate scan signals to the i+ (n-1) x 4 th row gate lines; i e {1,3,2,4}; n.epsilon. {1,2,3,4}.
Embodiments of the present invention also provide a display device 1, as shown in fig. 10, including the array substrate 2 as described above, and/or the pixel driving device 3 as described above.
The display device 1 provided by the invention has the same beneficial effects as the array substrate 2, and is not described herein again.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. A display device, comprising: an array substrate and a pixel driving device;
the array substrate includes:
a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of the pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; each pixel comprises three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel;
a plurality of gate line pairs; the grid line pair comprises two grid lines which are arranged in parallel, the same row of pixels are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; the switch units of the first color sub-pixels in the same row are connected with one grid line in the same grid line pair, and the switch units of the second color sub-pixels are connected with the other grid line in the same grid line pair;
a plurality of data lines; two sub-pixels in each sub-pixel pair are respectively connected with the same data line, the same data line is connected with each sub-pixel pair in an odd-numbered row in one row of the sub-pixel pairs, and is connected with each sub-pixel pair in an even-numbered row in an adjacent row of the sub-pixel pairs; the data line extends in a right-angle zigzag manner along the column direction of a column of sub-pixels; two sub-pixels in each sub-pixel pair electrically connected with the same data line are respectively positioned at two sides of the same data line, and the polarities of the two sub-pixels in the same sub-pixel pair are the same; the polarities of the data signals transmitted by two adjacent data lines are opposite;
the pixel driving apparatus includes:
the driving module is used for outputting clock signals, and each clock signal corresponds to two grid lines in the grid line pair; two grid lines corresponding to the clock signals receive grid scanning signals in different time periods; the driving module is used for providing grid scanning signals for a plurality of grid lines according to a preset sequence, and inputting corresponding data signals to each data line when the grid scanning signals are provided for each grid line; the driving module includes: a plurality of gate line driving units; the grid line driving units are used for sequentially providing grid scanning signals for the (i+ (n-1) x 4 row grid lines; i e {1,3,2,4}; n.epsilon. {1,2,3,4}.
2. The display device of claim 1, wherein the first color is red, the second color is green, and the third color is blue.
3. The display device according to claim 1, wherein two gate lines of the same pair of gate lines are distributed on both sides of the pixels of the same row;
each sub-pixel in each column of the sub-pixels is respectively connected with the corresponding grid line which is distributed on the same side of one row of the pixels where the sub-pixels are located.
4. A display device according to claim 1, wherein colors corresponding to the sub-pixels connected to the same data line are different, respectively, to different ones of adjacent pairs of gate lines between adjacent rows of pixels.
5. A driving method for a display device according to any one of claims 1 to 4, comprising:
the pixel driving device provides grid scanning signals for a plurality of grid lines of the array substrate according to a preset sequence;
when a gate scan signal is supplied to each gate line, a corresponding data signal is input to each data line of the array substrate.
6. The driving method of the display device according to claim 5, wherein the pixel driving device supplies the gate scan signals to the plurality of gate lines of the array substrate in a preset order, comprising:
the pixel driving device sequentially provides grid scanning signals for the (i+ (n-1) x 4 row grid lines; i e {1,3,2,4}; n.epsilon {1,2,3,4};
the above steps are cycled until gate scan signals are provided to all gate lines, and each value of i is increased by 16 every cycle.
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| CN111477138A (en) * | 2020-04-08 | 2020-07-31 | 福建华佳彩有限公司 | Power consumption-saving display screen framework and driving method |
| CN113948025A (en) * | 2020-07-15 | 2022-01-18 | 瀚宇彩晶股份有限公司 | Driving method of display panel |
| CN112562573A (en) * | 2020-12-30 | 2021-03-26 | 厦门天马微电子有限公司 | Display panel and display device |
| CN115668354A (en) * | 2021-03-31 | 2023-01-31 | 京东方科技集团股份有限公司 | Display panel, driving method thereof and display device |
| CN113936619B (en) * | 2021-10-28 | 2022-08-23 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display panel, driving method thereof and terminal |
| CN115240612B (en) * | 2022-08-24 | 2023-12-05 | 北京京东方显示技术有限公司 | Display panel and display device |
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