CN102290026A

CN102290026A - Pixel framework

Info

Publication number: CN102290026A
Application number: CN2011102011327A
Authority: CN
Inventors: 刘文雄
Original assignee: Nanjing CEC Panda LCD Technology Co Ltd
Current assignee: Nanjing CEC Panda LCD Technology Co Ltd
Priority date: 2011-07-19
Filing date: 2011-07-19
Publication date: 2011-12-21

Abstract

The invention discloses a pixel framework, which comprises a plurality of sub-pixels arranged in a matrix, a plurality of scanning lines, a plurality of data lines and a plurality of thin-film field effect transistors, wherein the scanning lines are arranged transversely into lines and are parallel to one another; each row of sub-pixels is provided with two scanning lines; the data lines are arranged vertically into rows and are parallel to one another; every two rows of sub-pixels are provided with a data line; the drain of each thin-film field effect transistor is connected with a sub-pixel electrode; the grid of each thin-film field effect transistor is connected with a scanning line; and the source of each thin-film field effect transistor is connected with a data line; and two adjacent sub-pixel electrodes on each row are connected with different data lines respectively through the thin-film field effect transistors. In the invention, the same data line keeps the same polarity, and switching between a positive polarity and a negative polarity is not required, so that the consumption power of a display is lowered, and the effect of saving power and energy is achieved.

Description

Pixel structure

Technical field

The present invention relates to a kind of pixel structure, the pixel structure under particularly a kind of double scanning line architecture.

Background technology

At present, dot structure under double scanning line (Dual gate) framework all connects this data line because of two row sub-pixels of every data lines both sides by Thin Film Transistor (TFT) (TFT), as depicted in figs. 1 and 2, data line D1, D2 ..., the D6 both sides two row sub-pixels all connect this data line by TFT, the TFT that Fig. 2 only shows D1 and D2 part is connected situation.Therefore, in order to show staggered positive-negative polarity difference, data line needs positive-negative polarity to switch, and can make consumed power increase thus.

Summary of the invention

Goal of the invention:, the purpose of this invention is to provide a kind of pixel structure of saving power consumption at the problem and shortage of above-mentioned existing existence.

Technical scheme: for achieving the above object, the technical solution used in the present invention is a kind of pixel structure, comprises that several are arranged in the sub-pixel of matrix, some sweep traces, some data lines, some Thin Film Transistor (TFT); Described sweep trace horizontally-arranged is embarked on journey and is parallel to each other, and every row's sub-pixel is provided with two sweep traces; Described data line vertical setting of types becomes row and is parallel to each other, and per two row sub-pixels are provided with a data line; The drain electrode connexon pixel electrode of each Thin Film Transistor (TFT), grid connects sweep trace, and source electrode connects data line, and two adjacent pixel electrodes of every row connect different data lines respectively by Thin Film Transistor (TFT).

Beneficial effect: the present invention keeps same polarity by making same data line, need not to carry out positive-negative polarity and switches, and reduces the consumed power of display, reaches the effect of power and energy saving.

Description of drawings

Fig. 1 is traditional pixel structure synoptic diagram;

Fig. 2 is the enlarged diagram of Fig. 1 frame portion, the figure shows the annexation of TFT;

Fig. 3 is first kind of pixel structure synoptic diagram under 2 sub-pixel inversion show;

Fig. 4 is the enlarged diagram of Fig. 3 frame portion, the figure shows the annexation of TFT;

Fig. 5 is second kind of pixel structure synoptic diagram under 2 sub-pixel inversion show;

Fig. 6 is the third pixel structure synoptic diagram under 1+2 sub-pixel inversion shows;

Fig. 7 is the 4th a kind of pixel structure synoptic diagram under 1+2 sub-pixel inversion shows.

Embodiment

Below in conjunction with the drawings and specific embodiments, further illustrate the present invention, should understand these embodiment only is used to the present invention is described and is not used in and limit the scope of the invention, after having read the present invention, those skilled in the art all fall within the application's claims institute restricted portion to the modification of the various equivalent form of values of the present invention.

Embodiment 1:

As shown in Figure 3 and Figure 4, two pixel electrodes that every row are adjacent connect different data lines respectively by Thin Film Transistor (TFT), each waveform among Fig. 3

With the intersection point of each sub-pixel is the grid of the corresponding TFT of each sub-pixel (Fig. 3 is not shown, referring to Fig. 4) and the tie point of corresponding sweep trace; In addition, "+" among Fig. 3 in each sub-pixel, "-" represents that respectively the polarity of this sub-pixel is positive pole and negative pole, GT1 to GT8 is a sweep trace, "+" on the data line D0 to D7, "-" represents that respectively the polarity of this data line is positive pole and negative pole, the drain electrode of the corresponding TFT of each sub-pixel connects this pixel electrode, source electrode connects the data line of the same polarity adjacent with this sub-pixel, for example, the TFT drain electrode of red sub-pixel R11 correspondence connects the electrode of R11, grid connects sweep trace GT1, source electrode connects data line D1 (because the polarity of sub-pixel R11 is anodal, it is that D0 and the polarity of bearing is positive D1 that the data line adjacent with R11 has polarity, so the TFT source electrode of R11 correspondence should connect the D1 that is all positive pole).As can be seen from Figure 4, the red sub-pixel R11 in data line D1 left side connects data line D1 and sweep trace GT1 by the first film field effect transistor 1, sub-pixel R12 below the R11 connects data line D0 and sweep trace GT4 by second Thin Film Transistor (TFT) 2, and visible R11 is connected different data lines with R12 respectively by different TFT; The green sub-pixels G11 on data line D1 right side connects data line D1 and sweep trace GT2 by the 3rd Thin Film Transistor (TFT) 3, sub-pixel G12 below the G11 connects data line D2 and sweep trace GT3 by the 4th Thin Film Transistor (TFT) 4, and visible G11 is connected different data lines with G12 respectively by different TFT.The connection of other sub-pixel is similar, repeats no more.As shown in Figure 3, present embodiment is delivered to source electrode driver (not shown) for negative sub-pixel B11, R21, G12, G22, B13, R23, G14, G24 (shown in the direction of arrow among Fig. 3) by data line separately with polarity successively, then corresponding scanning line is done activation, arrow trend among Fig. 3 is " Z " font, and the order of other sub-pixel by that analogy.

Embodiment 2:

As shown in Figure 5, the same embodiment of principle (not shown TFT), but the direction of arrow is opposite.

Embodiment 3:

As shown in Figure 6, principle is with embodiment 1 (not shown TFT), different is, the sub-pixel polarity among the

embodiment

1 and 2 is the order (horizontally-arranged) of " positive and negative negative positive and negative negative ", and the sub-pixel polarity in the present embodiment be the order (horizontally-arranged) of " positive and negative negative positive and negative just bearing ".Present embodiment is delivered to the source electrode driver (not shown) with sub-pixel G11, B11, G22, R22, G13, B13, G24, R24 (shown in the direction of arrow among Fig. 6) by data line separately successively, then corresponding scanning line is done activation.

Embodiment 4:

As shown in Figure 7, the same embodiment of principle (not shown TFT), but the direction of arrow is opposite.

By above 4 embodiment as can be seen,, make same data line remain same polarity, need not to carry out positive-negative polarity and switch, reduce the consumed power of display, reach the effect of power and energy saving by design to each TFT assembly and data line connected mode.

Claims

1. pixel structure comprises that several are arranged in the sub-pixel of matrix, some sweep traces, some data lines, some Thin Film Transistor (TFT); Described sweep trace horizontally-arranged is embarked on journey and is parallel to each other, and every row's sub-pixel is provided with two sweep traces; Described data line vertical setting of types becomes row and is parallel to each other, and per two row sub-pixels are provided with a data line; The drain electrode connexon pixel electrode of each Thin Film Transistor (TFT), grid connects sweep trace, and source electrode connects data line, and it is characterized in that: two pixel electrodes that every row are adjacent connect different data lines respectively by Thin Film Transistor (TFT).