CN112289848A - Low-power-consumption high-performance super junction JBS diode and manufacturing method thereof - Google Patents
Low-power-consumption high-performance super junction JBS diode and manufacturing method thereof Download PDFInfo
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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Abstract
The invention belongs to the field of power semiconductor devices, and particularly relates to a low-power-consumption high-performance super junction JBS diode and a manufacturing method thereof. The super junction JBS diode with low power consumption and high performance is manufactured by using the traditional silicon-based process technology, and the manufacturing cost is low; the P heavily doped column region and the N column drift region which have the characteristics of large area, high concentration and large junction depth are adopted, so that the forward on-resistance is reduced; forming super junction, and realizing good reverse blocking characteristic by optimizing electric field distribution; by optimizing the parameters of the super junction, higher blocking withstand voltage can be realized, and the on-state and off-state power consumption of the device is reduced; by optimizing the doping concentration and width of the P column region and the N column region, the optimal two-dimensional electric field distribution is obtained, the unification of high blocking voltage and low on resistance, the unification of high blocking voltage and rapid switching are realized, the compromise between the forward on-state voltage drop and the reverse blocking characteristic and the compromise between the reverse recovery characteristic and the reverse blocking voltage are optimized, and the limit of the traditional silicon material is broken through.
Description
The technical field is as follows:
the invention belongs to the field of power semiconductor devices, and relates to a low-power-consumption high-performance super junction JBS diode and a manufacturing method thereof.
Background art:
in modern power supply circuits, switching devices are commonly used to regulate the flow of power to a load, and power diodes are used to control the direction of the current. With the advent of high performance power switching devices, such as power-Oxide-Semiconductor Field-Effect transistors (mosfet) and Insulated Gate Bipolar transistors (igbt), the performance of power diodes has become a major factor limiting the performance of power circuits. For example, the larger reverse recovery current of the conventional power diode not only increases the power consumption of the power diode, but also increases the power consumption of the switching device, which affects the overall performance of the circuit. Therefore, the development of high-quality power diodes is imperative.
At present, power diodes on the market can be divided into unipolar diodes and bipolar diodes, and most of the manufacturing materials are monocrystalline silicon, the "silicon limit" limits the improvement of the performance of the power diodes, and the reverse blocking voltage and the forward on-resistance of the power diodes must be designed in a compromise mode. Although it is possible to use compound semiconductors such as: the performance of devices is improved by wide bandgap materials such as silicon carbide and gallium nitride, but the development technology of various wide bandgap materials is still immature, the process difficulty is high, the manufacturing cost is high, and the wide bandgap devices are difficult to market and produce on a large scale at present. Another super junction theory capable of breaking through the silicon limit is applied to the power diode, and the super junction greatly improves the compromise curve of the unipolar power diode by introducing two-dimensional charge coupling, and breaks through the silicon limit of the traditional schottky power diode. At present, methods of grooving, multiple epitaxy or multiple ion implantation are generally used for manufacturing the super junction structure, and the methods are high in process difficulty and cost and are not beneficial to market popularization.
The invention content is as follows:
the purpose of the invention is as follows:
the invention provides a low-power-consumption high-performance super junction JBS diode and a manufacturing method thereof, which are manufactured by using a traditional process and aim to solve the problems of high power consumption, high process difficulty, high cost and inconvenience in popularization in the conventional power diode production technology.
The technical scheme is as follows:
a super junction JBS diode of low-power consumption high performance which characterized in that: the main body part of the device comprises a bottom N + heavily doped region, a cathode metal electrode is arranged below the bottom N + heavily doped region, a P heavily doped cylindrical region and an N cylindrical drift region are arranged above the N + heavily doped region, and an anode metal electrode is arranged above the N + heavily doped region and the N cylindrical drift region; the bottom N + heavily doped region is directly and only connected with the N column-shaped drift region vertically above; the P heavily doped cylindrical region above the N + heavily doped region forms ohmic contact with the anode metal electrode; the N columnar drift region above the N + heavy doping region forms Schottky contact with the anode metal electrode; the N column-shaped drift region surrounds the P heavily doped column-shaped region; in a single semiconductor device unit, the N-column-shaped drift region is in a letter U shape, and the left side, the right side and the lower side of the P heavily doped column region are connected with the N-column-shaped drift region; a PN junction structure is generated by the transverse connection of the P-shaped heavily doped column region and the N-shaped column drift region, and no other structure exists between the N-shaped column drift region and the P-shaped heavily doped column region; the single semiconductor device unit comprises a super junction structure, and a JBS region and a P heavily doped column region formed by an N column drift region in the device form the super junction structure to bear withstand voltage; there is no other structure between the super junction structures of adjacent cells in the device.
The anode metal electrode structure is as follows:
A. a pure metal material;
and B, forming an anode metal electrode by the metal silicon object and the metal layer structure of the Schottky contact at the N column-shaped drift region.
The super junction structures of adjacent units in the device are arranged in a plurality of repeated and adjacent ways, the region outside the repeatedly arranged region is a terminal, the terminal protection structure of a P-type field effect ring and an N + type stop ring is used for protecting the terminal in the terminal region, the N + type stop ring is arranged on the outer side of the P-type field effect rings, and the same insulating material is arranged above the P-type field effect rings.
The doping concentration ranges of the N-column-shaped drift region and the P heavily doped column-shaped regionThe circumference is 1 x 1014/cm3To 1X 1019/cm3。
The P heavily doped cylindrical region can extend to the N + heavily doped region, the lower part of the P heavily doped cylindrical region is connected with the N + heavily doped region, and two sides of the P heavily doped cylindrical region are connected with the N column drift region.
The material is a semiconductor material with a proper silicon series diffusion coefficient.
In structure a, the anode metal electrode and the cathode metal electrode using a single metal material include aluminum, aluminum/silicon alloy, aluminum/silicon/copper alloy, molybdenum/aluminum alloy, aluminum/nickel/Au alloy, and titanium/nickel/silver alloy.
In the structure B, the metal used for the metal silicide when the anode metal electrode is formed by using the metal silicide and the metal layer structure together includes: gold, platinum, nickel, titanium, tungsten, cobalt, rhodium, palladium, zirconium, tantalum, chromium, molybdenum and alloys of the above metals in various proportions.
The manufacturing method of the super junction JBS diode with low power consumption and high performance is characterized in that: the specific process steps on the silicon material are as follows:
the method comprises the following steps: forming an N epitaxial layer on the N + silicon substrate through epitaxial growth, wherein the N + silicon substrate is used as an N + heavily doped region in the device, and the N epitaxial layer is used as an N column-shaped drift region;
step two: oxidizing the N epitaxial layer to form a silicon dioxide layer, and taking the silicon dioxide as a mask layer, wherein the thickness of the silicon dioxide layer is 2 um;
step three: forming a mask pattern on the silicon dioxide layer by using processes such as etching and the like on the silicon dioxide layer;
step four: forming a P-type heavily doped region by means of surface diffusion and the like, wherein the junction depth extends to the position near an N + heavily doped region at the bottom inside the device, the region forms a P heavily doped cylindrical region, and meanwhile, a plurality of P-type field effect rings are formed at the top of the edge terminal on the outer side of the P heavily doped cylindrical region through a diffusion process;
step five: etching to remove the silicon dioxide layer and flattening until the N-column-shaped drift region is exposed on the surface;
step six: and oxidizing the N epitaxial layer to form a silicon dioxide layer serving as a mask layer, wherein the thickness of the mask layer is about 2 um. Forming a mask pattern on the silicon dioxide layer, and etching a window on the outer side of the P-type field effect ring at the top of the terminal by using etching and other processes;
step seven: forming an N-type heavily doped region by surface diffusion and other processes to form an N + type stop ring;
step eight: etching to remove the 2um silicon dioxide layer, flattening to expose the surface of the N-column-shaped drift region, and forming an oxide insulating layer on the edge terminal, wherein the oxide insulating layer is an insulating barrier layer, and the insulating barrier layer only covers the P-type field effect ring and the N + type stop ring;
step nine: the anode metal electrode can be a single metal material formed by a metal deposition process, the anode metal electrode is formed above the P heavily doped column region and the N column drift region, or the anode metal electrode is formed by a metal layer and a metal silicide layer; the metal silicide layer directly contacts the P heavily doped column region and the N column drift region, Schottky contact is formed between the metal silicide layer and the N column drift region, the blocking layer is used as a mask plate, a metal layer is formed on the metal silicide layer, and the metal silicide layer and the metal layer jointly form an integral anode metal electrode;
step ten: the back surface of the epitaxial wafer may be formed by sequentially depositing a metal such as titanium, nickel or silver to form a back surface constituting a cathode metal electrode.
And in the fourth step, the super junction part in the device is manufactured by using a diffusion process.
The advantages and effects are as follows:
the invention has the following advantages and beneficial effects:
1. good reverse blocking properties:
the P heavily doped column region and the N column drift region which have the characteristics of large area, high concentration and large junction depth form a super junction, and the blocking voltage is borne by the super junction. By optimizing the electric field distribution, good reverse blocking characteristics are achieved.
2. Has lower power consumption:
when the Schottky diode works in a forward conduction state, forward conduction current is transmitted only by an undepleted region under Schottky contact, so that the device keeps the property of a unipolar device, and no charge storage effect exists, and the switching power consumption is low. Because the P heavily doped column region and the N column drift region can both keep high doping concentration, and the super junction parameter is optimized, the thickness of the thin drift region can be used for realizing higher blocking voltage resistance, so that the on-state power consumption of the device is low. The junction depth of the P heavily doped column region is increased, the blocking mechanism is changed from Schottky blocking to super junction blocking, reverse leakage current is obviously reduced, and therefore off-state power consumption of the device is low.
3. Good on-state and fast switching characteristics:
in the forward conduction state, the device only passes current from the undepleted region under schottky since the forward voltage drop is less than the PN junction turn-on voltage and greater than the schottky junction turn-on voltage. The P heavily doped column region and the N column drift region are laterally parallel to each other to achieve the purpose of bearing higher reverse blocking voltage through charge balance, so that the doping concentration levels of the P heavily doped column region and the N column drift region can reach higher levels, and the forward on-resistance is reduced. For the same voltage withstanding level (medium-low), the conduction voltage drop of the structure is smaller than that of a conventional unipolar diode and that of a conventional bipolar diode. The structure transmits current through Schottky contact, maintains the characteristic of single polarity, has no charge storage effect, and has high switching speed.
4. Small volume, high durability and simple manufacturing process:
the existence of the P heavily doped cylindrical region enables the electric field distribution in the device to be changed from one dimension to two dimensions, the two-dimensional electric field distribution optimizes the longitudinal electric field, the longitudinal electric field is changed from triangular distribution to rectangular distribution, the thickness of the chip is thinner and the size is smaller under the same voltage-resistant grade, and the objective rule that the size of the power electronic device is continuously reduced at present is met. While the presence of the heavily P-doped columnar regions improves the ruggedness of the device. The invention can be manufactured by adopting the traditional process and has low manufacturing cost.
Description of the drawings:
FIG. 1 is a schematic diagram of a two-dimensional structure of a low power consumption high performance super junction JBS diode of the present invention;
FIG. 2 is a cross-sectional view of a low power consumption high performance super junction JBS diode along the dotted line a;
FIG. 3 is a cross-sectional view of a low power consumption high performance super junction JBS diode along the dashed line b;
FIG. 4 is a schematic diagram of a step one;
FIG. 5 is a schematic view of step two;
FIG. 6 is a schematic view of step three;
FIG. 7 is a diagram illustrating step four;
FIG. 8 is a schematic diagram of step five;
FIG. 9 is a schematic diagram of step six;
FIG. 10 is a schematic view of step seven;
FIG. 11 is a schematic view of step eight;
FIG. 12 is a diagram illustrating step nine;
FIG. 13 is a diagram illustrating a tenth step.
Description of reference numerals:
the structure comprises an anode metal electrode 1, a metal silicide layer 11, a metal layer structure 12, a columnar P heavily doped region 2, an N columnar drift region 3, a bottom N + heavily doped region 4, a cathode metal electrode 5, a P-type field effect ring 6, an insulating barrier layer 7, an N + type stop ring 8 and a terminal 9.
The specific implementation mode is as follows:
a low power consumption high performance super junction JBS diode includes: 1. an anode metal electrode; 11. a metal silicide layer; 12. a metal layer structure; 2. p is heavily doped column region; 3. an N-column drift region; 4. a bottom N + heavily doped region; 5. a cathode metal electrode; 6. a P-type field effect ring; 7. an insulating barrier layer; 8. an N + type stop ring; 9. and (4) a terminal.
In the low-power-consumption high-performance super junction JBS diode, a high-concentration N + doped silicon wafer is used as a substrate of the whole device, and the high-concentration wafer is formed into a bottom N + heavy doping area 4 of the device after the whole device is formed. The lower part of the bottom N + heavy doping region 4 is connected with the metal electrode in an ohmic contact mode, the metal electrode connected below the bottom N + heavy doping region 4 is a cathode metal electrode 5 of the device, and the bottom N + heavy doping region 4 can also support the whole device besides the function of connecting the cathode electrode. The upper part of the bottom N + heavily doped region 4 is directly contacted with the N-column-shaped drift region 3, two sides of the N-column-shaped drift region 3 are P-type heavily doped regions, the P-type heavily doped regions extend to the position, close to the bottom N + heavily doped region 4, of the inner part of the N-column-shaped drift region 3 from the upper surface, and the junction depth of the P-type heavily doped regions can also be increased to the position of the N + heavily doped region 4. The proportion of the transverse width of the P-type heavily doped region in the transverse width of the whole device can be set differently according to different application scenes, and the P-type heavily doped region forms the P-type heavily doped cylindrical region 2. And a metal electrode is connected above the N-column-shaped drift region 3 in a Schottky contact mode to form an anode metal electrode 1, and the P heavily-doped column regions 2 are closely arranged in parallel to form a potential barrier in the Schottky contact mode. The anode metal electrode 1 may be an integral metal layer structure, or may be a composite layer structure formed by the metal silicide layer 11 and the metal layer structure 12, and if the composite layer structure is formed, the metal silicide layer 11 contacts with the N-pillar drift region 3 region to form a schottky contact.
Because the P heavily doped column region 2 and the Schottky contact are transversely arranged, and the P heavily doped column region 2 and the N column drift region 3 are connected to form a longitudinal curvilinear PN junction, when the Schottky contact device works in a reverse blocking state, a potential barrier is formed at the Schottky contact position of the anode metal electrode 1 due to the existence of the PN junction, the formed potential barrier shields the Schottky contact, the Schottky contact is not influenced by reverse bias, the electric field at the Schottky contact position is reduced, and simulation can know that the maximum position of a longitudinal electric field is positioned in the device by optimizing the distribution of the electric field in the device; since the electric field at the schottky contact surface is reduced, the schottky barrier lowering effect is suppressed and the leakage current in the silicon device is reduced, making the leakage current value of the present invention lower than that of the conventional schottky diode. It is known from the barre plus theory that smaller spacing and larger junction depth are more favorable for increasing the size of the potential barrier. In the invention, the junction depth extends to the inside of the device, and the P heavily doped cylindrical region 2 and the N cylindrical drift region 3 form a super junction to form a super junction JBS diode. The super junction theory further improves the trade-off of device blocking characteristics with on-state characteristics.
The P heavy doping column region 2 is closely and transversely connected with the Schottky contact, and proper metal is selected to enable the turn-on voltage of the Schottky junction to be smaller than that of the PN junction. By setting a suitable width ratio of the N-pillar drift region 3 and the P-heavily doped pillar region 2, an undepleted region (in zero-bias and forward-bias conditions) is present below the schottky contact. In the forward conduction state, because the forward voltage drop is larger than the Schottky junction turn-on voltage and smaller than the PN junction turn-on voltage (about 0.45V), the current of the device only flows through the Schottky contact region, so that the unipolar conduction characteristic of the invention is realized, and the invention can have the advantages of a unipolar conduction device.
In the invention, the P heavily doped column region 2 and the N column drift region 3 are transversely connected in parallel, and the concentrations of the two regions are higher, so that a super junction structure is formed. The large-area large-junction-depth P heavily-doped cylindrical region 2 introduces a large amount of same-quantity heterogeneous charges in a reverse voltage-withstanding layer of a traditional JBS diode to achieve a charge balance state, so that a transverse electric field is introduced, and the electric field distribution of a device is changed. By optimizing the doping concentration and width of the P column region and the N column region, the optimal two-dimensional electric field distribution is obtained, and the unification of high blocking voltage and low on-resistance, the unification of high blocking voltage and rapid switching are realized.
The invention provides a super junction JBS diode which is suitable for a modern power supply circuit and matched with a modern switch device and a manufacturing method thereof. The super junction JBS diode is manufactured by utilizing the traditional silicon-based process technology, the compromise between the forward on-state voltage drop and the reverse blocking characteristic and the compromise between the reverse recovery characteristic and the reverse blocking voltage are optimized, and the limit of the traditional silicon material is broken through.
The invention is further described below with reference to the accompanying drawings:
as shown in fig. 1-3, a schematic diagram of a two-dimensional structure of a low-power consumption high-performance super junction JBS diode specifically includes: an anode metal electrode 1; the anode metal electrode 1 may have a composite layer structure including the metal silicide layer 11 and the metal layer structure 12; p is heavily doped with the column region 2; an N-column drift region 3; a bottom N + heavily doped region 4; a cathode metal electrode 5; a P-type field effect ring 6; a blocking layer 7; an N + type cutoff ring 8; and a terminal 9.
Fig. 1 shows a low-power consumption high-performance super junction JBS diode, which is connected to a cathode metal electrode 5 by a bottom N + heavily doped region 4 through ohmic contact; an N-column drift region 3 of epitaxial silicon material above the N + heavy doping region 4; the two sides of the N-column-shaped drift region 3 are provided with P heavily doped column regions 2, the P heavily doped column regions 2 and the N-column-shaped drift region 3 are arranged at intervals, the junction depth of the P heavily doped column region 2 extends into the device and is close to the upper edge of the N + heavily doped region 4, and the area of the N-column-shaped drift region 3 right below the P heavily doped column region 2 is very small; the P heavily doped column region 2 can also be in direct contact connection with the N + heavily doped region 4; the P heavily doped column region 2 and the N column drift region 3 are arranged in parallel to form a super junction structure which is a main bearing structure for resisting voltage of the device; the P heavily doped cylindrical region 2 is directly connected with the anode metal electrode 1 in an ohmic contact mode; the N-column-shaped drift region 3 is also directly connected with the anode metal electrode 1, and the contact mode is Schottky contact; the conductor at the anode can be a pure metal layer 1, or can be a composite layer comprising a metal layer 11 and a metal silicide 12 forming Schottky contact, the metal silicide 12 forms Schottky contact with the N-column-shaped drift region 3 and is in contact with the metal layer 11 above, and the metal silicide layer 11 and the metal layer structure 12 are taken as an integral anode of the device; a plurality of P-type field effect rings 6 are arranged on the outer side of the P heavily doped cylindrical region 2, an N + type cut-off ring 8 is arranged outside the P-type field effect rings 6, and the P-type field effect rings 6 and the N + type cut-off ring 8 are used for reducing surface current conduction or leakage of the super junction JBS diode device and weakening a high fringe electric field generated by a terminal 9; an insulating blocking layer 7 is arranged above the terminal 9, and the insulating blocking layer 7 only covers the P-type field effect ring 6 and the N + type blocking ring 8 and can be used as a mask in the silicification process.
When the low-power-consumption high-performance super junction JBS diode works in a forward conduction state, the applied forward bias voltage is smaller than the starting voltage of a PN junction and larger than the starting voltage of a Schottky junction. By selecting the reasonable proportion of the P heavily doped cylindrical region 2 in the width of the whole device, the N cylindrical drift region 3 has an unspent region in a forward bias or zero bias state and is used for transmitting forward current, so that unipolar current conduction of the low-power-consumption high-performance super junction JBS diode can be realized.
The super junction JBS diode with low power consumption and high performance forms a super junction voltage-resisting layer with N-type regions and P-type regions which are transversely and alternately arranged by the P-type heavily doped column regions 2 and the N-column drift regions 3. The N-column drift region 3 can be provided with a higher concentration value, which is beneficial to reducing the forward conduction voltage drop of the device.
Under reverse bias voltage, for a low-power-consumption high-performance super junction JBS diode, a P heavily doped column region 2 and an N column drift region 3 form a super junction. According to a two-dimensional charge coupling theory, the optimal distribution of an electric field is realized by optimizing the doping concentration and width of a P column region and an N column region, so that devices with the same chip thickness can bear higher withstand voltage, and the thickness of the chip is thinner for devices with the same withstand voltage level.
When the low-power-consumption high-performance super junction JBS diode is started, the invention belongs to a unipolar conduction device, the starting of the device depends on the starting of the Schottky contact above the N-column-shaped drift region 3, and the starting characteristic similar to that of a Schottky diode is kept. Because the invention is a unipolar type conduction device, when the low-power-consumption high-performance super junction JBS diode is started in the forward direction, no charge is stored in the device, so that the invention can keep higher switching speed.
The specific manufacturing process steps of the super junction JBS diode with low power consumption and high performance provided by the invention are as follows:
the method comprises the following steps: as shown in fig. 4, an N epitaxial layer is formed on an N + silicon substrate by epitaxial growth, the N + silicon substrate serves as an N + heavily doped region 4 in the device, and the N epitaxial layer serves as an N-pillar drift region 3.
Step two: as shown in fig. 5, a silicon dioxide layer is formed on the N epitaxial layer by oxidation, and the thickness of the silicon dioxide layer is about 2 um.
Step three: as shown in fig. 6, a mask pattern is formed on the silicon oxide layer by using a process such as etching on the silicon oxide layer.
Step four: as shown in fig. 7, a P-type heavily doped region is formed by means of surface diffusion or the like, the junction depth extends to the vicinity of the bottom N + heavily doped region 4 inside the device, the P-type heavily doped column region 2 is formed in the region, and a plurality of P-type field effect rings 6 are formed on the top of the edge terminal 9 outside the P-type heavily doped column region 2 through a diffusion process.
Step five: as shown in fig. 8, the silicon dioxide layer is removed by etching and planarized until the surface of the N-pillar drift region 3 is exposed.
Step six: as shown in fig. 9, a silicon dioxide layer is formed by oxidation on the N epitaxial layer as a mask layer, and the thickness of the mask layer is about 2 um. And forming a mask pattern on the silicon dioxide layer, and etching a window on the outer side of the P-type field effect ring 6 on the top of the terminal 9 by using etching and other processes.
Step seven: as shown in fig. 10, an N-type heavily doped region, i.e., an N + -type stop ring 8, is formed by a surface diffusion process or the like.
Step eight: as shown in fig. 11, the silicon dioxide layer 2um is removed by etching, and is planarized until the surface of the N-pillar drift region 3 is exposed, and an oxide insulating layer is formed on the edge terminal 9, where the oxide insulating layer is an insulating barrier layer 7, and the insulating barrier layer 7 only covers the P-type field effect ring 6 and the N + -type stop ring 8.
Step nine: as shown in fig. 12, the anode metal 1 may be a single metal material formed by a deposition metal process, and the anode metal 1 is formed over the P-heavily doped column region 2 and the N-column drift region 3. Or the anode metal 1 may be composed of a metal layer 12 and a metal silicide layer 11, the metal silicide layer 11 directly contacts the P heavily doped column region 2 and the N column drift region 3, schottky contact is formed between the metal silicide layer 11 and the N column drift region 3, the metal layer 12 is formed on the metal silicide layer 11 using the barrier layer 7 as a mask, and the metal silicide layer 11 and the metal layer 12 together form the integral anode metal 1.
Step ten: as shown in fig. 13, the back surface of the epitaxial wafer may be formed with a cathode metal electrode 5 constituting the back surface by continuing deposition of a metal such as titanium, nickel, or silver.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A super junction JBS diode of low-power consumption high performance which characterized in that: the main body part of the device comprises a bottom N + heavily doped region (4), a cathode metal electrode (5) is arranged below the bottom N + heavily doped region (4), a P heavily doped cylindrical region (2) and an N cylindrical drift region (3) are arranged above the N + heavily doped region (4), and an anode metal electrode (1) is arranged above the N + heavily doped region (4) and the N cylindrical drift region (3); the bottom N + heavily doped region (4) is directly and only connected with the N-column-shaped drift region (3) vertically above; the P heavily doped cylindrical region (2) above the N + heavily doped region (4) forms ohmic contact with the anode metal electrode (1); the N column-shaped drift region (3) above the N + heavy doping region (4) and the anode metal electrode (1) form Schottky contact; the N-column-shaped drift region (3) surrounds the P heavily doped column-shaped region (2); in a single semiconductor device unit, the N-column-shaped drift region (3) is in a letter U shape, and the left side, the right side and the lower side of the P heavily-doped column region (2) are connected with the N-column-shaped drift region (3); a PN junction structure is generated by the transverse connection of the P heavily doped column region (2) and the N column drift region (3), and no other structure exists between the N column drift region (3) and the P heavily doped column region (2); the single semiconductor device unit comprises a super junction structure, and a JBS region formed by an N column drift region (3) and a P heavily doped column region (2) in the device form the super junction structure to bear withstand voltage; there is no other structure between the super junction structures of adjacent cells in the device.
2. The low-power high-performance super junction JBS diode of claim 1, wherein: the anode metal electrode (1) is structurally characterized in that:
A. a pure metal material;
and B, forming an anode metal electrode (1) by the metal silicon object (12) and the metal layer structure (11) which are in Schottky contact at the N column-shaped drift region (3).
3. The low-power high-performance super junction JBS diode of claim 1, wherein: the super junction structure of adjacent units in the device is a plurality of repeated and mutually adjacent arrangement, the region outside the repeated arrangement region is a terminal (9), the terminal protection structure of a P-type field effect ring (6) and an N + type stop ring (8) is used for protecting the terminal in the terminal (9) region, the N + type stop ring (8) is arranged on the outer side of the P-type field effect rings (6), and the same insulating material is arranged above the P-type field effect rings (6).
4. The low-power high-performance super junction JBS diode of claim 1, wherein: the doping concentration range of the N-column-shaped drift region (3) and the P heavily doped column-shaped region (2) is 1 multiplied by 1014/cm3To 1X 1019/cm3。
5. The low-power high-performance super junction JBS diode of claim 1, wherein: the P heavily doped cylindrical region (2) can extend to the N + heavily doped region (4), the lower part of the P heavily doped cylindrical region (2) is connected with the N + heavily doped region (4), and the two sides of the P heavily doped cylindrical region are connected with the N column drift region (3).
6. The low-power high-performance super junction JBS diode of claim 1, wherein: the material is a semiconductor material with a proper silicon series diffusion coefficient.
7. The low-power high-performance super junction JBS diode of claim 2, wherein: in structure a, the anode metal electrode (1) and the cathode metal electrode (5) using a single metal material include aluminum, aluminum/silicon alloy, aluminum/silicon/copper alloy, molybdenum/aluminum alloy, aluminum/nickel/Au alloy, and titanium/nickel/silver alloy.
8. The low-power high-performance super junction JBS diode of claim 2, wherein: in the structure B, the metals used for the metal silicide when the anode metal electrode (1) formed by the metal silicide (12) and the metal layer structure (11) together is used comprise: gold, platinum, nickel, titanium, tungsten, cobalt, rhodium, palladium, zirconium, tantalum, chromium, molybdenum and alloys of the above metals in various proportions.
9. The manufacturing method of the super junction JBS diode with low power consumption and high performance is characterized in that: the specific process steps on the silicon material are as follows:
the method comprises the following steps: an N epitaxial layer is formed on an N + silicon substrate through epitaxial growth, the N + silicon substrate is used as an N + heavy doping region (4) in the device, and the N epitaxial layer is used as an N column-shaped drift region (3);
step two: oxidizing the N epitaxial layer to form a silicon dioxide layer, and taking the silicon dioxide as a mask layer, wherein the thickness of the silicon dioxide layer is 2 um;
step three: forming a mask pattern on the silicon dioxide layer by using processes such as etching and the like on the silicon dioxide layer;
step four: forming a P-type heavily doped region by means of surface diffusion and the like, wherein the junction depth extends to the position near an N + heavily doped region (4) at the bottom inside the device, the region forms a P heavily doped column region (2), and meanwhile, a plurality of P-type field effect rings (6) are formed at the top of an edge terminal (9) on the outer side of the P heavily doped column region (2) through a diffusion process;
step five: etching to remove the silicon dioxide layer and flattening until the surface of the N-shaped column drift region (3) is exposed;
step six: and oxidizing the N epitaxial layer to form a silicon dioxide layer serving as a mask layer, wherein the thickness of the mask layer is about 2 um. Forming a mask pattern on the silicon dioxide layer, and etching a window on the outer side of the P-type field effect ring (6) at the top of the terminal (9) by using etching and other processes;
step seven: forming an N-type heavily doped region by surface diffusion and other processes to form an N + type stop ring (8);
step eight: etching to remove the silicon dioxide layer 2um, flattening to expose the surface of the N-column-shaped drift region (3), and forming an oxidation insulation layer on the edge terminal (9), wherein the oxidation insulation layer is an insulation barrier layer (7), and the insulation barrier layer (7) only covers the P-type field effect ring (6) and the N + -type stop ring (8);
step nine: the anode metal electrode (1) can be a single metal material formed by a metal deposition process, the anode metal electrode (1) is formed above the P heavily doped column region (2) and the N column drift region (3), or the anode metal electrode (1) is formed by a metal layer (12) and a metal silicide layer (11); the metal silicide layer (11) directly contacts the P heavily doped column region (2) and the N column drift region (3), Schottky contact is formed between the metal silicide layer (11) and the N column drift region (3), the barrier layer (7) is used as a mask plate, a metal layer (12) is formed on the metal silicide layer (11), and the metal silicide layer (11) and the metal layer (12) jointly form an integral anode metal electrode (1);
step ten: the back surface of the epitaxial wafer can form a cathode metal electrode (5) on the back surface by continuously depositing metal such as titanium, nickel or silver.
10. The method for manufacturing the low-power high-performance super junction JBS diode of claim 9, wherein: and in the fourth step, the super junction part in the device is manufactured by using a diffusion process.
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