CN112234071A - 一种tft阵列基板结构及其制作方法 - Google Patents

一种tft阵列基板结构及其制作方法 Download PDF

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CN112234071A
CN112234071A CN202011059559.3A CN202011059559A CN112234071A CN 112234071 A CN112234071 A CN 112234071A CN 202011059559 A CN202011059559 A CN 202011059559A CN 112234071 A CN112234071 A CN 112234071A
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温质康
苏智昱
乔小平
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Fujian Huajiacai Co Ltd
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Abstract

本发明提供了一种TFT阵列基板结构及其制作方法,在缓冲层上沉积初始化的IGZO薄膜;在初始化的IGZO薄膜上涂布PI薄膜后,对涂布了PI薄膜的IGZO薄膜进行蚀刻;待涂布了PI薄膜的IGZO薄膜蚀刻完成后,从蚀刻后的IGZO薄膜上剥离所述PI薄膜,得到最终的IGZO薄膜;使用PI薄膜对IGZO薄膜进行保护,将IGZO薄膜与光刻胶隔开,不让IGZO薄膜与光刻胶直接进行接触,在蚀刻IGZO薄膜时保护了不需蚀刻的部分,且PI薄膜相较于光刻胶更加便于剥离,避免了剥离光刻胶时对IGZO薄膜造成的影响,减小了对IGZO膜质的伤害,保证了电子迁移率,能够提高TFT器件的稳定性,进一步保证良好的显示效果。

Description

一种TFT阵列基板结构及其制作方法
技术领域
本发明涉及液晶显示领域,尤其涉及一种TFT阵列基板结构及其制作方法。
背景技术
薄膜场效应晶体管(Thin Film Transistor,TFT)是液晶显示器件(LiquidCrystal Display,LCD)中重要的开关单元,传统的液晶显示结构采用A-Si(非晶矽)TFT来驱动液晶偏转,背光光线经过偏转的液晶时发生有规律的折射,再经过过滤在屏幕中显示画面;顶栅型(Top-gate)薄膜晶体管,由于源漏电极与栅极之间没有重叠,因此具有更低的寄生电容和更好的延展性,能避免A-Si TFT栅极和源漏极重叠面积大而产生的较大寄生电容,因此顶栅型(Top-gate)薄膜晶体管中能够降低信号传输过程中的延迟,同时采用自对准的制备方法,有利于制备短沟道器件,并且采用金属氧化物IGZO作为有源层,电子迁移率高,有利于提高器件特性,顶栅型薄膜晶体管结构将成为未来显示领域发展的趋势。
顶栅型Top gate IGZO(Indium Gallium Zinc Oxide,铟镓锌氧化物)薄膜晶体管将IGZO作为有源层,在显示面板的制备过程中,请参照图1,制备有源层IGZO时,常用的方法是通过PVD(Physical Vapour Deposition,物理气相沉积)机台在缓冲层3上沉积有源层IGZO薄膜,然后在IGZO薄膜上涂布光阻,采用半色调光罩对光阻进行曝光,再采用碱性的显影液对曝光后的光阻进行显影,去除被曝光的光阻,保留未被曝光的光阻形成光阻图案,然后再经过蚀刻液,未被光阻覆盖的IGZO薄膜将被蚀刻液腐蚀,有光阻覆盖的IGZO薄膜将会被保护,不被蚀刻液蚀刻,最后经过光阻剥离液,将IGZO薄膜上的光阻剥离干净,得到器件所需要的图案化有源层IGZO,当IGZO层在经过曝光和蚀刻剥离后,薄膜表面的出现氧空位缺陷态增加的现象,使IGZO薄膜表面粗糙度增大,导致IGZO-TFT薄膜晶体管的电性曲线往正偏,电子迁移率变小,阀值电压升高,器件性能下降,同时光阻剥离液会对IGZO产生刻蚀作用,进一步导致IGZO薄膜晶体管的性能下降,影响器件的稳定性。
发明内容
本发明所要解决的技术问题是:提供一种TFT阵列基板结构及其制作方法,提高IGZO薄膜的膜质。
为了解决上述技术问题,本发明采用的一种技术方案为:
一种TFT阵列基板制作方法,包括步骤:
S1、在缓冲层上沉积初始化的IGZO薄膜;
S2、在初始化的所述IGZO薄膜上涂布PI薄膜后,对涂布了PI薄膜的所述IGZO薄膜进行蚀刻;
S3、待涂布了PI薄膜的所述IGZO薄膜蚀刻完成后,从蚀刻后的所述IGZO薄膜上剥离所述PI薄膜,得到最终的IGZO薄膜。
本发明的有益效果在于:使用PI薄膜对IGZO薄膜进行保护,将IGZO薄膜与光刻胶隔开,不让IGZO薄膜与光刻胶直接进行接触,在蚀刻IGZO薄膜时保护了不需蚀刻的部分,且PI薄膜相较于光刻胶更加便于剥离,避免了剥离光刻胶时对IGZO薄膜造成的影响,减小了对IGZO膜质的伤害,保证了电子迁移率,能够提高TFT器件的稳定性,进一步保证良好的显示效果。
附图说明
图1为本发明实施例的一种TFT阵列基板制作方法的步骤流程图;
图2为本发明实施例的一种TFT阵列基板结构示意图;
图3为本发明实施例的一种熔融与固化PI薄膜示意图;
图4为本发明实施例的一种固化PI薄膜示意图;
图5为本发明实施例的一种蚀刻IGZO薄膜示意图;
图6为本发明实施例的一种最终的IGZO薄膜示意图
标号说明:
1、玻璃基板;2、遮光层;3、缓冲层;4、有源层;5、金属源极;6、栅极绝缘层;7、栅极;8、金属漏极;9、钝化层;10、平坦层;11、电极层;12、未固化的熔融状PI薄膜;13、固化后的PI薄膜。
具体实施方式
为详细说明本发明的技术内容、所实现目的及效果,以下结合实施方式并配合附图予以说明。
请参照图1,一种TFT阵列基板制作方法,包括步骤:
S1、在缓冲层上沉积初始化的IGZO薄膜;
S2、在初始化的所述IGZO薄膜上涂布PI薄膜后,对涂布了PI薄膜的所述IGZO薄膜进行蚀刻;
S3、待涂布了PI薄膜的所述IGZO薄膜蚀刻完成后,从蚀刻后的所述IGZO薄膜上剥离所述PI薄膜,得到最终的IGZO薄膜。
从上述描述可知,本发明的有益效果在于:使用PI薄膜对IGZO薄膜进行保护,将IGZO薄膜与光刻胶隔开,不让IGZO薄膜与光刻胶直接进行接触,在蚀刻IGZO薄膜时保护了不需蚀刻的部分,且PI薄膜相较于光刻胶更加便于剥离,避免了剥离光刻胶时对IGZO薄膜造成的影响,减小了对IGZO膜质的伤害,保证了电子迁移率,能够提高TFT器件的稳定性,进一步保证良好的显示效果。
进一步的,所述S1之前还包括:
在玻璃基板上沉积金属钼,形成初始化的钼薄膜;
对初始化的所述钼薄膜进行曝光和蚀刻,得到图案化的所述钼薄膜;
在图案化的所述钼薄膜上沉积缓冲层。
由上述描述可知,使用金属钼作为遮光层材料,遮光效果好。
进一步的,所述S2具体为;
在初始化的所述IGZO薄膜上涂布PI薄膜,在熔融状的所述PI薄膜上设置预设图案的金属挡板后进行固化,并通过显影液对未固化的PI薄膜进行去除,得到图案化的所述PI薄膜,对涂布了图案化的所述PI薄膜的IGZO薄膜进行蚀刻。
由上述描述可知,预先通过金属挡板固化预设图案的PI薄膜,防止在对IGZO需保留的部分进行保护时,影响到对IGZO其余部分的蚀刻,且PI薄膜在未固化时能够通过显影液去除,方便进行处理。
进一步的,所述S3具体为:
待涂布了PI薄膜的所述IGZO薄膜蚀刻完成后,使用激光剥离或机械剥离的方式从蚀刻后的所述IGZO薄膜上剥离所述PI薄膜,得到最终的IGZO薄膜。
由上述描述可知,PI薄膜能够通过激光剥离或机械剥离的方式与IGZO薄膜分开,相较于剥离液对IGZO薄膜的性质影响更小,能够进一步提高IGZO薄膜的质量。
进一步的,所述钼薄膜的厚度范围为0.1um-0.2um。
由上述描述可知,此范围厚度的钼薄膜能够起到遮光效果又不会过厚,在一定程度上节约了成本并降低了TFT的占用空间。
进一步的,所述IGZO薄膜的厚度范围为0.03um-0.06um,所述PI薄膜的厚度范围为1um-2um。
由上述描述可知,设置较厚的PI薄膜,能够对较薄的IGZO薄膜起到更好的保护作用,在蚀刻及剥离PI薄膜的过程中不易使IGZO薄膜受伤。
进一步的,所述S2中所述对涂布了PI薄膜的所述IGZO薄膜进行蚀刻具体为:
采用草酸蚀刻液对涂布了PI薄膜的所述IGZO薄膜进行蚀刻。
由上述描述可知,IGZO薄膜上未被PI薄膜保护的部分会被草酸蚀刻液蚀刻,从而得到预设的图形。
进一步的,所述S1具体为:
在缓冲层上通过PVD沉积初始化的所述IGZO薄膜。
由上述描述可知,通过物理气相沉积方法沉积初始化的IGZO薄膜,工艺较为成熟,能够保证沉积的IGZO薄膜的质量。
进一步的,所述S2中所述在初始化的所述IGZO薄膜上涂布PI薄膜具体为:
通过PI涂布机在初始化的所述IGZO薄膜上涂布PI薄膜。
由上述描述可知,通过PI涂布机在IGZO薄膜上涂布PI薄膜,能够控制PI薄膜的厚度且效率较高。
请参照图2,一种TFT阵列基板结构,包括玻璃基板、遮光层、缓冲层、有源层、金属源极、栅极绝缘层、栅极、金属漏极、钝化层、平坦层及电极层;
所述玻璃基板一侧设置有所述遮光层,所述遮光层远离所述玻璃基板连接的一侧上向着远离所述玻璃基板的方向依次设置有所述缓冲层、所述有源层、所述栅极绝缘层、所述栅极、所述钝化层及所述平坦层;所述钝化层还设置于所述有源层、所述栅极绝缘层及所述栅极四周;
所述金属源极包括第一引脚、第二引脚和顶盖,所述第一引脚的一侧设置于所述遮光层上且穿过所述缓冲层和所述钝化层,所述第一引脚的另一侧与所述顶盖连接;所述第二引脚的一侧设置于所述有源层上且穿过所述钝化层,所述第二引脚的另一侧与所述顶盖连接,所述顶盖设置于所述钝化层上;
所述金属漏极为T字型,所述金属漏极上较小的一端设置于所述有源层上且穿过所述钝化层,且较大的一端设置于所述钝化层上;
所述栅极、所述金属源极和所述金属漏极在远离所述玻璃基板的方向上相互错开设置;
所述电极层为T字型,所述电极层上较小的一端设置于所述金属漏极上且穿过所述平坦层,较大的一端设置于所述平坦层上。
由上述描述可知,本发明的有益效果为:采用IGZO薄膜作为有源层,制造IGZO薄膜时,使用PI薄膜对IGZO薄膜进行保护,将IGZO薄膜与光刻胶隔开,不让IGZO薄膜与光刻胶直接进行接触,在蚀刻IGZO薄膜时保护了不需蚀刻的部分,且PI薄膜相较于光刻胶更加便于剥离,避免了剥离光刻胶时对IGZO薄膜造成的影响,减小了对IGZO膜质的伤害,保证了电子迁移率,能够提高TFT器件的稳定性,进一步保证良好的显示效果。
请参照图1及图3至图6,本发明的实施例一为:
一种TFT阵列基板制作方法,包括步骤:
S1、在玻璃基板上沉积金属钼,形成初始化的钼薄膜;对初始化的所述钼薄膜进行曝光和蚀刻,得到图案化的所述钼薄膜;在图案化的所述钼薄膜上沉积缓冲层,钼薄膜的厚度范围为0.1um-0.2um;
在一种可选的实施方式中,设置钼薄膜的厚度为0.1um;
在一种可选的实施方式中,设置钼薄膜的厚度为0.15um,优选0.15um的厚度的钼薄膜,既能达到遮光效果最佳,又不过多增加整体器件的厚度;
在一种可选的实施方式中,设置钼薄膜的厚度为0.2um;
S2、在缓冲层上通过PVD设备沉积初始化的IGZO薄膜;
S3、请参照图3,在初始化的所述IGZO薄膜上通过PI涂布机涂布PI(聚酰亚胺)薄膜,在熔融状的所述PI薄膜上设置预设图案的金属挡板(掩膜板)后进行固化,并通过显影液对未固化的PI薄膜进行去除,得到图案化的所述PI薄膜,对涂布了图案化的所述PI薄膜的IGZO薄膜进行蚀刻,涂布PI是整面性PI涂布,未固化部分的PI将被蚀刻液或者显影液去除,并且蚀刻液会继续蚀刻下方的IGZO薄膜,已经固化的PI将不会被蚀刻液蚀刻或者显影液去除,并且已固化的PI将会保护下方的IGZO薄膜不被蚀刻,具体的,将此时的玻璃基板置入蚀刻机台,采用草酸蚀刻液进行蚀刻,IGZO薄膜的厚度范围为0.03um-0.06um,PI薄膜的厚度范围为1um-2um;
其中,请参照图3至图5,未固化的PI薄膜为熔融状,设置金属挡板后使光选择性地照射在PI薄膜上,使PI薄膜选择性区域进行固化;未固化的熔融状PI薄膜12会被显影液去除,若有残留也会被蚀刻液如草酸蚀刻液蚀刻殆尽,不会影响对熔融状PI薄膜下的IGZO薄膜的蚀刻,固化后的PI薄膜13保护了无需蚀刻的IGZO薄膜;
在一种可选的实施方式中,IGZO薄膜的厚度为0.03um,PI薄膜的厚度为1um;
在一种可选的实施方法中,IGZO薄膜的厚度为0.045um,PI薄膜的厚度为1.5um;
在一种可选的实施方式中,IGZO薄膜的厚度为0.06um,PI薄膜的厚度为2um;
在一种可选的实施方式中,IGZO薄膜的厚度为0.04um,PI薄膜的厚度为1.5um;IGZO薄膜厚度优选0.04um,当IGZO薄膜厚度为0.04um时,电性稳定不漂移,PI薄膜厚度优选1.5um,当PI薄膜厚度为1.5um时,固化效率高,膜缩比小,固化后薄膜稳定性高;
S4、请参照图6,待涂布了PI薄膜的所述IGZO薄膜蚀刻完成后,使用激光剥离或机械剥离的方式从蚀刻后的所述IGZO薄膜上剥离所述PI薄膜,得到最终的IGZO薄膜;
具体的,选取IGZO薄膜可接受范围内的激光强度。
请参照图2,本发明的实施例二为:
一种TFT阵列基板结构,包括玻璃基板1、遮光层2、缓冲层3、有源层4、金属源极5、栅极绝缘层6、栅极7、金属漏极8、钝化层9、平坦层10及电极层11;
所述玻璃基板1一侧设置有所述遮光层2,所述遮光层2远离所述玻璃基板1连接的一侧上向着远离所述玻璃基板1的方向依次设置有所述缓冲层3、所述有源层4、所述栅极绝缘层6、所述栅极7、所述钝化层9及所述平坦层10;所述钝化层9还设置于所述有源层4、所述栅极绝缘层6及所述栅极7四周;
所述金属源极5包括第一引脚、第二引脚和顶盖,所述第一引脚的一侧设置于所述遮光层2上且穿过所述缓冲层3和所述钝化层9,所述第一引脚的另一侧与所述顶盖连接;所述第二引脚的一侧设置于所述有源层4上且穿过所述钝化层9,所述第二引脚的另一侧与所述顶盖连接,所述顶盖设置于所述钝化层9上;
所述金属漏8极为T字型,所述金属漏极8上较小的一端设置于所述有源层4上且穿过所述钝化层9,且较大的一端设置于所述钝化层9上;
所述栅极7、所述金属源极5和所述金属漏极8在远离所述玻璃基板1的方向上相互错开设置;
所述电极层11为T字型,所述电极层11上较小的一端设置于所述金属漏极8上且穿过所述平坦层10,较大的一端设置于所述平坦层10上;
本实施例中所述的一种TFT阵列基板结构中的有源层4为IGZO,可由实施例一中的一种TFT阵列基板制作方法制造。
综上所述,本发明提供了一种TFT阵列基板结构及其制作方法,采用IGZO薄膜作为有源层,使用PI薄膜作为保护,在对IGZO薄膜进行蚀刻前先在其上涂布PI薄膜,PI薄膜在剥离时无需使用剥离液,可以采用激光或机械的方式从IGZO薄膜上剥离,相较于使用剥离液剥离光刻胶,对IGZO表面的影响更低,能够保证IGZO薄膜的膜质,提高其电子迁移率从而提高TFT器件的稳定性,保证良性的显示效果,PI薄膜能够避免IGZO薄膜与光刻胶或光刻胶剥离液直接接触,避免剥离光刻胶后IGZO薄膜表面氧空位增加的情况。
以上所述仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等同变换,或直接或间接运用在相关的技术领域,均同理包括在本发明的专利保护范围内。

Claims (10)

1.一种TFT阵列基板制作方法,其特征在于,包括步骤:
S1、在缓冲层上沉积初始化的IGZO薄膜;
S2、在初始化的所述IGZO薄膜上涂布PI薄膜后,对涂布了PI薄膜的所述IGZO薄膜进行蚀刻;
S3、待涂布了PI薄膜的所述IGZO薄膜蚀刻完成后,从蚀刻后的所述IGZO薄膜上剥离所述PI薄膜,得到最终的IGZO薄膜。
2.根据权利要求1所述的一种TFT阵列基板制作方法,其特征在于,所述S1之前还包括:
在玻璃基板上沉积金属钼,形成初始化的钼薄膜;
对初始化的所述钼薄膜进行曝光和蚀刻,得到图案化的所述钼薄膜;
在图案化的所述钼薄膜上沉积缓冲层。
3.根据权利要求1所述的一种TFT阵列基板制作方法,其特征在于,所述S2具体为;
在初始化的所述IGZO薄膜上涂布PI薄膜,在熔融状的所述PI薄膜上设置预设图案的金属挡板后进行固化,并通过显影液对未固化的PI薄膜进行去除,得到图案化的所述PI薄膜,对涂布了图案化的所述PI薄膜的IGZO薄膜进行蚀刻。
4.根据权利要求1所述的一种TFT阵列基板制作方法,其特征在于,所述S3具体为:
待涂布了PI薄膜的所述IGZO薄膜蚀刻完成后,使用激光剥离或机械剥离的方式从蚀刻后的所述IGZO薄膜上剥离所述PI薄膜,得到最终的IGZO薄膜。
5.根据权利要求2所述的一种TFT阵列基板制作方法,其特征在于,所述钼薄膜的厚度范围为0.1um-0.2um。
6.根据权利要求1所述的一种TFT阵列基板制作方法,其特征在于,所述IGZO薄膜的厚度范围为0.03um-0.06um,所述PI薄膜的厚度范围为1um-2um。
7.根据权利要求1所述的一种TFT阵列基板制作方法,其特征在于,所述S2中所述对涂布了PI薄膜的所述IGZO薄膜进行蚀刻具体为:
采用草酸蚀刻液对涂布了PI薄膜的所述IGZO薄膜进行蚀刻。
8.根据权利要求1所述的一种TFT阵列基板制作方法,其特征在于,所述S1具体为:
在缓冲层上通过PVD沉积初始化的所述IGZO薄膜。
9.根据权利要求3所述的一种TFT阵列基板制作方法,其特征在于,所述S2中所述在初始化的所述IGZO薄膜上涂布PI薄膜具体为:
通过PI涂布机在初始化的所述IGZO薄膜上涂布PI薄膜。
10.一种TFT阵列基板结构,包括玻璃基板、遮光层、缓冲层、有源层、金属源极、栅极绝缘层、栅极、金属漏极、钝化层、平坦层及电极层,其特征在于,所述有源层为根据权利要求1-9任一所述的一种TFT阵列基板的制作方法所得到的最终的IGZO薄膜;
所述玻璃基板一侧设置有所述遮光层,所述遮光层远离所述玻璃基板连接的一侧上向着远离所述玻璃基板的方向依次设置有所述缓冲层、所述有源层、所述栅极绝缘层、所述栅极、所述钝化层及所述平坦层;所述钝化层还设置于所述有源层、所述栅极绝缘层及所述栅极四周;
所述金属源极包括第一引脚、第二引脚和顶盖,所述第一引脚的一侧设置于所述遮光层上且穿过所述缓冲层和所述钝化层,所述第一引脚的另一侧与所述顶盖连接;所述第二引脚的一侧设置于所述有源层上且穿过所述钝化层,所述第二引脚的另一侧与所述顶盖连接,所述顶盖设置于所述钝化层上;
所述金属漏极为T字型,所述金属漏极上较小的一端设置于所述有源层上且穿过所述钝化层,且较大的一端设置于所述钝化层上;
所述栅极、所述金属源极和所述金属漏极在远离所述玻璃基板的方向上相互错开设置;
所述电极层为T字型,所述电极层上较小的一端设置于所述金属漏极上且穿过所述平坦层,较大的一端设置于所述平坦层上。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011021049A (ja) * 2009-07-13 2011-02-03 Nitta Corp エッチング加工用保護テープおよびエッチング加工方法
CN102768992A (zh) * 2012-08-10 2012-11-07 广州新视界光电科技有限公司 一种薄膜晶体管驱动背板的制作方法
CN103700710A (zh) * 2013-12-30 2014-04-02 Tcl集团股份有限公司 Igzo薄膜晶体管及其制备方法
CN103995441A (zh) * 2014-06-11 2014-08-20 深圳市华星光电技术有限公司 光阻剥离方法及光阻剥离装置
CN111081551A (zh) * 2019-12-10 2020-04-28 Tcl华星光电技术有限公司 阵列基板的制造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011021049A (ja) * 2009-07-13 2011-02-03 Nitta Corp エッチング加工用保護テープおよびエッチング加工方法
CN102768992A (zh) * 2012-08-10 2012-11-07 广州新视界光电科技有限公司 一种薄膜晶体管驱动背板的制作方法
CN103700710A (zh) * 2013-12-30 2014-04-02 Tcl集团股份有限公司 Igzo薄膜晶体管及其制备方法
CN103995441A (zh) * 2014-06-11 2014-08-20 深圳市华星光电技术有限公司 光阻剥离方法及光阻剥离装置
CN111081551A (zh) * 2019-12-10 2020-04-28 Tcl华星光电技术有限公司 阵列基板的制造方法

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