CN112187273A - Low-power-consumption successive approximation type analog-to-digital conversion circuit module - Google Patents

Low-power-consumption successive approximation type analog-to-digital conversion circuit module Download PDF

Info

Publication number
CN112187273A
CN112187273A CN202011093142.9A CN202011093142A CN112187273A CN 112187273 A CN112187273 A CN 112187273A CN 202011093142 A CN202011093142 A CN 202011093142A CN 112187273 A CN112187273 A CN 112187273A
Authority
CN
China
Prior art keywords
capacitor
switch
comparator
module
successive approximation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202011093142.9A
Other languages
Chinese (zh)
Other versions
CN112187273B (en
Inventor
陈李胜
胡云峰
周锦鹏
李华炎
文毅
陈卉
何志红
刘亮元
周李梦男
陈东伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Electronic Science and Technology of China Zhongshan Institute
Original Assignee
University of Electronic Science and Technology of China Zhongshan Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Electronic Science and Technology of China Zhongshan Institute filed Critical University of Electronic Science and Technology of China Zhongshan Institute
Priority to CN202011093142.9A priority Critical patent/CN112187273B/en
Publication of CN112187273A publication Critical patent/CN112187273A/en
Application granted granted Critical
Publication of CN112187273B publication Critical patent/CN112187273B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/38Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The invention discloses a low-power-consumption successive approximation type analog-to-digital conversion circuit module which comprises a comparator, a logic comparison control and output module, a sampling switch and a successive approximation capacitor module, wherein the logic comparison control and output module is used for outputting a logic comparison result; the inverting input end of the comparator is connected with the voltage to be converted through the sampling switch, the non-inverting input end of the comparator is connected with the logic comparison control and output module through the successive approximation capacitor module, and the output end of the comparator is connected with the logic comparison control and output module; after a sampling switch is closed, sampling is carried out on analog voltage to be converted, the analog voltage is stored at the inverting input end of a comparator, then the comparator forwards a comparison result to a logic comparison control and output module, the logic comparison control and output module controls a successive approximation capacitor module circuit according to the comparison result of the comparator to transmit different voltages to the non-inverting input end of the comparator, and finally the control of a capacitor is continuously adjusted, so that the output of voltage coding is finally realized; the analog-to-digital conversion circuit module can reduce energy consumption and reduce the number of capacitors in the module, thereby reducing the area of a chip.

Description

Low-power-consumption successive approximation type analog-to-digital conversion circuit module
Technical Field
The invention relates to a circuit module, in particular to a low-power-consumption successive approximation type analog-to-digital conversion circuit module.
Background
The analog-to-digital converter is an electronic element for converting an analog signal into a digital signal, and a conventional successive approximation type analog-to-digital conversion circuit has the defects of high energy consumption, large number of used capacitors and the like, and the circuit is not environment-friendly and is not beneficial to the miniaturization design of a chip.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a successive approximation type analog-to-digital conversion circuit module with low power consumption.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a successive approximation type analog-to-digital conversion circuit module with low power consumption comprises a comparator, a logic comparison control and output module, a sampling switch and a successive approximation capacitor module; the inverting input end of the comparator is connected with the voltage to be converted through the sampling switch, the non-inverting input end of the comparator is connected with the logic comparison control and output module through the successive approximation capacitor module, and the output end of the comparator is connected with the logic comparison control and output module; the successive approximation capacitance module comprises a switch SU, a switch SD, a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch ST, a capacitor CU, a capacitor CD, a capacitor C1, a capacitor C2 and a capacitor C3; one end of the switch ST is connected with a reference voltage, and the other end of the switch ST is grounded after being sequentially connected with the capacitor CU and the capacitor CD; one end of the switch SU is connected with a node of the capacitor CU and the capacitor CD, and the other end of the switch SU is connected with a node of the switch ST and the capacitor CU; one end of the switch SD is grounded, and the other end of the switch SD is connected with a node of the capacitor CU and the capacitor CD; one end of the capacitor C1 is connected with a node of the capacitor CU and the capacitor CD, and the other end of the capacitor C1 is grounded through the capacitor C2, the capacitor C3 and the switch S1 in sequence; one end of the switch S0 is connected with the node of the switch ST and the capacitor CU, and the other end is connected with the node of the capacitor C3 and the switch S1; one end of the switch S2 is connected with the node of the capacitor CU and the capacitor CD, and the other end is connected with the node of the capacitor C1 and the capacitor C2; one end of the switch S3 is connected with the node of the capacitor C2 and the capacitor C3, and the other end is connected with the node of the capacitor C1 and the capacitor C2; the switch S4 has one end connected to the node between the capacitor C3 and the switch S1 and the other end connected to the node between the capacitor C2 and the capacitor C3.
Preferably, the capacitance values of the capacitor CU and the capacitor CD are equal.
Preferably, the capacitance value of the capacitor C1 is half of the capacitance value of the capacitor CD.
Preferably, the capacitance value of the capacitor C2 is half of the capacitance value of the capacitor C1.
Preferably, the capacitance value of the capacitor C3 is half of the capacitance value of the capacitor C2.
Preferably, the nodes of the comparator and the sampling switch are grounded through a filter capacitor CE.
The invention has the beneficial effects that: after a sampling switch is closed, analog voltage to be converted is sampled and stored at the inverting input end of a comparator, then the comparator forwards a comparison result to a logic comparison control and output module, the logic comparison control and output module controls a successive approximation capacitor module circuit according to the comparison result of the comparator to transmit different voltages to the non-inverting input end of the comparator, and finally the control of a capacitor is continuously adjusted, so that the output of voltage coding is finally realized; the analog-to-digital conversion circuit module can reduce energy consumption and reduce the number of capacitors in the module, thereby reducing the area of a chip.
Drawings
The invention is further illustrated with reference to the following figures and examples.
FIG. 1 is a system schematic of the present invention;
fig. 2 is a circuit schematic of a successive approximation capacitance module.
Detailed Description
Referring to fig. 1 and 2, a successive approximation type analog-to-digital conversion circuit module with low power consumption includes a comparator, a logic comparison control and output module, a sampling switch, and a successive approximation capacitor module; the inverting input end of the comparator is connected with the voltage to be converted through the sampling switch, the non-inverting input end of the comparator is connected with the logic comparison control and output module through the successive approximation capacitor module, and the output end of the comparator is connected with the logic comparison control and output module; the successive approximation capacitance module comprises a switch SU, a switch SD, a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch ST, a capacitor CU, a capacitor CD, a capacitor C1, a capacitor C2 and a capacitor C3; one end of the switch ST is connected with a reference voltage, and the other end of the switch ST is grounded after being sequentially connected with the capacitor CU and the capacitor CD; one end of the switch SU is connected with a node of the capacitor CU and the capacitor CD, and the other end of the switch SU is connected with a node of the switch ST and the capacitor CU; one end of the switch SD is grounded, and the other end of the switch SD is connected with a node of the capacitor CU and the capacitor CD; one end of the capacitor C1 is connected with a node of the capacitor CU and the capacitor CD, and the other end of the capacitor C1 is grounded through the capacitor C2, the capacitor C3 and the switch S1 in sequence; one end of the switch S0 is connected with the node of the switch ST and the capacitor CU, and the other end is connected with the node of the capacitor C3 and the switch S1; one end of the switch S2 is connected with the node of the capacitor CU and the capacitor CD, and the other end is connected with the node of the capacitor C1 and the capacitor C2; one end of the switch S3 is connected with the node of the capacitor C2 and the capacitor C3, and the other end is connected with the node of the capacitor C1 and the capacitor C2; the switch S4 has one end connected to the node between the capacitor C3 and the switch S1 and the other end connected to the node between the capacitor C2 and the capacitor C3.
The capacitance values of the capacitor CU and the capacitor CD are equal.
The capacitance value of the capacitor C1 is half the capacitance value of the capacitor CD.
The capacitance value of the capacitor C2 is half the capacitance value of the capacitor C1.
The capacitance value of the capacitor C3 is half the capacitance value of the capacitor C2.
After the sampling switch is closed, the analog voltage to be converted is sampled and stored at the inverting input end of the comparator, then the comparator forwards the comparison result to the logic comparison control and output module, the logic comparison control and output module controls the successive approximation capacitor module circuit according to the comparison result of the comparator to transmit different voltages to the non-inverting input end of the comparator, and finally the control of the capacitor is continuously adjusted, and finally the output of voltage coding is realized.
The working principle of the successive approximation capacitor module is as follows:
the working process is mainly divided into the following three steps:
and step A, resetting. The switch ST is opened and the other switches are closed, clearing all the charges on all the capacitors to 0.
And step B, charging. And charging the capacitors CU and CD, and sending the voltage value of the analog voltage Vx to a comparator to be compared with the voltage of the module to be converted.
And C, discharging. The logic comparison control and output module controls the on-off of each switch according to the comparison result of the comparator so as to realize the discharging process, and then the step B is carried out; and obtaining a final analog-to-digital conversion result after N times of comparison.
And the successive approximation capacitor module draws the analog voltage Vx from the node of the capacitor CU and the capacitor CD.
The capacitance switch control relationship is related to the comparison result which has been obtained before, in addition to the comparison result of the current bit; representing inversion, bi represents the conversion result which is currently the ith bit, i starts with 1 in this circuit block. i1 represents the most significant bit of the conversion result, and iN represents the least significant bit of the conversion result; the switch logic control relationship of the discharging process after each charging is as follows:
when i is 1:
S0=bi;
S1=~bi;
S(j+2)=(~bi^1),j=0;
S(j+2)=1,j∈(1,N-2);
when i is more than or equal to 2:
S0=bi;
S1=~bi;
S(j+2)=(~bi^b(i-j-1)),j∈(0,i-2);
S(j+2)=1;j∈(i-1,N-2);
when 1, the switch is closed; at 0, the switch is open.
The conversion bit number of the successive approximation type analog-to-digital conversion circuit module is arbitrary, and only 5 bits are taken as an example again.
The nodes of the comparator and the sampling switch are grounded through a filter capacitor CE, and alternating-current voltage in the voltage to be converted can be filtered through the filter capacitor CE.
The above embodiments do not limit the scope of the present invention, and those skilled in the art can make equivalent modifications and variations without departing from the overall concept of the present invention.

Claims (5)

1. A successive approximation type analog-to-digital conversion circuit module with low power consumption comprises a comparator, a logic comparison control and output module, a sampling switch and a successive approximation capacitor module; the inverting input end of the comparator is connected with the voltage to be converted through the sampling switch, the non-inverting input end of the comparator is connected with the logic comparison control and output module through the successive approximation capacitor module, and the output end of the comparator is connected with the logic comparison control and output module; the successive approximation capacitor module is characterized by comprising a switch SU, a switch SD, a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch ST, a capacitor CU, a capacitor CD, a capacitor C1, a capacitor C2 and a capacitor C3; one end of the switch ST is connected with a reference voltage, and the other end of the switch ST is grounded after being sequentially connected with the capacitor CU and the capacitor CD; one end of the switch SU is connected with a node of the capacitor CU and the capacitor CD, and the other end of the switch SU is connected with a node of the switch ST and the capacitor CU; one end of the switch SD is grounded, and the other end of the switch SD is connected with a node of the capacitor CU and the capacitor CD; one end of the capacitor C1 is connected with a node of the capacitor CU and the capacitor CD, and the other end of the capacitor C1 is grounded through the capacitor C2, the capacitor C3 and the switch S1 in sequence; one end of the switch S0 is connected with the node of the switch ST and the capacitor CU, and the other end is connected with the node of the capacitor C3 and the switch S1; one end of the switch S2 is connected with the node of the capacitor CU and the capacitor CD, and the other end is connected with the node of the capacitor C1 and the capacitor C2; one end of the switch S3 is connected with the node of the capacitor C2 and the capacitor C3, and the other end is connected with the node of the capacitor C1 and the capacitor C2; the switch S4 has one end connected to the node between the capacitor C3 and the switch S1 and the other end connected to the node between the capacitor C2 and the capacitor C3.
2. The low power consumption successive approximation type analog-to-digital conversion circuit module of claim 1, wherein the capacitance values of the capacitor CU and the capacitor CD are equal.
3. The low power consumption successive approximation type analog-to-digital conversion circuit module according to claim 2, wherein the capacitance value of the capacitor C1 is half of the capacitance value of the capacitor CD.
4. The low power consumption successive approximation type analog-to-digital conversion circuit module of claim 3, wherein the capacitance value of the capacitor C2 is half of the capacitance value of the capacitor C1.
5. The low power consumption successive approximation type analog-to-digital conversion circuit module according to claim 4, wherein the capacitance value of the capacitor C3 is half of the capacitance value of the capacitor C2.
CN202011093142.9A 2020-10-14 2020-10-14 Low-power-consumption successive approximation type analog-to-digital conversion circuit module Active CN112187273B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011093142.9A CN112187273B (en) 2020-10-14 2020-10-14 Low-power-consumption successive approximation type analog-to-digital conversion circuit module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011093142.9A CN112187273B (en) 2020-10-14 2020-10-14 Low-power-consumption successive approximation type analog-to-digital conversion circuit module

Publications (2)

Publication Number Publication Date
CN112187273A true CN112187273A (en) 2021-01-05
CN112187273B CN112187273B (en) 2023-06-02

Family

ID=73949843

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011093142.9A Active CN112187273B (en) 2020-10-14 2020-10-14 Low-power-consumption successive approximation type analog-to-digital conversion circuit module

Country Status (1)

Country Link
CN (1) CN112187273B (en)

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008006751A1 (en) * 2006-07-14 2008-01-17 Interuniversitair Microelektronica Centrum (Imec) Charge domain successive approximation a/d converter
JP2009022057A (en) * 2006-12-04 2009-01-29 Panasonic Corp D/a converter
CN101379707A (en) * 2006-02-02 2009-03-04 新加坡国立大学 An analog-to-digital converter
US20100085225A1 (en) * 2008-10-07 2010-04-08 Soon-Jyh Chang Successive approximation adc with binary error tolerance mechanism
CN103152049A (en) * 2013-02-26 2013-06-12 上海宏力半导体制造有限公司 Successive approximation register type ADC (analog-digital converter)
CN103518327A (en) * 2011-04-13 2014-01-15 美国亚德诺半导体公司 Self timed digital-to-analog converter
US20140091960A1 (en) * 2012-09-29 2014-04-03 Nicholas P. Cowley Methods and arrangements for high-speed analog-to-digital conversion
US20140203958A1 (en) * 2013-01-23 2014-07-24 Renesas Electronics Corporation Passive amplification circuit and analog-digital convertor
CN104124967A (en) * 2014-07-10 2014-10-29 天津大学 Segmented capacitor array type successive approximation analog-digital converter calibration structure
CN105680865A (en) * 2016-03-12 2016-06-15 浙江大学 Successive approximation type analog-to-digital converter and digital backend redundancy calibration method thereof
CN105827243A (en) * 2015-01-04 2016-08-03 成都锐成芯微科技有限责任公司 Anti-jitter circuit, anti-jitter method, and successive approximation analog-to-digital converter based on circuit
CN105827245A (en) * 2016-03-14 2016-08-03 中国电子科技集团公司第五十八研究所 Successive approximation type analog-to-digital converter structure
CN109194333A (en) * 2018-08-09 2019-01-11 电子科技大学 A kind of composite construction gradually-appoximant analog-digital converter and its quantization method
CN111711453A (en) * 2020-08-19 2020-09-25 微龛(广州)半导体有限公司 Successive approximation type analog-to-digital converter

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101379707A (en) * 2006-02-02 2009-03-04 新加坡国立大学 An analog-to-digital converter
US20090167587A1 (en) * 2006-02-02 2009-07-02 National University Of Singapore Analog-to-digital converter
WO2008006751A1 (en) * 2006-07-14 2008-01-17 Interuniversitair Microelektronica Centrum (Imec) Charge domain successive approximation a/d converter
JP2009022057A (en) * 2006-12-04 2009-01-29 Panasonic Corp D/a converter
US20100085225A1 (en) * 2008-10-07 2010-04-08 Soon-Jyh Chang Successive approximation adc with binary error tolerance mechanism
CN103518327A (en) * 2011-04-13 2014-01-15 美国亚德诺半导体公司 Self timed digital-to-analog converter
US20140091960A1 (en) * 2012-09-29 2014-04-03 Nicholas P. Cowley Methods and arrangements for high-speed analog-to-digital conversion
US20140203958A1 (en) * 2013-01-23 2014-07-24 Renesas Electronics Corporation Passive amplification circuit and analog-digital convertor
CN103152049A (en) * 2013-02-26 2013-06-12 上海宏力半导体制造有限公司 Successive approximation register type ADC (analog-digital converter)
CN104124967A (en) * 2014-07-10 2014-10-29 天津大学 Segmented capacitor array type successive approximation analog-digital converter calibration structure
CN105827243A (en) * 2015-01-04 2016-08-03 成都锐成芯微科技有限责任公司 Anti-jitter circuit, anti-jitter method, and successive approximation analog-to-digital converter based on circuit
CN105680865A (en) * 2016-03-12 2016-06-15 浙江大学 Successive approximation type analog-to-digital converter and digital backend redundancy calibration method thereof
CN105827245A (en) * 2016-03-14 2016-08-03 中国电子科技集团公司第五十八研究所 Successive approximation type analog-to-digital converter structure
CN109194333A (en) * 2018-08-09 2019-01-11 电子科技大学 A kind of composite construction gradually-appoximant analog-digital converter and its quantization method
CN111711453A (en) * 2020-08-19 2020-09-25 微龛(广州)半导体有限公司 Successive approximation type analog-to-digital converter

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PIERRE-YVES ROBERT等: "An Ultra-Low-Power Successive-Approximation-B ased ADC for Implantable Sensing Devices", 《2006 49TH IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS》, pages 7 - 11 *
于楚东: "10位低功耗逐次逼近模数转换器的设计", 《中国优秀硕士学位论文全文数据库信息科技辑》, no. 03, pages 135 - 418 *
胡云峰等: "一种低复杂度逐次逼近型模数转换器设计与仿真", 《华南师范大学学报(自然科学版)》, vol. 50, no. 6, pages 12 - 19 *

Also Published As

Publication number Publication date
CN112187273B (en) 2023-06-02

Similar Documents

Publication Publication Date Title
CN103166644B (en) A kind of low-power consumption gradual approaching A/D converter and conversion method thereof
CN102142840B (en) Folding analog-to-digital converter
US7796079B2 (en) Charge redistribution successive approximation analog-to-digital converter and related operating method
CN108306644B (en) Front-end circuit based on 10-bit ultra-low power consumption successive approximation type analog-to-digital converter
CN105391451A (en) Successive approximation register analog to digital converter (SAR ADC) and switching method during analog-digital conversion thereof
US8823566B2 (en) Analog to digital conversion architecture and method with input and reference voltage scaling
CN103560792A (en) Comparator and analog-digital converter
CN107888190B (en) Successive approximation type analog-digital converter based on asymmetric differential capacitor array
US6229472B1 (en) A/D converter
US20100066581A1 (en) Sample/hold circuit, and analog-to-digital converter
CN104485960A (en) Three-level switching method and circuit for successive approximation type analog-digital converter
CN107968656B (en) Successive approximation type analog-digital converter and application switching method thereof
CN102055475B (en) Successive approximation analog-digital converter and method thereof
CN113114257B (en) Sub-high-order advanced successive approximation analog-to-digital converter and control method
CN107395205B (en) Successive approximation type analog-digital converter based on asymmetric differential capacitor array
CN101789789B (en) Generating circuit from reference voltage
CN106656190A (en) Continuous approximation type analog-to-digital conversion circuit and method therefor
CN110995269B (en) Energy-saving switch switching circuit suitable for low-voltage SAR ADC design and method thereof
CN112187273A (en) Low-power-consumption successive approximation type analog-to-digital conversion circuit module
CN107769784A (en) A kind of over-sampling formula Pipeline SAR ADC systems
CN105375926A (en) Pseudo-differential capacitive successive approximation register analog-digital converter
CN104143983A (en) Continuous approximation type analog-digital converter and method thereof
CN216981896U (en) Analog-to-digital converter, integrated circuit, and electronic device
CN107579738A (en) analog-to-digital conversion device
CN204906363U (en) Flash analog to digital conversion circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant