CN112164737A - Light emitting device and method for manufacturing the same - Google Patents
Light emitting device and method for manufacturing the same Download PDFInfo
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- CN112164737A CN112164737A CN202010934163.2A CN202010934163A CN112164737A CN 112164737 A CN112164737 A CN 112164737A CN 202010934163 A CN202010934163 A CN 202010934163A CN 112164737 A CN112164737 A CN 112164737A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2933/0008—Processes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
- Heating, Cooling, Or Curing Plastics Or The Like In General (AREA)
Abstract
The invention discloses a light-emitting device and a manufacturing method thereof, wherein the manufacturing method comprises the following steps: providing a first carrier having a plurality of first metal contacts; providing a base material; forming a plurality of light emitting laminated layers and a plurality of grooves on the substrate, wherein the plurality of light emitting laminated layers are separated from each other by the grooves; connecting the plurality of light-emitting laminated layers with the first carrier plate; forming an encapsulation material on the plurality of light emitting laminated layers in common; and cutting the first carrier plate and the packaging material to form a plurality of tube core-level light-emitting element units.
Description
The invention relates to a divisional application of Chinese invention patent application (application number: 201410663642.X, application date: 2014, 11 and 18, title of the invention: a light-emitting device and a manufacturing method thereof).
Technical Field
The present invention relates to a light emitting device and a method for manufacturing the same, and a light emitting device array and a method for manufacturing the same.
Background
In the conventional Light Emitting Diode (LED) package technology, a sub-mount is dispensed on a chip carrier, and then a LED chip is fixed on the chip carrier to form a LED element, which is called Die Bonding. The die bond adhesive material is mainly silver adhesive with conductivity or other non-conductive epoxy resin. And then the light-emitting diode elements are combined on the circuit board. The flip chip led has a p-type semiconductor conductive layer and an n-type semiconductor conductive layer exposed on the same side of the diode structure, so that the cathode and anode electrodes can be formed on the same side of the diode structure, thereby directly covering the led structure with the cathode and anode electrodes on a solder material (solder). Thus, the need for conventional metal wire bonding can be eliminated. However, the conventional flip-chip led still needs to be connected to the circuit board through the steps of dicing, die bonding, and the like. Therefore, if the electrodes of the flip-chip light emitting diode have a sufficiently large contact area, the conventional packaging step can be omitted.
Typical conventional LEDs operate at currents on the order of tens to hundreds of milliamperes (mA), but are often not bright enough to handle typical lighting needs. If a large number of LEDs are combined to increase the brightness, the volume of the LED lighting element will increase, resulting in a decrease in competitiveness in the market. Therefore, the brightness of the die of a single LED tends to be increased. However, as LEDs move toward high brightness, the operating current and power of a single LED increase several times to several hundred times that of a conventional LED, for example, the operating current of a high brightness LED is about several hundred milliamperes to several amperes, so that the thermal problem generated by the LED cannot be ignored. The performance of the LED may be degraded by "heat", for example, the thermal effect may affect the light emitting wavelength of the LED, and the semiconductor characteristics may also cause brightness degradation due to heat, and even cause component damage when the brightness is worse. Therefore, how to dissipate heat of the high power LED becomes an important issue of the LED.
U.S. patent application nos. 2004/0188696 and 2004/023189 (2004/0188696, division) disclose LED packages and methods using Surface Mount Technology (SMT), wherein each package contains an LED chip. Each LED chip is first flip-chip bonded to a front side of a sub-mount via bumps (bonding bumps). An array of pre-drilled openings is formed in the die pad and filled with metal to form a via array (via array). The electrodes of the chip can be connected to the back side (back side) of the die pad with solder through the array of vias. The channel array can also be used as a heat dissipation path of the LED chip. After each LED chip is adhered to the sub-substrate, the sub-substrate is cut to perform subsequent LED packaging.
However, the die pads disclosed in U.S. patent application nos. 2004/0188696 and 2004/023189 require a via array (via array) to be drilled and filled with metal, which increases the manufacturing cost. In addition, the step of adhering each LED chip to the chip base also increases the complexity of manufacturing. Therefore, if a light emitting diode is provided, a chip holder is not required, and a good heat dissipation path is provided, which is advantageous in the market.
Disclosure of Invention
The invention discloses a manufacturing method of a light-emitting device, which comprises the following steps: providing a first carrier having a plurality of first metal contacts; providing a base material; forming a plurality of light emitting laminated layers and a plurality of grooves on the substrate, wherein the plurality of light emitting laminated layers are separated from each other by the plurality of grooves; connecting the plurality of light-emitting laminated layers with the first carrier plate; forming an encapsulation material on the plurality of light emitting laminated layers in common; and cutting the first carrier plate and the packaging material to form a plurality of tube core-level light-emitting element units.
In an embodiment of the invention, the method for manufacturing the light emitting device further includes forming a first wavelength conversion layer on a first light emitting stack, the first wavelength conversion layer converting light emitted from the first light emitting stack into a first light; forming a second wavelength conversion layer on a second light emitting laminated layer, wherein the second wavelength conversion layer converts the light emitted by the second light emitting laminated layer into second light; and providing a third light emitting laminated layer without any wavelength conversion material above the third light emitting laminated layer, wherein the light emitted by the first light emitting laminated layer, the second light emitting laminated layer and the third light emitting laminated layer is blue light, the first light is green light and the second light is red light.
Drawings
Fig. 1A to fig. 1D are schematic diagrams illustrating a method for manufacturing a light emitting diode according to an embodiment of the invention;
fig. 1E and fig. 1F are schematic application diagrams of a light emitting diode according to an embodiment of the invention;
fig. 2A to fig. 2D are schematic diagrams illustrating a method for manufacturing a light emitting diode array according to an embodiment of the invention;
FIG. 2E is a schematic diagram of the connection between the LED array and the circuit board according to the embodiment of the invention;
fig. 2F and fig. 2G are schematic views illustrating a package of an led array according to an embodiment of the invention;
fig. 3A to 3G are cross-sectional views corresponding to stages of a manufacturing method flow of a light emitting device according to an embodiment of the invention;
fig. 4A is a top view of the light emitting device array shown in fig. 3F connected to a circuit carrier in a flip-chip manner;
FIG. 4B is a top view of a die-level RGB light-emitting device unit according to an embodiment of the present invention including the RGB light-emitting device group shown in FIG. 3G;
fig. 5A is a top view of a light emitting device array connected to a circuit carrier in a flip-chip manner according to an embodiment of the invention;
FIG. 5B is a top view of a light-emitting element unit at the die level of a single light-emitting element according to an embodiment of the invention;
FIG. 5C is a cross-sectional view of a light-emitting element unit at the die level of a single light-emitting element of an embodiment of the present invention;
FIG. 5D is a top view of a light-emitting element unit at the die level of a single light-emitting element of an embodiment of the present invention;
FIG. 5E is a cross-sectional view of a light-emitting element unit at the die level of a single light-emitting element of an embodiment of the present invention;
FIG. 6A is a cross-sectional view of a die-level RGB light emitting device unit according to an embodiment of the present invention
FIG. 6B is a schematic diagram of a single light emitting device in the array of light emitting devices shown in FIG. 6A;
FIG. 6C is a schematic diagram of a single light emitting device in the light emitting device array according to the embodiment of the invention;
fig. 7A to 7G are cross-sectional views corresponding to various stages of a manufacturing method of a light emitting device according to an embodiment of the invention;
FIG. 7H is a top view of a die-level RGB light-emitting device unit according to an embodiment of the invention including the RGB light-emitting device group shown in FIG. 7G;
FIG. 7I is a cross-sectional view of a light-emitting element unit at the die level of a single light-emitting element of an embodiment of the present invention;
FIG. 7J is a top view of a light-emitting element unit at the die level of a single light-emitting element of an embodiment of the invention;
FIG. 8A is a diagram of a display module according to an embodiment of the invention;
FIG. 8B is a diagram of a display module according to an embodiment of the invention; and
fig. 9 is an exploded view of a light bulb component according to an embodiment of the present invention.
Description of the symbols
11, 21 base material
102 first conductive layer
104 active layer
106 second conductive layer
107a, 107b electrodes or bonding pads
122. a first dielectric layer
140, 240 of a second dielectric layer
222a, 222b, 222c, 240a, 240b, 240c, 280 c
160, 260a, 260b, 260c, 162, 262a, 262b, 262c
20, 30, 32 'array of light emitting elements'
21. base material
22. solder
24. transparent encapsulating material
Light emitting device package
Light-emitting element 10, 10a, 10b, 10c, 20a, 20b, 20c, 300a, 300b, 300c, 300d, 300a ', 300 b', 300c ', 300 d'
102a
101. light emitting laminate
221 reflecting layer
260, 260 'of a first metal layer'
262, 262 'of a second metal layer'
290. light impermeable layer
22. metal contact
22a conductive channel
294
296 a second wavelength conversion layer
Red, green and blue light emitting element unit 35, 36', 65, 66, 37
First width S1, S6'
S2 a first length
Second width d1, d 1'
D2 second length
S3, S3'
S4
S5
298 wavelength conversion layer
S1 a first length
S6 first width
Fill material
76 display module
73 second circuit carrier plate
78 illumination module
Bulb
82 optical lens
Radiating groove 85
Coupling part 87
88 electric connector
Detailed Description
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below. In the drawings, the shape or thickness of elements may be expanded or reduced. It is to be noted that elements not shown or described in the drawings may be of a type known to those skilled in the art. The examples are given solely for the purpose of illustration and are not intended to limit the scope of the invention. Any obvious modifications or variations can be made to the present invention without departing from the spirit or scope of the present invention.
Fig. 1A to fig. 1E are cross-sectional views corresponding to stages of a manufacturing method of a light emitting device according to an embodiment of the invention. In fig. 1A, a light emitting structure 100 is first formed, which includes a substrate 11, a first conductive layer 102 as a cladding layer, an active layer 104 on the first conductive layer 102 as a light emitting layer, and a second conductive layer 106 on the active layer 104 as another cladding layer. Preferably, as shown in fig. 1A, one electrode or bonding pad 107a is located on the exposed portion of the first conductive layer 102 and another electrode or bonding pad 107b is located on the second conductive layer 106. The materials (e.g., aluminum) and fabrication methods of the electrodes or bonding pads 107a and 107b are well known to those skilled in the art and will not be described herein. In addition, in an embodiment, the light emitting structure 100 further includes a passivation layer (passivation layer)120 to protect the light emitting structure 100. The material (e.g., silicon dioxide) and the manufacturing method of the passivation layer 120 are well known to those skilled in the art and will not be described herein.
In one embodiment, the first conductive layer 102 is an n-type semiconductor conductive layer, and the second conductive layer 106 is a p-type semiconductor conductive layer. The n-type semiconductor conductive layer 102 and the p-type semiconductor conductive layer 106 may be any of those existing or available in the futureAs the semiconductor material, a III-V (tri/penta) group compound semiconductor, for example, aluminum gallium indium nitride (Al)xGayln(1-x-y)N) or aluminum gallium indium phosphide (Al)xGayIn(1-x-y)P), wherein 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1, and optionally further doped with a P/n type dopant. The active layer 104 may be formed of conventional semiconductor materials and structures, such as aluminum gallium indium nitride (Al)xGayln(1-x-y)N) or aluminum gallium indium phosphide (Al)xGayln(1-x-y)P), and the structure can be Single Quantum Well (SQW), Multiple Quantum Well (MQW), and Double Heterogeneous (DH), and the light emitting principle and mechanism thereof are the prior art and will not be described herein. The light emitting structure 100 may be fabricated by Metal Organic Chemical Vapor Deposition (MOCVD), a Molecular Beam Epitaxy (MBE) fabrication process, a Hydride Vapor Phase Epitaxy (HVPE) fabrication process, or the like.
Next, as shown in fig. 1B, a first dielectric layer 122 is formed on the light emitting structure 100. Preferably, the first dielectric layer 122 is a transparent dielectric layer, and the thickness D ≦ 20 μm, so as to effectively conduct heat generated by the light emitting structure 100. The material of the first dielectric layer 122 may be silicon dioxide (SiO)2) Silicon nitride (Si)3N4) Or a combination thereof, which may be fabricated by MOCVD or MBE.
Thereafter, referring to fig. 1C, a second dielectric layer 140 is formed on the first dielectric layer 122. The material of the second dielectric layer 140 may be one selected from silicon dioxide, silicon nitride, polyimide (polyimide), bcb (benzocyclobutene), and photoresist (photoresist). Preferably, the second dielectric layer 140 has a thickness of about 25 μm and is formed by a printing technique.
Referring to fig. 1D, after the second dielectric layer 140 is formed, a metal layer 160 is formed, the metal layer 160 is located on the light emitting structure 100 and electrically contacts the first conductive layer 102, and a portion of the metal layer 160 is located on the first dielectric layer 122; and forming a metal layer 162, wherein the metal layer 162 is disposed on the light emitting structure 100 and electrically contacts the second conductive layer 106, and a portion of the metal layer 162 is disposed on the first dielectric layer 122. The first dielectric layer 122 and the second dielectric layer 140 isolate the metal layer 160 and the metal layer 162. The material of the metal layer 160 or 162 may be selected from gold (Au), aluminum (Al), silver (Ag), alloys thereof, or other existing metals. Preferably, the metal layer 160 and the metal layer 162 are formed together by a printing technique or plating. Through the above steps, the light emitting element 10 is completed.
In an embodiment, the first dielectric layer 122 is a transparent dielectric layer, and the contact surface between the first dielectric layer 122 and the metal layer 160 and/or the metal layer 162 is used for reflecting the light emitted from the light emitting structure 100, so that the light output intensity of the light emitting device 10 can be effectively improved. In addition, the metal layer 160 and/or the metal layer 162 also serve as a heat dissipation path of the light emitting structure 100, and the metal layer 160 and the metal layer 162 have larger contact areas a1 and a2, which also helps to dissipate heat efficiently and quickly.
Referring to fig. 1E, after the structure shown in fig. 1D is formed, the method for manufacturing a light emitting device further includes a step of removing the substrate 11 to expose the first conductive layer 102. The substrate 11 may be a sapphire substrate or a gallium arsenide substrate, for example. When the substrate 11 is a sapphire substrate, the substrate 11 may be removed by an excimer laser (eximer laser). The excimer laser may be a laser having an energy of 400 millijoules per square centimeter (mJ/cm)2) KrF excimer laser having a wavelength of 248 nm and a pulse width (pulse width) of 38 nanoseconds (ns). At a higher temperature, for example 60 ℃, when the excimer laser is irradiated on the sapphire substrate, the sapphire substrate is removed to expose the first conductive layer 102. In addition, when the substrate 11 is a GaAs substrate, a ratio of ammonia (NH) to water (NH) of 1:354OH) and hydrogen peroxide (H)2O2) Or a phosphoric acid (H) in a ratio of 5:3:53PO4) Hydrogen peroxide (H)2O2) A solution with water may be used to remove the gallium arsenide substrate for exposing the first conductive layer 102.
After removing the substrate 11, the method for manufacturing the light emitting device further includes roughening the surface 102a of the first conductive layer 102. For example, when the first conductive layer 102 is a nitrideAluminum gallium indium (Al) oxidexGayln(1-x-y)N) layer, the surface 102a of which may be roughened by an etching solution, such as a potassium hydroxide (KOH) solution. In addition, when the first conductive layer 102 is an aluminum gallium indium phosphide (Al)xGayIn(1-x-y)P) layer, a solution of hydrochloric acid (HCl) and phosphoric acid may be used to roughen the surface 102a of the first conductive layer 102, for example, for 15 seconds. The roughened surface 102a of the first conductive layer 102 can reduce the possibility of total reflection, which is used to increase the light extraction efficiency of the light emitting device.
The light emitting device 10 shown in fig. 1F and the light emitting devices 10a, 10b, and 10c shown in fig. 1D provide a sufficiently large contact area (preferably, at least one half of the cross-sectional area of the light emitting device 10), and the light emitting devices 10a, 10b, and 10c are directly connected to the circuit carrier 13 by using solder (solder)12 without processes such as Die Bonding and Wire Bonding. In one embodiment, the light emitting device 10a emits red light (R), the light emitting device 10B emits green light (G), and the light emitting device 10c emits blue light (B), which are respectively connected to the circuit carrier 13 for image display.
Fig. 2A to fig. 2D are cross-sectional views corresponding to stages of a manufacturing method of a light emitting device array according to an embodiment of the invention. In FIG. 2A, a substrate 21, such as a Sapphire (Sapphire) substrate, a gallium arsenide (GaAs) substrate, or other substrates and combinations thereof known to those skilled in the art, is first provided. Next, a plurality of light emitting structures 200a, 200b, and 200c are formed on the substrate 21. The materials and fabrication methods of the light emitting structures 200a, 200b, and 200c can refer to the light emitting structure 100 of fig. 1A to 1D. Similarly, the light emitting structures 200a, 200b, and 200c can be fabricated by a Metal Organic Chemical Vapor Deposition (MOCVD) fabrication process, a Molecular Beam Epitaxy (MBE) fabrication process, or a Hydride Vapor Phase Epitaxy (HVPE) fabrication process.
Next, as shown in fig. 2B, a dielectric layer 222a is formed on the light emitting structure 200a, a dielectric layer 222B is formed on the light emitting structure 200B, and a dielectric layer 222c is formed on the light emitting structure 200 c. Preferably, like the dielectric layer 122 shown in fig. 1B, the dielectric layers 222a, 222B, 222c are transparent dielectric layers having a thickness D ≦ 20 μm, thereby effectively conducting heat generated by the light emitting structures 200a, 200B, 200 c. The material of the dielectric layers 222a, 222b, 222c may be silicon dioxide, silicon nitride, or a combination thereof, which may be fabricated by MOCVD or MBE.
Thereafter, referring to fig. 2C, a dielectric layer 240a is formed on the dielectric layer 222a, a dielectric layer 240b is formed on the dielectric layer 222b, and a dielectric layer 240C is formed on the dielectric layer 222C. The material of the dielectric layers 240a, 240b, and 240c may be selected from silicon dioxide, silicon nitride, polyimide, bcb (benzocyclobutene), and photoresist. Preferably, as with the second dielectric layer 140 shown in FIG. 1C, the dielectric layers 240a, 240b, 240C each have a thickness of about 25 μm and are formed by a printing technique. In one embodiment, a dielectric layer 280 is further formed between the light emitting structures 200a, 200b, and 200c for electrically insulating the light emitting elements 20a, 20b, and 20c (as shown in fig. 2D). In this embodiment, the dielectric layer 280 is made of the same material as the dielectric layers 240a, 240b, and 240c, such as polyimide, and is formed together with the dielectric layers 240a, 240b, and 240c by a manufacturing process (e.g., a printing technique). In another embodiment, the material of the dielectric layer 280 is different from the material of the dielectric layers 240a, 240b, 240c and is formed by different fabrication processes.
Referring to fig. 2D, metal layers 260a, 260b, 260c are formed; and forming metal layers 262a, 262b, 262 c. The material of the metal layers 260a, 260b, 260c, 262a, 262b, and 262c may be selected from gold (Au), aluminum (Al), silver (Ag), or alloys thereof. Preferably, the metal layers 260a, 260b, 260c, 262a, 262b, and 262c are formed together by a printing technique or plating. Through the above steps, the light emitting device array 20 having the light emitting devices 20a, 20b, and 20c is completed.
As shown in fig. 2E to 2F, in an embodiment, the light emitting elements 20a, 20b, and 20c provide a contact area large enough to be directly connected to the circuit carrier 23 by solder (solder) 22. The substrate 21 is separated from the light emitting device array 20, so that the light emitting device array 20 can be used for displaying images. For example, direct attachment of hair using solder 22After the optical devices 20a, 20b, and 20c and the circuit carrier 23, the method for manufacturing the light emitting device further includes a step of removing the substrate 21. The substrate 11 may be, for example, a sapphire substrate and may be removed by an excimer laser (eximer laser). The excimer laser may be a laser having an energy of 400 millijoules per square centimeter (mJ/cm)2) KrF excimer laser having a wavelength of 248 nm and a pulse width (pulse width) of 38 nanoseconds (ns). At a higher temperature, such as 60 ℃, when the excimer laser irradiates the sapphire substrate, the sapphire substrate is removed to expose the first conductive layer 102. In addition, when the substrate 11 is a GaAs substrate, a ratio of ammonia (NH) to water (NH) of 1:354OH) and hydrogen peroxide (H)2O2) Or a phosphoric acid (H) in a ratio of 5:3:53PO4) Hydrogen peroxide (H)2O2) The solution with water may be used to remove the gaas substrate to expose the first conductive layer 102.
After removing the substrate 21, the method for manufacturing the light emitting device further includes roughening the surface 102a of the first conductive layer 102. For example, when the first conductive layer 102 is an aluminum gallium indium nitride (Al)xGayln(1-x-y)N) layer, the surface 102a of which may be roughened by an etching solution, such as a potassium hydroxide (KOH) solution. In addition, when the first conductive layer 102 is an aluminum gallium indium phosphide (Al)xGayIn1-x-yP) layer, a solution of hydrochloric acid (HCl) and phosphoric acid may be used to roughen the surface 102a of the first conductive layer 102, for example, for 15 seconds. The roughened surface 102a of the first conductive layer 102 can reduce the possibility of total reflection, which is used to increase the light extraction efficiency of the light emitting device. In one embodiment, as shown in fig. 2G, a transparent encapsulating material 24 is used to encapsulate the light emitting device array 20 including the light emitting devices 20a, 20b, and 20c and connect the circuit carrier 23, thereby forming the light emitting device package 25, wherein the transparent encapsulating material 24 may be, for example, epoxy resin or other suitable materials known to those skilled in the art.
Fig. 3A to fig. 3G are cross-sectional views corresponding to stages of a manufacturing method of a light emitting device according to an embodiment of the invention. Referring to fig. 3A, a substrate 21 is provided, which is a single crystal and comprises sapphire, gaas, gan or si; epitaxially growing a first conductive layer 102 on the substrate 21, the first conductive layer 102 being a cladding layer; epitaxially growing an active layer 104 including a Multiple Quantum Well (MQW) structure on the first conductive layer 102, wherein the active layer 104 serves as a light emitting layer; and epitaxially growing a second conductive layer 106 on the active layer 104, wherein the second conductive layer 106 serves as another cladding layer. Next, the first conductive layer 102, the active layer 104 and the second conductive layer 106 are etched to form a plurality of light emitting stacks 101 separated from each other by trenches (not shown) on the substrate 21, and in each light emitting stack 101, a portion of the first conductive layer 102 is exposed. Next, a passivation layer 120 is formed on each light emitting stack 101, and the passivation layer 120 covers a portion of the first conductive layer 102, a portion of the second conductive layer 106, and a sidewall of the light emitting stack 101. Next, an electrode or bonding pad 107a electrically connected to the first conductive layer 102 is disposed on the exposed portion of each first conductive layer 102, and an electrode or bonding pad 107b electrically connected to the second conductive layer 106 is disposed on each second conductive layer 106.
Then, referring to fig. 3B, a reflective layer 221 is disposed on each passivation layer 120, and a first dielectric layer 122 covering the reflective layer 221 is formed on each passivation layer 120. The reflective layer 221 has a reflectivity equal to or greater than 80% for light emitted from the light emitting stack 101. The material of the reflective layer 221 includes a metal, such as silver, a silver alloy, aluminum, or an aluminum alloy. In one embodiment, the material of the reflective layer 221 includes a polymer mixed with inorganic particles, wherein the inorganic particles are composed of metal oxide or a material having a reflectivity equal to or greater than 1.8, and the material of the reflective layer 221 is, for example, epoxy resin mixed with titanium oxide particles. Each reflective layer 221 is completely covered by the corresponding protective layer 120 and the first dielectric layer 122, for electrically insulating each reflective layer 221 from the corresponding light emitting stack 101. In another embodiment, the passivation layer 120 is omitted, and the reflective layer 221 is formed directly on the second conductive layer 106 and electrically connected to the second conductive layer 106. Thereafter, as shown in fig. 3C, a second dielectric layer 240 is formed on the substrate 21 and between the trenches and on each light emitting stack 101, and each second dielectric layer 240 exposes a corresponding electrode or bonding pad 107a and a corresponding electrode or bonding pad 107 b. Thereafter, a first metal layer 260 and a second metal layer 262 are formed between each second dielectric layer 240 and on a portion of the corresponding first dielectric layer 122. The first metal layer 260 and the second metal layer 262 are formed on the corresponding electrode or bonding pad 107a and electrode or bonding pad 107b, respectively. The material of the first metal layer 260 and the second metal layer 262 includes gold, aluminum, silver, or an alloy thereof. In one embodiment, the first metal layer 260 and the second metal layer 262 are formed together by a printing technique or electroplating.
As shown in fig. 3D, the second dielectric layer 240 between the adjacent light emitting stacked layers 101 is patterned to form a groove in the second dielectric layer 240, the groove exposes a portion of the substrate 21 and separates the second dielectric layer 240 to form a dielectric layer 240a, and then an opaque layer 290 is formed in the groove. In one embodiment, the opaque layer 290 functions as a reflective layer or a light absorbing layer for reflecting or absorbing light emitted from the corresponding light emitting stack 101 and preventing the light emitted from the adjacent light emitting stacks 101 from influencing each other or generating crosstalk (crosstalk). The opaque layer 290 has a transmittance (transmittance) of less than 50% for the light emitted from the corresponding light emitting stack 101. The material of the opaque layer 290 includes metal or polymer mixed with inorganic particles, wherein the inorganic particles are composed of metal oxide or material having a reflectivity equal to or greater than 1.8, and the material of the reflective layer 221 is, for example, epoxy resin mixed with titanium oxide particles. Thus, the light emitting element array 30 including the plurality of light emitting elements 300 is completed. As shown in fig. 3E, a circuit carrier 23 is provided, which includes a plurality of metal contacts 22 located on the upper surface and the lower surface of the circuit carrier 23 and a plurality of conductive vias 22a penetrating through the circuit carrier 23, wherein the conductive vias 22a can connect the metal contacts 22 located on the upper surface of the circuit carrier and the metal contacts 22 located on the lower surface of the circuit carrier. In one embodiment, the circuit carrier 23 includes solder (solder). The circuit carrier 23 comprises FR-4, BT (bimoleimide-Triazine) resin, ceramic or glass. Thickness of the circuit carrier 23Between 50 and 200 microns to adequately support the light emitting elements while still having a small volume. The light emitting device array 30 is directly flip-chip connected to the circuit carrier 23 by aligning the first metal layer 260 and the second metal layer 262 of each light emitting device 300 to the corresponding metal contacts 22. It should be noted that, a gap may be formed in the area other than the metal contact 22 between the light emitting device array 30 and the circuit carrier 23. Optionally, the voids may be filled with a filler material to improve bond strength and mechanical support. After the light emitting device array 30 and the circuit carrier 23 are connected, the substrate 21 of the light emitting device array 30 is removed. In one embodiment, the substrate comprises sapphire, the light emitting stack 101 comprises gan, and the method of removing the substrate 21 comprises irradiating an interface between the first conductive layer 102 and the substrate 21 with an excimer laser at a higher temperature, such as 60 ℃, followed by separating the substrate 21 and the first conductive layer 102. The excimer laser may be a laser having an energy of 400 millijoules per square centimeter (mJ/cm)2) KrF excimer laser having a wavelength of 248 nm and a pulse width (pulse width) of 38 nanoseconds (ns). In another embodiment, when the substrate 21 is a GaAs substrate, the method of removing the substrate 21 comprises using ammonia (NH) in a ratio of 1:354OH) and hydrogen peroxide (H)2O2) Or a mixture of phosphoric acid (H) in a ratio of 5:3:53PO4) Hydrogen peroxide (H)2O2) The mixture with water is etched until the substrate 21 is completely removed and the first conductive layer 102, the dielectric layer 240a and the opaque layer 290 of each light emitting device 300 are exposed.
As shown in fig. 3F, after removing the substrate 21, the method for manufacturing the light emitting device further includes roughening the exposed surface of the first conductive layer 102. In one embodiment, the first conductive layer 102 comprises aluminum gallium indium nitride (Al)xGayln(1-x-y)N, where 0 ≦ x, y ≦ 0), the exposed surface of the first conductive layer 102 may be etched using a potassium hydroxide (KOH) solution to form a roughened surface 102 a. In another embodiment, the first conductive layer 102 comprises aluminum gallium indium phosphide (Al)xGayIn(1-x-y)P), the exposed surface of the first conductive layer 102 may be etched using a solution of hydrochloric acid (HCl) or phosphoric acidTo form a roughened surface 102a, the roughening time may be, for example, 15 seconds. The roughened surface 102a of each first conductive layer 102 can reduce the probability of total reflection of light in each light emitting device 300, thereby increasing the light extraction efficiency of the light emitting device. After the roughening step, a plurality of recessed regions are located on the roughened surface 102a and substantially surrounded by the dielectric layer 240 a. In one embodiment, in order to form a die-level red, green, and blue light emitting device unit for a display, the manufacturing method of the present embodiment may selectively coat a first wavelength conversion layer 294 on the light emitting device 300b to convert light, as shown in fig. 3F. For example, the light emitting stack 101 of the light emitting device 300b, which emits blue light with a dominant wavelength between 430 nm and 470 nm, is converted into a first converted light, such as red light with a dominant wavelength between 610 nm and 690 nm. Further, a second wavelength conversion layer 296 may be selectively coated on the light emitting device 300c for converting the light emitted from the light emitting device 300c into a second converted light, such as a green light having a main wavelength between 500 nm and 570 nm. The light emitting device 300a is not coated with any wavelength conversion material to directly emit blue light from the roughened surface 102a of the light emitting device 300 a. In one embodiment, the first or second wavelength conversion layer is formed by collecting nano-sized quantum dots (quantum dots) or nano-sized phosphors to form a film with a substantially uniform thickness, and is connected to the light emitting stack 101 by an adhesive layer (not shown). In another embodiment, the first or second wavelength conversion layer comprises quantum dots having a nanometer scale or phosphors having a nanometer scale, and an average diameter or average characteristic length between 10 nm and 500 nm. The length or characteristic length of each nanoscale quantum dot or nanoscale phosphor is substantially less than 1000 nanometers. Quantum dots of nanometric scale comprising semiconductor materials, e.g. one having the composition ZnxCdyMgl-x-yA II-VI compound semiconductor of Se, wherein x and y are tunable such that the II-VI compound semiconductor emits green or red light upon photoexcitation. "characteristic length" is defined as the maximum distance between any two end points of a phosphor or a quantum dot. Then, for example, an epoxy resin or a silicone resin (silicone)The transparent encapsulating material 24 is applied to the upper surface of the light emitting element array 32 to fix the wavelength conversion material to the light emitting laminate 101, and serves as an optical lens of the light emitting elements 300a, 300b, 300c of the light emitting element array 32. In another embodiment, the material of the wavelength converting layer covering the light emitting elements 300a, 300b, 300c is the same.
Fig. 4A is a top view of the light emitting device array 32 shown in fig. 3F connected to the circuit carrier 23 in a flip-chip manner. Both the light emitting element array 32 and the circuit carrier 23 are in the form of wafers having the same or similar dimensions. The light emitting device array 32 includes a plurality of red, green, and blue light emitting device groups arranged alternately and continuously in a two-dimensional space, and each group includes one light emitting device 300a, one light emitting device 300b, and one light emitting device 300c as shown by the dotted line circled portion in the figure.
Finally, a dicing step is performed to simultaneously dice the light emitting device array 32 and the circuit carrier 23, so as to form a plurality of die-level rgb light emitting device units 35 as shown in fig. 3G, where each of the die-level rgb light emitting device units 35 includes a blue light emitting device 300a emitting blue light, a red light emitting device 300b emitting red light, and a green light emitting device 300c emitting green light. The die-level rgb led unit 35 is a package-free and surface-mount device, i.e., can be directly bonded to a pcb without conventional packaging steps after the dicing step. The transparent encapsulation material 24 collectively covers the light emitting elements 300a, 300b, and 300 and does not extend to the sidewalls of the light emitting elements 300a, 300b, and 300 c. In one embodiment, the dicing step simultaneously dice the light emitting device array 32 and the circuit carrier 23 to form a plurality of die-level rgb light emitting device units, wherein each die-level rgb light emitting device unit includes a plurality of rgb light emitting device groups. A plurality of RGB light-emitting element groups are arranged in an I X J array in a RGB light-emitting element unit, wherein I and J are positive integers, and at least one of I and J is greater than 1. The ratio of I to J is preferably near or equal to 1/1, 3/2, 4/3, or 16/9.
Referring to fig. 4B, the red, green, and blue light emitting element unit 35 is a die levelComprising a red, green and blue light emitting device group as shown in FIG. 3G. The die-level red, green and blue light emitting device unit 35 is a first rectangle having a first long side and a first short side, wherein the first short side has a first width S1 and the first long side has a first length S2 greater than the first width S1. Each of the light emitting stacks 101 is a second rectangle having a second long side and a second short side, wherein the second short side has a second width d1 and the second long side has a second length d2 greater than the second width d 1. The second short side of the light emitting stack 101 is substantially disposed parallel to the first long side of the die-level rgb light emitting element unit 35 or substantially disposed perpendicular to the first short side of the die-level rgb light emitting element unit 35. In one embodiment, the rgb light-emitting device unit 35 can be used as a pixel of an indoor display panel. In order to fully utilize the light-emitting element pixels for a television display having 40 inch diagonal and 1024 x 768 pixel resolution, the area of each pixel needs to be less than about 0.64 square millimeter (mm)2). Therefore, the area of the red, green, and blue light emitting element unit 35 may be, for example, less than 0.36mm 2. The first length S2 and the first width S1 are less than 0.6 mm, and the aspect ratio of the rgb light emitting device unit 35, i.e., S2/S1, is preferably less than 2/1. According to the embodiment of the disclosure, the distance between the first metal layer 260 and the second metal layer 262, i.e., the first distance S3, is limited by the alignment control of the light emitting device array and the circuit carrier in the connection step. The first distance S3 is equal to or greater than 25 micrometers (microns) and less than 150 microns for ensuring manufacturing process tolerances and providing a contact area sufficient for electrical conduction. The distance between one of the edges of the rgb light-emitting device unit 35 and one of the light-emitting stacks 101 of the rgb light-emitting device unit 35, i.e., the second distance S4, is limited by the tolerance of the cutting step. The second distance S4 is equal to or greater than 25 micrometers and less than 60 micrometers for ensuring the tolerance of the cutting step and maintaining the advantage of a small volume. The distance between two adjacent light emitting elements, i.e. the third distance S5, is limited by the photolithography etching step and is less than 50 microns, or preferably less than 25 microns, for keeping more area between the light emitting stacks 101. For each light emitting stack in the red, green and blue light emitting element unit 35101, the second width d1 is between 20 and 150 micrometers and the second length d2 is between 20 and 550 micrometers. The ratio of the area of the red, green and blue light emitting element unit 35 to the total area of the light emitting stack 101 is less than 2 or between 1.1 and 2, and preferably between 1.2 and 1.8. The area of the light emitting stack 101 depends on the desired brightness and the pixel size. It should be noted that the rgb light-emitting device unit 35 may also be a square with four sides having the same width S1. In one embodiment, a pixel includes two rgb light-emitting device units 35, one for normal operation and the other for backup to prevent failure of the rgb light-emitting device units 35 in normal operation. The first width S1 is preferably less than 0.3 mm for two rgb light-emitting element units 35 to be disposed in one pixel. The invention has the advantages that the light-emitting element can be used as a pixel element of a flat television, and the resolution can be increased to two times or four times of the pixel resolution of 1024 x 768. In another embodiment, a RGB light emitting device unit 35 comprises two RGB light emitting device groups, one for normal operation and the other for backup to prevent malfunction of the RGB light emitting device groups in normal operation.
Referring to fig. 5A to 5C, a method for manufacturing a die-level light emitting device unit according to an embodiment of the invention is similar to the embodiment shown in fig. 3A to 3G and the related disclosure, except that the light emitting device array 34 includes a plurality of identical light emitting devices 300d before the dicing step, as shown in fig. 5A. Each light emitting device 300d is coated with the same or different wavelength conversion layer 298, and the wavelength conversion layer 298 is used for converting light emitted from the light emitting stack 101 of the corresponding light emitting device 300d, for example, converting blue light with a main wavelength between 430 nanometers and 470 nanometers into yellow light, green light or converted light from light. Referring to fig. 5B and 5C, a top view and a cross-sectional view of the die-level light-emitting device unit 36 including a single light-emitting device are shown after the dicing step. The size of the die-level light emitting element unit 36 is similar to or the same as that of the die-level red, green, and blue light emitting element unit 35 shown in fig. 4B. The light-emitting element unit 36 at die level has a first long side anda first rectangle with a first short side, wherein the first long side has a first length S1, and the first short side has a first width S6 smaller than the first length S1. Each of the light emitting stacks 101 is a second rectangle having a second long side and a second short side, wherein the second short side has a second width d1 and the second long side has a second length d2 greater than the second width d 1. The second short side of the light emitting stack 101 is substantially disposed parallel to the first short side of the die-level rgb light emitting element unit 36 or substantially disposed perpendicular to the first long side of the die-level rgb light emitting element unit 36. In one embodiment, the RGB light emitting device units 36 are part of the pixels of a display panel used in a room. The area of the RGB light emitting element unit 36 may be, for example, less than 0.12mm2. The first length S1 and the first width S6 are both less than 0.2 mm, and the aspect ratio of the rgb light emitting device units 36, i.e., S1/S6, is preferably less than 2/1. According to the present invention, the distance between the first metal layer 260 and the second metal layer 262, i.e. the first distance S3, is limited by the alignment control of the light emitting device array and the circuit carrier in the connection step. The first distance S3 is equal to or greater than 25 microns and less than 150 microns to ensure manufacturing process tolerances and to provide sufficient contact area for conduction. The distance between one of the edges of the rgb light-emitting device unit 36 and the light-emitting layer stack 101, i.e., the second distance S4, is limited by the tolerance of the cutting step. The second distance S4 is equal to or greater than 25 micrometers and less than 60 micrometers for ensuring the tolerance of the cutting step and maintaining the advantage of a small volume. For the light emitting stack 101 in the die-level red, green and blue light emitting element unit 36, the second width d1 is between 20 and 150 micrometers and the second length d2 is between 20 and 550 micrometers. The ratio of the area of the die-level red, green, and blue light-emitting element units 36 to the total area of the light-emitting stack 101 is less than 2 or between 1.1 and 2, and preferably between 1.2 and 1.8. The area of the light emitting stack 101 depends on the desired brightness and the pixel size. It should be noted that the rgb led units 36 may also be square with four sides having the same width S6. Similarly, the light emitting stack 101 may also be square with four sides having the same width d 1. In one embodiment of the present invention, the first and second electrodes are,a pixel includes at least three die-level red, green, and blue light-emitting element units 36 for emitting blue, red, and green light.
Referring to fig. 5D to 5E, a method for manufacturing a die-level light emitting device unit according to an embodiment of the invention is similar to the embodiment shown in fig. 5A to 5C and the related disclosure, except that the opaque layer 290 may be optionally omitted. The rgb light emitting device unit 36' is surface mounted directly to a light panel contained in a lamp. The area of the light emitting stack 101 depends on the desired brightness and the size of the light panel or luminaire. For low power applications, e.g., less than 0.3 watts, the area of the light emitting stack 101 of the red, green, and blue light emitting element unit 36' is 100 mils2To 200mil2For medium power applications, such as between 0.3 and 0.9 watts, the area of the light emitting stack 101 of the rgb light emitting device unit 36' is 201mil2To 900mil2For high power applications, e.g., greater than 0.9 watts, the area of the light emitting stack 101 of the RGB light emitting element unit 36' is greater than 900 mils2. The dielectric layer 240a surrounding the light emitting stack 101 may act as a coupling lens (coupling lens) for extracting light out of the light emitting element unit 36' at the die level. The ratio of the area of the die-level light-emitting element unit 36' to the area of the light-emitting laminate 101 is equal to or greater than 9, and preferably equal to or greater than 15, for having a preferred light extraction efficiency and light dispersibility. In the present invention, the distance between the first metal layer 260 and the second metal layer 262, i.e. the first distance S3', is limited by the alignment control of the light emitting device array and the circuit carrier in the connection step. The first distance S3' is equal to or greater than 25 microns and less than 150 microns for ensuring manufacturing process tolerances and providing sufficient contact area for conduction. It is noted that the die-level light-emitting device unit 36 'may also be square with four sides having the same width S6'. Similarly, the light emitting stack 101 may also be square with four sides having the same second width d 1'. The first width S6 ' is the same as the second width d1 ' or is more than three times the second width d1 ', preferably, the first width S6 ' is the same as the second width d1 ' or is more than the second width d1Four times the width d1 'to provide the die-level light-emitting element unit 36' with a preferred light extraction efficiency. In one example, the dielectric layer has different thicknesses at the sidewalls of the light emitting stack 101, so that a first ratio (S6 '/d 1 ') of the first width S6 ' to the second width d1 ' is different from a second ratio (S1 '/d 2 ') of the first length S1 ' to the second length d2 ', so as to achieve a top view of the die-level light emitting device unit 36 ' having asymmetric optical field characteristics when in operation. Furthermore, the first ratio is at least twice the second ratio, or preferably four times the second ratio.
Referring to fig. 6A, a cross-sectional view of a die-level rgb u-65 according to an embodiment of the invention, the manufacturing method and structure thereof are similar to the embodiment shown in fig. 3A to 3G and related disclosure, except that a filling material 680 is filled in the gap between the circuit carrier 23 and the light emitting device array 32 'including the light emitting devices 300 a', 300b 'and 300 c' for improving the connection strength therebetween and providing a current path between the circuit carrier and the light emitting devices. The filling material 680 includes Anisotropic Conductive Film (ACF) having the ability to conduct current in a vertical path between the light emitting element array 32 'and the circuit carrier plate 23 and insulate current in a lateral path parallel to the light emitting element array 32' or the circuit carrier plate 23. The filling material 680 is coated on the circuit carrier 23 before connecting the light emitting device array to the circuit carrier 23. In one embodiment, the first metal layer 260 'and the second metal layer 262' are not in contact with the metal contacts 22 of the circuit carrier 23. A fill material 680 is located between the first metal layer 260 ', the second metal layer 262', and the metal contact 22 for conducting current between the first metal layer 260 ', the second metal layer 262', and the metal contact 22. The first metal layer 260 'and the second metal layer 262' are patterned so that the surface facing the metal contact 22 is a roughened surface having a plurality of recesses and protrusions. Therefore, the contact area between the light emitting device array and the circuit carrier is increased, and the connection strength between the light emitting device array and the circuit carrier is also improved. The plurality of concave portions and the plurality of convex portions have a regular shape or an irregular shape, and the surface roughness (Ra) is between 0.5 and 5 micrometers. An advantage of using an anisotropic conductive paste as the filling material is that the distance between the first metal layer 260 'and the second metal layer 262', i.e., the first distance S3 as shown in fig. 4B, may be less than 25 microns.
Fig. 6B is a schematic diagram of a single light-emitting device 300d 'in the light-emitting device array 32' shown in fig. 6A. The filling material 680 and the patterned surfaces of the first metal layer 260 'and the second metal layer 262' may also be applied to the embodiments shown in fig. 5A-5C for forming the structure shown in fig. 6B. The filling material 680 fills the gap between the light emitting device 300 d' and the circuit carrier 23 to improve the connection strength therebetween and provide a current path between the circuit carrier and the light emitting device. The filling material 680 includes Anisotropic Conductive Film (ACF) having the ability to conduct current in a vertical path between the light emitting element 300d 'and the circuit carrier plate 23 and insulate current in a lateral path parallel to the light emitting element 300 d' or the circuit carrier plate 23. The filling material 680 is coated on the circuit carrier 23 before connecting the light emitting device array to the circuit carrier 23. In one embodiment, the first metal layer 260 'and the second metal layer 262' are not in contact with the metal contacts 22 of the circuit carrier 23. A fill material 680 is located between the first metal layer 260 ', the second metal layer 262', and the metal contact 22 for conducting current between the first metal layer 260 ', the second metal layer 262', and the metal contact 22. The first metal layer 260 'and the second metal layer 262' are patterned so that there are a plurality of recesses and protrusions on the surface facing the metal contact 22. Therefore, the contact area between the light-emitting element and the circuit carrier plate is increased, and the connection strength between the light-emitting element and the circuit carrier plate is also improved. The plurality of concave portions and the plurality of convex portions have a regular shape or an irregular shape, and the surface roughness (Ra) is between 0.5 and 5 micrometers. Similarly, the filling material 680 and the patterned surfaces of the first metal layer 260 'and the second metal layer 262' can also be applied to the embodiment shown in fig. 5E to form the structure shown in fig. 6C.
Referring to fig. 7A to 7G, which are cross-sectional views corresponding to stages of a manufacturing method flow of a light emitting device according to an embodiment of the present invention, wherein steps and structures of fig. 7A to 7D are similar to those of the embodiment shown in fig. 2A to 2D and related disclosure, and steps and structures of fig. 7F to 7G are similar to those of the embodiment shown in fig. 3E to 3F and related disclosure, except that, as shown in fig. 7C, the dielectric layers 240a, 240b, 240C, 280 are a photoresist, such as a positive photoresist or a negative photoresist; as shown in fig. 7D to 7E, after the metal layers 260a, 260b, 260c and 262a, 262b, 262c are formed, the method further includes removing the dielectric layers 240a, 240b, 240c, 280, thereby forming voids between two adjacent light emitting elements and between the metal layers of a single light emitting element; as shown in fig. 7F to 7G, after the substrate 21 is removed, two adjacent light emitting elements are separated from each other by the gap, and the manufacturing method further includes roughening the exposed surface of the first conductive layer 102 to form a roughened surface 102a, as mentioned above, the roughening method is not repeated herein. In one embodiment, to form a chip-scale red, green, and blue light emitting device for display or illumination, the fabrication method can optionally coat a first wavelength conversion layer 294 on the light emitting device 300b, as shown in fig. 7G, to convert the light emitted from the light emitting device 300b into a first converted light. Further, a second wavelength conversion layer 296 may be selectively coated on the light emitting device 300c for converting the light emitted from the light emitting device 300c into a second converted light. The light emitting device 300a is not coated with any wavelength conversion material to directly emit blue light from the roughened surface 102a of the light emitting device 300 a. The formation method and material of each conversion layer are as described above, and are not described herein again. Fig. 7H is a top view of the die-level rgb light-emitting device unit according to the embodiment of the invention including the rgb light-emitting device group shown in fig. 7G, wherein the first width S1, the first length S2, the second length d2, the first distance S3, the second distance S4, the second width d1, and the third distance S5 of the rgb light-emitting device unit 37 are as shown in the embodiment shown in fig. 4B and related disclosure, which are not repeated herein, except that the light-emitting stacked layer 101 is not surrounded by the dielectric layer 240a and the opaque layer 290. After forming the first wavelength conversion layer 294 and the second wavelength conversion layer 296, a dicing (dicing) step is directly performed to directly dice the circuit carrier 23 without dicing the light emitting device array 32 to form a plurality of die-level rgb light emitting device units without coating the transparent encapsulant 24 of the previous embodiment. Referring to fig. 7I and 7J, a cross-sectional view and a top view of the die-level light-emitting element unit 37 including a single light-emitting element are shown after the dicing step. The first length S1, the first width S6, the second width d1, the second length d2, the first distance S3 and the second distance S4 of the die-level light-emitting device unit 37 are as described in the embodiment shown in fig. 5B and related disclosure, and are not repeated herein, except that the sidewalls of the light-emitting stack 101, the first metal layer 260 and the second metal layer 262 do not have the dielectric layer 240a and the opaque layer 290; in addition, the transparent encapsulant 24 is not present on the wavelength-converting layer 298.
Referring to fig. 8A, a display module 76 according to an embodiment of the invention includes a plurality of die-level rgb led units 65 on a second circuit carrier 73. For example, any two adjacent die-level rgb light-emitting element units 65 are separated from each other by a space or are disposed seamlessly so as to contact each other. The second circuit carrier 73 includes a circuit 72, and the circuit 72 is electrically connected to the light emitting devices of the rgb light emitting device units 65 for independently controlling the blue, red and green light emitting devices in each rgb light emitting device unit 65. In one embodiment, the display module 76 includes M rows and N columns of die-level rgb led units 65 for a display with X × Y pixel resolution, where M/N is 1/1, 3/2, 4/3 or 16/9, X is a × M, Y is b × N, and a and b are positive integers equal to or greater than 2. The display module 76 includes more than 500 rgb light emitting device units 65 in an inch square area. That is, the display module 76 includes more than 1500 light emitting stacks 101 in a square inch area. In another embodiment, each die-level rgb light-emitting device unit includes a plurality of rgb light-emitting device groups, and each group includes a blue light-emitting device, a red light-emitting device, and a green light-emitting device as described above. A plurality of RGB light emitting element groups are arranged in an I x J array in a die level RGB light emitting element unit, wherein I and J are positive integers, and at least one of I and J is greater than 1. The ratio of I to J is preferably near or equal to 1/1, 3/2, 4/3, or 16/9. In the die-level RGB light-emitting device unit, the distance between two adjacent light-emitting laminated layers from two adjacent RGB light-emitting device groups is substantially equal to the distance between two adjacent light-emitting laminated layers from two adjacent die-level RGB light-emitting device units. The display module 76 includes M rows and N columns of die-level rgb led units 65 for a display with X × Y pixel resolution, where M/N is 1/1, 3/2, 4/3 or 16/9, X is a × M × I, Y is b × N × J, and a and b are positive integers equal to or greater than 2. The display module 76 includes more than 500 rgb light emitting device groups in a square inch area. That is, the display module 76 includes more than 1500 light emitting stacks 101 in a square inch area. Each of the rgb led units and each of the rgb led units can be driven independently by the circuit formed on the circuit carrier 23 and the second circuit carrier 73. The material of the second circuit carrier 73 may be FR-4, BT (bimoleimide-Triazine) resin, ceramic or glass. Fig. 8B is a schematic diagram of an illumination module 78 according to an embodiment of the invention. The lighting module 78 includes a plurality of die-level light emitting element units 66 on a second circuit carrier plate 73. The die-level light emitting element units 66 can be connected in series or in parallel by the circuits on the second circuit carrier 73 depending on the applied driving voltage. In one embodiment, the illumination module 78 is disposed within a light bulb 80 as shown in FIG. 9. The bulb 80 further includes an optical lens 82 covering the illumination module 78, a heat sink 85 having a connection surface and the illumination module 78 being located at the connection surface, a connection 87 connected to the heat sink 85, and an electrical connector 88 connected to the connection 87 and electrically connected to the illumination module 78.
The above-mentioned embodiments are merely illustrative of the technical spirit and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the content of the present invention and to implement the invention, so as not to limit the scope of the present invention, i.e., all equivalent changes or modifications made in the spirit of the present invention should be covered by the scope of the present invention.
Claims (13)
1. A method for manufacturing a light-emitting device comprises the following steps:
providing a first carrier plate which is provided with a plurality of first metal contacts;
providing a substrate;
forming a laminated structure on the substrate, wherein the laminated structure comprises a first conductive layer, an active layer and a second conductive layer;
forming a plurality of first metal layers and a plurality of second metal layers on one side of the laminated structure opposite to the substrate;
forming a plurality of grooves on the substrate to enable the laminated structure to form a first light-emitting laminated layer and a second light-emitting laminated layer which are separated from each other;
forming a light-tight layer in the groove, wherein the height of the light-tight layer is greater than that of the first light-emitting laminated layer and the second light-emitting laminated layer;
forming a first wavelength conversion layer on the first light emitting laminated layer, wherein the first wavelength conversion layer does not cover the side walls of the first light emitting laminated layer and the second light emitting laminated layer and is surrounded by the light-tight layer;
contacting the plurality of first metal layers and the plurality of second metal layers towards the plurality of first metals to connect the first light-emitting laminated structure and the first carrier plate; and
forming a packaging material on the laminated structure,
the light-tight layer surrounds the first light-emitting laminated layer, the second light-emitting laminated layer and the first wavelength conversion layer, and is closer to the first carrier plate than the first light-emitting laminated layer and the second light-emitting laminated layer;
the light-emitting element is provided with a roughened upper surface, the roughened upper surface and the second electrode are positioned on the opposite sides of the active layer, and the roughened upper surface is not covered by sapphire.
2. The method of claim 1, further comprising forming a dielectric layer between the plurality of trenches, the plurality of first metal layers, and the plurality of second metal layers, the dielectric layer being between the opaque layer and the plurality of light emitting stacks.
3. The method of claim 1, wherein the stack structure comprises a third light emitting stack without any wavelength converting material over the third light emitting stack.
4. The method of claim 1, further comprising patterning the plurality of first metal layers to form roughened surfaces on the surfaces of the plurality of first metal layers.
5. The method of claim 1, further comprising removing the substrate to expose a surface of the first conductive layer, further comprising roughening the surface.
6. The method of claim 1, further comprising forming a reflective layer between the stack structure and the first carrier.
7. The method of claim 1, further comprising forming a fill material over the first metal contact.
8. The method according to claim 7, wherein the filling material is conductive, and the stacked structure is electrically connected to the first carrier through the filling material.
9. The method of claim 1, wherein the plurality of first metal contacts extend from a top surface of the first carrier to a bottom surface of the first carrier.
10. The method of claim 1, further comprising providing a second carrier having a plurality of second metal contacts under the first carrier.
11. The method of claim 1, wherein the first and second light emitting stacks are separated from each other by a distance of less than 25 μm.
12. The method of claim 1, wherein the light emitting device has a surface area of less than 0.36 square millimeters (mm)2) The area of (a).
13. The method of claim 1, wherein a ratio of an area of the light emitting device to an area of the first light emitting stack is equal to or greater than 9.
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TW201631800A (en) | 2016-09-01 |
CN108198807A (en) | 2018-06-22 |
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CN104659162A (en) | 2015-05-27 |
CN109585620A (en) | 2019-04-05 |
CN108321272A (en) | 2018-07-24 |
TWI715885B (en) | 2021-01-11 |
TW202218190A (en) | 2022-05-01 |
TWI711190B (en) | 2020-11-21 |
TW201521239A (en) | 2015-06-01 |
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