CN112118688A - Process for increasing layer of back-adhesive copper foil - Google Patents

Process for increasing layer of back-adhesive copper foil Download PDF

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Publication number
CN112118688A
CN112118688A CN201910548162.1A CN201910548162A CN112118688A CN 112118688 A CN112118688 A CN 112118688A CN 201910548162 A CN201910548162 A CN 201910548162A CN 112118688 A CN112118688 A CN 112118688A
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CN
China
Prior art keywords
layer
copper foil
adhesive
copper
circuit board
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910548162.1A
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Chinese (zh)
Inventor
李家铭
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Individual
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Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN201910548162.1A priority Critical patent/CN112118688A/en
Publication of CN112118688A publication Critical patent/CN112118688A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/467Adding a circuit layer by thin film methods

Abstract

The invention provides a layer increasing process of a back-adhesive copper foil, which comprises the following steps: (1) providing a substrate circuit board, wherein the substrate circuit board is provided with an additional layer surface, and the additional layer surface is provided with a first circuit layer; (2) attaching an original coiled back-adhesive copper foil to the surface of the build-up layer in a vacuum film pressing mode, wherein the back-adhesive copper foil is provided with a copper foil layer and an insulating adhesive layer, the insulating adhesive layer is coated on the copper foil layer, and the first circuit layer contacts with the insulating adhesive layer but does not contact with the copper foil layer; (3) electroplating a copper electroplating layer on the copper foil layer; and (4) patterning the copper foil layer and the electroplated copper layer into a second circuit layer. Therefore, the layer increasing efficiency of the circuit board is greatly improved.

Description

Process for increasing layer of back-adhesive copper foil
Technical Field
The present invention relates to a circuit board technology, and more particularly, to a build-up layer technology of a circuit board.
Background
With the popularization of electronic products, the application of circuit substrates is becoming wider and wider, and the circuit design tends to be complicated and multilayered, so in the past, a plurality of polypropylene plates with copper foils formed on one side or two sides are laminated to increase the layers, however, the plate-to-plate laminating and layer increasing mode in the prior art is not easy to manufacture, and has higher cost and needs to be improved.
Disclosure of Invention
In view of the above, the main objective of the present invention is to provide a method for increasing the layer by using a film-attaching method.
In order to achieve the above and other objects, the present invention provides a process for increasing the layer of an adhesive-backed copper foil, which comprises:
(1) providing a substrate circuit board, wherein the substrate circuit board is provided with an additional layer surface, and the additional layer surface is provided with a first circuit layer;
(2) attaching an original coiled back-adhesive copper foil to the surface of the build-up layer in a vacuum film pressing mode, wherein the back-adhesive copper foil is provided with a copper foil layer and an insulating adhesive layer, the insulating adhesive layer is coated on the copper foil layer, and the first circuit layer contacts with the insulating adhesive layer but does not contact with the copper foil layer;
(3) electroplating a copper electroplating layer on the copper foil layer; and
(4) and patterning the copper foil layer and the electroplated copper layer into a second circuit layer.
According to the invention, the copper foil layer and the insulating adhesive layer are formed and rolled in advance, and then the original rolled back adhesive copper foil is attached to the lamination surface in a vacuum film pressing mode to perform lamination, so that the lamination efficiency can be greatly improved, the lamination process is simplified, and the problem of laminating and laminating by using plates in the past is solved.
Other effects and embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 to fig. 2 are schematic diagrams illustrating steps of a build-up process of an adhesive-backed copper foil according to an embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of an adhesive-backed copper foil;
FIG. 4 is a schematic view of a vacuum lamination apparatus;
fig. 5 to 8 are schematic views illustrating steps of a process for increasing the layer of the copper foil with adhesive according to one embodiment of the present invention.
Description of the symbols
10- substrate circuit board 11A, 11B build-up surface
12A, 12B first circuit layer 13 via
14-hole copper 20 adhesive-backed copper foil
21 copper foil layer 22 insulating glue layer
23 protective film 24 copper electroplating layer
25 second circuit layer 30 via
31-hole copper
Detailed Description
The invention discloses a layer increasing process of a back-adhesive copper foil, which can be used for layer increasing operation of a circuit board and solves the problem of laminating and increasing layers of the circuit board by using a plate.
The following describes a process according to one embodiment of the present invention through fig. 1, 2, 5 to 8.
First, as shown in fig. 1, a substrate circuit board 10 is provided, the substrate circuit board 10 has two build-up layers 11A and 11B, and the build- up layers 11A and 11B have first circuit layers 12A and 12B, respectively. In addition, the substrate circuit board 10 has a via hole 13, and a via copper 14 is provided in the via hole 13 to electrically connect the two first circuit layers 12A and 12B.
Next, as shown in fig. 2 and fig. 3, two original rolled-up back-adhesive copper foils 20 are sequentially attached to the respective build- up surfaces 11A and 11B by a vacuum lamination leveling machine in a vacuum lamination manner, please further refer to fig. 4, in which the back-adhesive copper foil 20 has a copper foil layer 21 and an insulating adhesive layer 22, the insulating adhesive layer 22 is coated on the copper foil layer 21, and the first circuit layers 12A and 12B contact the insulating adhesive layer 22 but do not contact the copper foil layer 21. Before the adhesive-backed copper foil 20 is attached, a protective film 23 may be further attached to a surface of the insulating adhesive layer 22 opposite to the copper foil layer 21 to prevent the insulating adhesive layer 22 from being stained or adhered. As shown in fig. 3, the protective film 23 is removed before the adhesive-backed copper foil 20 is attached to the build-up surfaces 11A, 11B, and after the adhesive-backed copper foil 20 is attached to the build-up surfaces 11A, 11B, the insulating adhesive layer 22 may be completely cured, including but not limited to, by thermal curing, thereby forming a permanent connection with the build-up surfaces 11A, 11B.
As shown in fig. 5, in order to electrically connect the circuits of different layers, a via hole 30 may be formed through the two adhesive-backed copper foils 20 and the substrate circuit board 10, and then, as shown in fig. 6, a via hole 31 may be formed in the via hole 30 so that the two copper foil layers 21 are electrically connected to the two first circuit layers 12A and 12B, respectively. In other possible embodiments, the steps shown in fig. 5 and 6 may be omitted if it is not necessary to electrically connect the circuits of different layers.
As shown in fig. 7, an electroplated copper layer 24 is respectively plated on the two copper foil layers 21, and then as shown in fig. 8, the two copper foil layers 21 and the electroplated copper layer 24 are respectively patterned into two second circuit layers 25, and the circuit patterning method can be realized by selecting the conventional method of attaching a photoresist, exposing, developing, alkaline etching, and removing the photoresist.
In the foregoing embodiment, the substrate circuit board is a double-layer board, but in other possible embodiments, the substrate circuit board may also be a single-layer board or other multi-layer boards, for example, the structure shown in fig. 8 may be used as the substrate circuit board, and the copper foil with adhesive layer added according to the present invention is performed again.
In the foregoing embodiment, the procedure of adding layers to the adhesive-backed copper foil is performed simultaneously on both sides of the double-layer board, but in other possible embodiments, the procedure of adding layers to the adhesive-backed copper foil may be performed separately on only one side of the substrate circuit board.
The above-described embodiments and/or implementations are only for illustrating the preferred embodiments and/or implementations of the present technology, and are not intended to limit the implementations of the present technology in any way, and those skilled in the art can make many modifications or changes without departing from the scope of the technology disclosed in the present disclosure, but should be construed as technology or implementations that are substantially the same as the present technology.

Claims (5)

1. A process for increasing the layer of a copper foil with back adhesive is characterized by comprising the following steps:
(1) providing a substrate circuit board, wherein the substrate circuit board is provided with an additional layer surface, and the additional layer surface is provided with a first circuit layer;
(2) attaching an original coiled back-adhesive copper foil to the surface of the build-up layer in a vacuum film pressing mode, wherein the back-adhesive copper foil is provided with a copper foil layer and an insulating adhesive layer, the insulating adhesive layer is coated on the copper foil layer, and the first circuit layer is in contact with the insulating adhesive layer but not in contact with the copper foil layer;
(3) electroplating a copper electroplating layer on the copper foil layer; and
(4) and patterning the copper foil layer and the electroplated copper layer into a second circuit layer.
2. The process of claim 1, further comprising, after the step (2):
(5) a via hole penetrating the copper foil is formed on the copper foil, and a via hole is formed in the via hole to electrically connect the copper foil layer and the first circuit layer.
3. The process of claim 2, wherein step (5) is performed before step (3).
4. The process of claim 1, wherein the copper foil further comprises a protective film attached to a surface of the insulating layer opposite to the copper foil layer, wherein the protective film is removed before the copper foil is attached to the build-up surface.
5. The process of claim 1, wherein after the step (2), the insulating adhesive is further cured completely.
CN201910548162.1A 2019-06-21 2019-06-21 Process for increasing layer of back-adhesive copper foil Pending CN112118688A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910548162.1A CN112118688A (en) 2019-06-21 2019-06-21 Process for increasing layer of back-adhesive copper foil

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910548162.1A CN112118688A (en) 2019-06-21 2019-06-21 Process for increasing layer of back-adhesive copper foil

Publications (1)

Publication Number Publication Date
CN112118688A true CN112118688A (en) 2020-12-22

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910548162.1A Pending CN112118688A (en) 2019-06-21 2019-06-21 Process for increasing layer of back-adhesive copper foil

Country Status (1)

Country Link
CN (1) CN112118688A (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11266080A (en) * 1998-03-16 1999-09-28 Hitachi Aic Inc Manufacture of multilayer printed wiring board
US6119335A (en) * 1997-12-02 2000-09-19 Samsung Electro-Mechanics Co., Ltd. Method for manufacturing multi-layer printed circuit board
KR20040036779A (en) * 2002-10-24 2004-05-03 대덕전자 주식회사 Method of manufacturing capacitor-embedded printed circuit board
CN101080146A (en) * 2006-05-24 2007-11-28 富葵精密组件(深圳)有限公司 A method for making L2 blind hole of high-density interconnection circuit board
CN100493302C (en) * 2004-07-14 2009-05-27 燿华电子股份有限公司 Manufacturing method of modular circuit board
CN101511151A (en) * 2009-03-02 2009-08-19 汕头超声印制板公司 Method for processing blind hole of PCB
CN102700188A (en) * 2012-05-28 2012-10-03 珠海亚泰电子科技有限公司 Heat conducting resin coated copper foil, manufacturing method of heat conducting resin coated copper foil and application of heat conducting resin coated copper foil to aluminum substrate manufacturing process
CN103374307A (en) * 2012-04-28 2013-10-30 富葵精密组件(深圳)有限公司 Gummed copper foil, production method for same, multilayer flexible circuit board and production method for same

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6119335A (en) * 1997-12-02 2000-09-19 Samsung Electro-Mechanics Co., Ltd. Method for manufacturing multi-layer printed circuit board
JPH11266080A (en) * 1998-03-16 1999-09-28 Hitachi Aic Inc Manufacture of multilayer printed wiring board
KR20040036779A (en) * 2002-10-24 2004-05-03 대덕전자 주식회사 Method of manufacturing capacitor-embedded printed circuit board
CN100493302C (en) * 2004-07-14 2009-05-27 燿华电子股份有限公司 Manufacturing method of modular circuit board
CN101080146A (en) * 2006-05-24 2007-11-28 富葵精密组件(深圳)有限公司 A method for making L2 blind hole of high-density interconnection circuit board
CN101511151A (en) * 2009-03-02 2009-08-19 汕头超声印制板公司 Method for processing blind hole of PCB
CN103374307A (en) * 2012-04-28 2013-10-30 富葵精密组件(深圳)有限公司 Gummed copper foil, production method for same, multilayer flexible circuit board and production method for same
CN102700188A (en) * 2012-05-28 2012-10-03 珠海亚泰电子科技有限公司 Heat conducting resin coated copper foil, manufacturing method of heat conducting resin coated copper foil and application of heat conducting resin coated copper foil to aluminum substrate manufacturing process

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
金鸿,陈森编著: "《印制电路技术》", 31 December 2003, 北京:化学工业出版社 *

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Application publication date: 20201222