CN112104330B - Broadband high-gain flatness radio frequency/millimeter wave power amplifier - Google Patents
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/42—Amplifiers with two or more amplifying elements having their dc paths in series with the load, the control electrode of each element being excited by at least part of the input signal, e.g. so-called totem-pole amplifiers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention discloses a broadband high-gain flatness radio frequency/millimeter wave power amplifier, which is of a three-stage architecture and comprises a first stage1 circuit, a second stage2 circuit and an output stage3 circuit which are sequentially connected, wherein the frequency response of the first stage1 circuit is monotonously increased in a band and comprises a transistor M 1 And transistor M 2 A current multiplexing common source stage is formed; the second stage2 circuit comprises a transistor M 3 The common source stage and the output stage3 circuit comprise a transistor M 4 The frequency response of the constructed common source stage, the second stage2 circuit and the output stage3 circuit is in-band monotonically decreasing setting. The invention adopts a multistage tuning technology, increases high-frequency gain through a grid inductance peak technology, has better in-band gain flatness, and avoids gain loss caused by introducing a feedback loop.
Description
Technical Field
The invention belongs to the technical field of radio frequency/millimeter wave integrated circuit design, and particularly relates to a broadband high-gain flatness radio frequency/millimeter wave power amplifier.
Background
The power amplifier is used as a key module in the radio frequency/millimeter wave field, is the module with the largest power consumption in the radio frequency transmitter, and the performance of the power amplifier directly determines the performance of the transmitter. The theoretical peak transmission rate of the fifth generation mobile communication network (5G) can reach 10Gbs per second, which is hundreds of times faster than that of the fourth generation mobile communication network (4G), and the novel signal modulation mode is required, and the carrier bandwidth is also required to be higher. Second, the in-band gain flatness of the transmitter is critical to reduce Inter-symbol interference (Inter-Symbol Interference, ISI) and to reduce bit error rate.
There are several design methods for broadband high gain flatness power amplifiers. One is a transformer coupled resonance mode, and the other is a multi-stage tuning mode. The prior art transformer coupling structure is shown in fig. 1 a. Broadband matching is achieved using two resonant peaks of the transformer, but this results in poor gain flatness as bandwidth increases. Another proposed multi-level tuning structure is known as shown in fig. 1 b. By employing feedback techniques, while bandwidth is increased and gain flatness is improved, gain attenuation results, making its Power Added Efficiency (PAE) lower.
With the advent of fifth generation mobile communication, designing a power amplifier with broadband and high gain flatness has important engineering application value. Conventional methods for achieving high gain flatness have many problems, such as low gain flatness, complex design, and reduced gain.
Disclosure of Invention
The invention aims to solve the technical problem of providing a broadband high-gain flatness radio frequency/millimeter wave power amplifier aiming at the defects in the prior art, and the multistage tuning technology is applied to the design of the millimeter wave power amplifier to realize very ideal gain flatness.
The invention adopts the following technical scheme:
the power amplifier is a three-stage architecture and comprises a first stage1 circuit, a second stage2 circuit and an output stage3 circuit which are sequentially connected, wherein the frequency response of the first stage1 circuit is in-band monotonically increasing arrangement and comprises a transistor M 1 And transistor M 2 A current multiplexing common source stage is formed; the second stage2 circuit comprises a transistor M 3 The common source stage and the output stage3 circuit comprise a transistor M 4 The frequency response of the constructed common source stage, the second stage2 circuit and the output stage3 circuit is in-band monotonically decreasing setting.
Specifically, the first stage1 circuit specifically includes:
transistor M 1 Is grounded; transistor M 1 The grid electrode of (C) is divided into two paths, one path is connected with the inductor L 1 And capacitor C 1 Followed by an input signal RF in The method comprises the steps of carrying out a first treatment on the surface of the Another path is through transistor M 1 Is set to be a bias resistor R B1 Connected with bias voltage V B1 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 1 Drain electrode of (2)Two paths, one path passing through capacitor C 2 Then split into two paths, one path is led to the inductor L 3 Connected to transistor M 2 Gate of the other pass transistor M 2 Is set to be a bias resistor R B Connect V DD The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 1 Second path inductance L of drain electrode 2 Then divided into two paths, one path is virtually grounded through capacitor C 3 Grounding; another path is connected with transistor M 2 Is connected with the source stage of the (a); transistor M 2 The drain electrode of (2) is divided into two paths, one path is connected with the inductor L 4 Rear joint V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 4 Transistor M in post and second stage circuit 3 Is connected to the gate of the transistor.
Further, inductance L 3 Transistor M 2 Original pole of source contribution 2 Splitting into two high frequency conjugated poles pole 2 ' and pole 2 "C"; and inductance L 3 And capacitor C 2 The resonance can provide a high frequency gain spike.
Specifically, the second stage2 circuit specifically includes:
transistor M 3 The grid electrode of (C) is divided into two paths, one path is connected with the capacitor C 4 Transistor M in a common source stage multiplexed with current 2 The other path is connected with the drain electrode of the second stage through the bias resistor R B2 Connected with bias voltage V B2 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 3 Is grounded; transistor M 3 The drain electrode of (2) is divided into two paths, one path is an inductor L 5 Connect V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 5 And inductance L 6 Post and output stage circuit transistor M 4 Gate connection, inductance L 5 。
Specifically, the output stage3 circuit specifically includes:
transistor M 4 The grid electrode of (C) is divided into two paths, one path is connected with the inductor L 6 And capacitor C 5 Post AND transistor M 3 Is connected with the drain electrode of the output stage, and the other path is connected with the bias resistor R of the output stage B3 Connected with bias voltage V B3 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 4 Is grounded; transistor M 4 The drain electrode of (2) is divided into two paths, one path is connected with the inductor L 7 Connect V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 6 Then split into two paths, one path is led to the inductor L 8 Grounded, another path is used for outputting RF out 。
Compared with the prior art, the invention has at least the following beneficial effects:
the broadband high-gain flatness radio frequency/millimeter wave power amplifier can realize good gain flatness in a band, can improve system stability, and can reduce intersymbol interference (Inter-Symbol Interference, ISI) and reduce error rate.
Further, by using inductance L 3 Pole of original pole 2 (M 2 Source contribution) into two high frequency conjugated poles pole 2 ' and pole 2 "and inductance L 3 And capacitor C 2 The resonance provides a high frequency gain spike. The frequency response of the first stage is monotonously increased in the band, and the frequency response of the later stage is counteracted.
Further, inductance L is adopted 3 Pole of original pole 2 (M 2 Source contribution) into two high frequency conjugate poles pole2' and pole2 "such that the gain curve begins to drop at higher frequencies, improving the high frequency gain in the operating band.
Furthermore, the second stage is a gain stage, the input impedance of the gain stage is matched with the optimal output impedance of the first stage, the output of the gain stage is matched with the input impedance of the third stage3, the gain of the whole amplifier is increased, and the PAE is improved.
Further, the third stage is a power stage, and the maximum power transmission is realized by adopting a load transfer (load pull) technology.
In summary, the invention adopts a multistage tuning technology, improves the high-frequency gain through a gate inductance peak technology, realizes good in-band gain flatness, and avoids gain loss caused by introducing a feedback loop due to the fact that a feedback technology is not used.
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Drawings
FIG. 1 is a diagram of a prior art technique for achieving high gain flatness, wherein (a) is an in-band gain flatness circuit achieved using two resonant peaks of a transformer, and (b) is an in-band high gain flatness circuit achieved using a feedback technique;
FIG. 2 is a diagram of a multi-stage tuned power amplifier architecture;
FIG. 3 is a circuit diagram of a broadband high gain flatness amplifier;
FIG. 4 shows the presence or absence of L 3 ,C 2 A frequency response diagram of the first stage;
FIG. 5 is an S-parameter diagram;
fig. 6 is a graph of output power and Power Added Efficiency (PAE) versus frequency.
Detailed Description
Referring to fig. 2, the invention provides a wideband high gain flatness radio frequency/millimeter wave power amplifier, which comprises a first stage1 circuit, an output stage3 circuit and a second stage2 circuit, wherein the frequency response of the output stage3 circuit and the second stage2 circuit is designed to be monotonically decreased in band, and the frequency response of the first stage1 circuit is designed to be monotonically increased in band to compensate gain fluctuation of the second stage and the output stage; by this multi-tuning approach, a very flat gain curve can be obtained in-band.
Referring to fig. 3, the wideband high-gain flatness radio frequency/millimeter wave power amplifier of the present invention includes an output stage circuit, a first stage circuit and a second stage circuit, wherein the first stage circuit is connected with the output stage circuit through the second stage circuit;
the first stage1 circuit comprises a transistor M 1 And transistor M 2 The current multiplexing common source stage is formed by adopting an inductor L 3 Pole of original pole 2 (M 2 Source contribution) into two high frequency conjugated poles pole 2 ' and pole 2 "and inductance L 3 And capacitor C 2 The resonance provides a high frequency gain spike. The frequency response of the first stage is monotonously increased in the band, and the frequency response of the later stage is counteracted;
the second stage2 circuit comprises a transistor M 3 The common source stage is used for driving the third stage and increasing the overall power gain;
the output stage3 circuit comprises a transistor M 4 Constituted common source stage by load pullThe technique achieves maximum power transfer.
In the current multiplexing common source stage, transistor M 1 Source of (2) is grounded, transistor M 1 The grid electrode of (C) is divided into two paths, one path is connected with the inductor L 1 And capacitor C 1 Followed by an input signal RF in Capacitance C 1 And inductance L 1 An input matching network for the first stage; another path is through transistor M 1 Is set to be a bias resistor R B1 Connected with bias voltage V B1 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 1 The drain electrode of (2) is divided into two paths, one path is connected with the capacitor C 2 Then split into two paths, one path is led to the inductor L 3 Connected to transistor M 2 Gate of the other pass transistor M 2 Is set to be a bias resistor R B Connect V DD The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 1 Second path inductance L of drain electrode 2 Then divided into two paths, one path is virtually grounded through capacitor C 3 Grounded, the other path is connected with the transistor M 2 Is connected with the source stage of the (a); transistor M 2 The drain electrode of (2) is divided into two paths, one path is connected with the inductor L 4 Is connected with a power supply V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 4 Transistor M in post and second stage circuit 3 Is connected to the gate of the transistor.
Wherein the inductance L 4 Capacitance C 4 For interstage matching of the first stage and the second stage, the inductance L 2 Large enough to exhibit high resistance characteristics in-band.
Inductance L 3 And capacitor C 2 Resonance exhibits low resistance at high frequencies such that the signal goes from L 3 ，C 2 Feed M 2 Instead of the source, the signal is secondarily amplified at high frequencies.
To compensate for gain fluctuations of the latter two stages, an inductance L is used 3 Pole of original pole 2 (transistor M 2 Source contribution) into two high frequency conjugated poles pole 2 ' and pole 2 "and inductance L 3 And capacitor C 2 The resonance provides a high frequency gain spike.
Transistor M 3 In the constituted common source stage, the transistor M 3 The grid electrode of (C) is divided into two paths, one path is connected with the capacitor C 4 Transistor M in a common source stage multiplexed with current 2 The other path is connected with the drain electrode of the second stage through the bias resistor R B2 Connected with bias voltage V B2 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 3 Is grounded; transistor M 3 The drain electrode of (2) is divided into two paths, one path is an inductor L 5 Connected with power supply V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 5 And inductance L 6 Post and output stage circuit transistor M 4 Gate connection, inductance L 5 Capacitance C 5 Inductance L 6 An inter-stage matching network for the second stage and the output stage.
Transistor M 4 In the constituted common source stage, the transistor M 4 The grid electrode of (C) is divided into two paths, one path is connected with the inductor L 6 And capacitor C 5 Post AND transistor M 3 Is connected with the drain electrode of the output stage, and the other path is connected with the bias resistor R of the output stage B3 Connected with bias voltage V B3 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 4 Is grounded; transistor M 4 The drain electrode of (2) is divided into two paths, one path is connected with the inductor L 7 Connected with power supply V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 6 Then split into two paths, one path is led to the inductor L 8 Grounded, another path is used for outputting RF out Inductance L 7 Capacitance C 6 Inductance L 8 A maximum output power matching network obtained after load pull (load pull).
Preferably, the power supply V DD Is 1.2V.
The working process of the broadband high-gain flatness radio frequency/millimeter wave power amplifier is as follows:
the whole amplifier works in class AB, and the power signal at the input end is C 1 ,L 1 Good input matching is formed, transmitting the vast majority to M 1 Through M 1 Drain output flow direction C 2 ,L 3 A low-resistance path formed so that the high-frequency signal passes through M 2 The tube is amplified again, and the gain of high frequency is improved; and from M 2 Is out of the drain terminal due to L 4 ,C 4 Good inter-stage impedance matching with the next stage, the power signal is driven by M with very little loss 3 A gain stage formed; and from M 3 Flows out from the drain end of (C) and then passes through L 5 ,C 5 ,L 6 Good inter-stage matching, by M 3 The generated power signal drives the power stage with minimal lossM 4 Output matching network L obtained by load pull technology 7 ,C 6 ,L 8 The maximum output power is obtained. The output power of the whole amplifier is determined by the output stage, the first two stages are only to improve the power gain, compensate the gain flatness and drive the power stage.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to FIG. 4, the inductance L is shown 3 And capacitor C 2 The frequency response of the first stage is shown in FIG. 4 by increasing the inductance L 3 And capacitor C 2 The high frequency gain can be effectively improved.
Referring to fig. 5, in-band gain (S 21 ) 36.83 + -0.22 dB, input/output return loss (S 11 ,S 22 ) Are all less than-10 dB.
Referring to fig. 6, the relationship between the output power of the power amplifier, the Power Added Efficiency (PAE) and the frequency is shown. As can be seen from fig. six, the saturated output power of the power amplifier is greater than 15dBm, and the Power Added Efficiency (PAE) is greater than 20%. In summary, the power amplifier designed by the technology of the invention can realize good performance.
In summary, the invention provides a broadband high-gain flatness radio frequency/millimeter wave power amplifier, which can be used for designing a radio frequency/millimeter wave frequency band power amplifier, has simple design, has better in-band gain flatness, and avoids gain loss caused by introducing a feedback loop.
The above is only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited by this, and any modification made on the basis of the technical scheme according to the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (3)
1. The broadband high-gain flatness radio frequency/millimeter wave power amplifier is characterized in that the power amplifier is of a three-stage architecture and comprises a first stage1 circuit, a second stage2 circuit and an output stage3 circuit which are sequentially connected, wherein the frequency response of the first stage1 circuit is in-band monotonically increasing setting, and the current multiplexing common source stage formed by a transistor M1 and a transistor M2 is included; the second stage2 circuit comprises a common source stage formed by a transistor M3, the output stage3 circuit comprises a common source stage formed by a transistor M4, and the frequency response of the second stage2 circuit and the output stage3 circuit is in-band monotonically decreasing setting;
the first stage1 circuit specifically comprises:
transistor M 1 Is grounded; transistor M 1 The grid electrode of (C) is divided into two paths, one path is connected with the inductor L 1 And capacitor C 1 Followed by an input signal RF in The method comprises the steps of carrying out a first treatment on the surface of the Another path is through transistor M 1 Is set to be a bias resistor R B1 Connected with bias voltage V B1 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 1 The drain electrode of (2) is divided into two paths, one path is connected with the capacitor C 2 Then split into two paths, one path is led to the inductor L 3 Connected to transistor M 2 Gate of the other pass transistor M 2 Is set to be a bias resistor R B Connect V DD The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 1 Second path inductance L of drain electrode 2 Then divided into two paths, one path is virtually grounded through capacitor C 3 Grounding; another path is connected with transistor M 2 Is connected with the source stage of the (a); transistor M 2 The drain electrode of (2) is divided into two paths, one path is connected with the inductor L 4 Rear joint V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 4 Transistor M in post and second stage circuit 3 Gate connection of (C)Inductance L 3 Transistor M 2 Original pole of source contribution 2 Splitting into two high frequency conjugated poles pole 2 ΄ and pole 2 ΄ ΄; and inductance L 3 And capacitor C 2 The resonance can provide a high frequency gain spike.
2. The wideband high gain flatness radio frequency/millimeter wave power amplifier of claim 1, wherein the second stage2 circuit is specifically:
transistor M 3 The grid electrode of (C) is divided into two paths, one path is connected with the capacitor C 4 Transistor M in current multiplexing common source stage 2 The other path is connected with the drain electrode of the second stage through the bias resistor R B2 Connected with bias voltage V B2 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 3 Is grounded; transistor M 3 The drain electrode of (2) is divided into two paths, one path is an inductor L 5 Connect V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 5 And inductance L 6 Post and output stage circuit transistor M 4 Is connected to the gate of the transistor.
3. The wideband high gain flatness radio frequency/millimeter wave power amplifier of claim 1, wherein the output stage3 circuit is specifically:
transistor M 4 The grid electrode of (C) is divided into two paths, one path is connected with the inductor L 6 And capacitor C 5 Post AND transistor M 3 Is connected with the drain electrode of the output stage, and the other path is connected with the bias resistor R of the output stage B3 Connected with bias voltage V B3 The method comprises the steps of carrying out a first treatment on the surface of the Transistor M 4 Is grounded; transistor M 4 The drain electrode of (2) is divided into two paths, one path is connected with the inductor L 7 Connect V DD The method comprises the steps of carrying out a first treatment on the surface of the The other path is through capacitor C 6 Then split into two paths, one path is led to the inductor L 8 Grounded, another path is used for outputting RF out 。
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332867A (en) * | 2011-07-22 | 2012-01-25 | 复旦大学 | Low-noise amplifier with single-end circuit compensation structure |
| CN108322191A (en) * | 2018-02-06 | 2018-07-24 | 广州慧智微电子有限公司 | A kind of multiband low-noise amplifier and amplification method |
| CN108923753A (en) * | 2018-06-07 | 2018-11-30 | 天津大学 | The bandwidth expansion circuit of cascade trans-impedance amplifier based on CMOS technology |
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| US8614604B2 (en) * | 2011-12-06 | 2013-12-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Amplifier inductor sharing for inductive peaking |
| US8803609B2 (en) * | 2012-05-10 | 2014-08-12 | Fujitsu Limited | Bandwidth extension of an amplifier |
| AU2014262130A1 (en) * | 2013-05-02 | 2015-12-03 | Commonwealth Scientific And Industrial Research Organisation | Low noise amplifier method and apparatus |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332867A (en) * | 2011-07-22 | 2012-01-25 | 复旦大学 | Low-noise amplifier with single-end circuit compensation structure |
| CN108322191A (en) * | 2018-02-06 | 2018-07-24 | 广州慧智微电子有限公司 | A kind of multiband low-noise amplifier and amplification method |
| CN108923753A (en) * | 2018-06-07 | 2018-11-30 | 天津大学 | The bandwidth expansion circuit of cascade trans-impedance amplifier based on CMOS technology |
Non-Patent Citations (2)
| Title |
|---|
| 0.13微米CMOS双通道超宽带低噪声放大器设计;张弘;梁元;;微电子学与计算机(第10期);全文 * |
| 0.65V 3mW CMOS低噪声放大器设计;殷蔚;;现代电子技术(第15期);全文 * |
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