CN111952354A - Semiconductor device with a plurality of transistors - Google Patents
Semiconductor device with a plurality of transistors Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 86
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Abstract
The invention relates to the technical field of microelectronics and discloses a semiconductor device. Comprises a substrate; an epitaxial layer disposed on the substrate; the barrier layer is arranged on one side, far away from the substrate, of the epitaxial layer; the first electrode and the second electrode are arranged at two opposite ends of one side, far away from the epitaxial layer, of the barrier layer; the first electrode comprises a grid structure and a floating electrode structure; the grid structure is contacted with the barrier layer; the floating electrode structure is positioned between the grid structure and the second electrode and is contacted with the grid structure, and the grid structure also extends to be contacted with the second electrode along one side of the floating electrode structure, which is far away from the barrier layer. The potential at the edge of the grid electrode of the semiconductor device can be clamped at a lower potential level by utilizing the floating electrode structure in the first electrode, so that the high potential at the edge of the grid electrode of the semiconductor device is avoided, the channel length of the device enhanced insulation gate repairing structure is reduced, the forward characteristic of the device is improved, and meanwhile, the short channel effect of the semiconductor device is restrained.
Description
Technical Field
The present invention relates to the field of microelectronic technologies, and in particular, to a semiconductor device.
Background
Key indicators in evaluating the performance of rectifiers include the turn-on voltage and the reverse withstand voltage capability. However, the turn-on voltage of the conventional GaN heterojunction schottky diode is large due to the metal-semiconductor contact barrier between the schottky metal and the GaN semiconductor, and the large turn-on voltage increases the loss of the device in the forward operation. Meanwhile, under the influence of metal-semiconductor contact between the schottky metal and the GaN semiconductor, the voltage endurance and leakage characteristics of the device are not ideal. The forward characteristics of the gallium nitride heterojunction rectifier can be improved by reducing the channel length of the device enhanced insulated gate structure, but the reduction of the channel length of the device enhanced insulated gate structure can cause serious short channel effect, so that the voltage resistance of the device is seriously reduced. Therefore, the existing gan heterojunction rectifier still cannot have the performances of low forward voltage, low on-state power consumption and high reverse voltage resistance at the same time.
Disclosure of Invention
Accordingly, there is a need to provide a semiconductor device that can not provide the performance of low forward voltage, low on-state power consumption and high reverse voltage resistance at the same time for the conventional gan heterojunction rectifier.
A semiconductor device includes a substrate; an epitaxial layer disposed on the substrate; a barrier layer disposed on a side of the epitaxial layer remote from the substrate; the first electrode and the second electrode are arranged at two opposite ends of one side, far away from the epitaxial layer, of the barrier layer; the first electrode comprises a grid structure and a floating electrode structure; the gate structure is in contact with the barrier layer; the floating electrode structure is located between the grid structure and the second electrode and is in contact with the grid structure, and the grid structure further extends to be in contact with the second electrode along one side, away from the barrier layer, of the floating electrode structure.
The semiconductor device is a two-terminal device provided with a first electrode and a second electrode, wherein the first electrode is a mixed anode structure comprising a grid structure and a floating electrode structure. The potential of the grid edge of the semiconductor device can be clamped at a lower potential level by utilizing the floating electrode structure in the first electrode, so that the high potential at the grid edge of the semiconductor device is avoided, the thickness of a potential barrier of a grid region of the semiconductor device is prevented from being reduced, and the height of the potential barrier is prevented from being lowered. Therefore, the short channel effect of the semiconductor device can be inhibited while the channel length of the device enhanced insulated gate structure is reduced to improve the forward characteristic of the device, so that the semiconductor device is ensured to have low forward starting voltage, low conduction power consumption and high withstand voltage.
In one embodiment, the barrier layer comprises a first groove and a second groove which are formed by etching on one side of the barrier layer away from the epitaxial layer; the grid structure comprises a grid metal layer and an insulated grid dielectric layer; the insulating gate dielectric layer is partially formed in the first groove, covers the bottom of the first groove and extends to be in contact with the second electrode along one side, far away from the barrier layer, of the floating electrode structure; part of the grid metal layer is formed in the first groove and covers the insulated grid dielectric layer at the bottom of the first groove; part of the floating electrode structure is formed in the second groove and is in contact with the bottom of the second groove to form Schottky contact.
In one embodiment, the first electrode further comprises a first ohmic contact structure and a field plate structure, wherein a portion of the first ohmic contact structure is in contact with the barrier layer to form a first ohmic contact electrode; the first ohmic contact structure is also in contact with the gate structure; the field plate structure is positioned on the surface of the insulated gate dielectric layer above the floating electrode structure, and the position of the field plate structure is opposite to that of the floating electrode structure.
In one embodiment, the second electrode comprises a second ohmic contact structure, and part of the second ohmic contact structure is in contact with the barrier layer to form a second ohmic contact electrode; the second ohmic contact structure and the first ohmic contact structure are axially symmetrically distributed by a central axis perpendicular to the surface of the substrate.
In one embodiment, the epitaxial layer and the barrier layer form a heterojunction, and a two-dimensional electron gas is formed at the interface of the epitaxial layer and the barrier layer.
In one embodiment, the material of the epitaxial layer comprises GaN.
In one embodiment, the barrier layer comprises AlGaN or a group iii nitride.
In one embodiment, the material of the insulated gate dielectric comprises SiO2、Si3N4、AlN、Al2O3、MgO、Sc2O3At least one of (1).
In one embodiment, the semiconductor device further comprises a passivation layer disposed on a side of the barrier layer away from the epitaxial layer and between the first electrode and the second electrode.
In one embodiment, the semiconductor device includes a lateral field controlled rectifier.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a semiconductor device according to an embodiment of the present invention;
fig. 2 is a channel potential distribution diagram of a semiconductor device having a floating electrode structure according to an embodiment of the present invention;
fig. 3 is a current-voltage characteristic diagram of a semiconductor device having a floating electrode structure according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a semiconductor device according to another embodiment of the present invention.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, a first resistance may be referred to as a second resistance, and similarly, a second resistance may be referred to as a first resistance, without departing from the scope of the present application. The first resistance and the second resistance are both resistances, but they are not the same resistance.
It is to be understood that "connection" in the following embodiments is to be understood as "electrical connection", "communication connection", and the like if the connected circuits, modules, units, and the like have communication of electrical signals or data with each other.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
In recent years, due to advances in processes and materials, rectifying devices made of gallium nitride heterojunction-based materials have made great progress, making them extremely important in the field of semiconductor technology. For the rectifier, the turn-on voltage and the reverse withstand voltage are key indicators. However, the turn-on voltage of the conventional GaN heterojunction schottky diode is large due to the metal-semiconductor contact barrier between the schottky metal and the GaN semiconductor, but the large turn-on voltage increases the loss of the device in forward operation. Meanwhile, the schottky metal-semiconductor contact between the schottky metal and the GaN semiconductor affects the device, and the voltage endurance and leakage characteristics of the device are not ideal enough. Various techniques have been proposed to achieve low turn-on voltage and high withstand voltage of gan heterojunction rectifiers, such as gan lateral field-controlled rectifiers.
Compared with a gallium nitride Schottky diode, the anode structure of the gallium nitride transverse field control rectifier is formed by short-circuiting an ohmic contact electrode and an enhanced insulated gate structure instead of the traditional Schottky structure. The conventional gan heterojunction schottky diode generally has a large turn-on voltage and a large turn-on voltage due to the influence of a schottky contact barrier and an AlGaN barrier layer between the schottky metal and the gan semiconductor. The turn-on voltage of the GaN transverse field-controlled rectifier is mainly determined by the threshold voltage of the enhanced insulated gate structure, so that the turn-on voltage of the device can be very low. At present, the turn-on voltage of the gallium nitride transverse field control rectifier can be reduced to about 0.3V, and the turn-on voltage of the traditional gallium nitride heterojunction Schottky diode is generally larger than 1V. However, while the gan lateral field-controlled rectifier has many advantages, it also has some problems, the most important one is the short channel effect.
Those skilled in the art will typically reduce the channel length of the device enhancement mode insulated gate structure to improve the gallium nitride lateral directionThe forward characteristic of the field controlled rectifier. However, the reduction of the channel length of the enhancement type insulated gate structure of the device can cause serious short channel effect, and the short channel effect is mainly reflected in that the withstand voltage of the device can be seriously reduced. For example, when the length of the enhanced insulated gate of the GaN transverse field control rectifier is reduced from 2 microns to 0.25 microns, the forward current of the device is increased from 400mA/mm to 700mA/mm, the forward current is increased by 75%, and the turn-on voltage of the device is also reduced from 0.53V to 0.29V. But the reduction of the length of the insulated gate of the gan lateral field-controlled rectifier also leads to the increase of the reverse leakage of the device. When the length of the enhanced insulated gate of the GaN transverse field control rectifier is reduced from 2 microns to 0.25 micron, the reverse leakage of the device is reduced from 10-4mA/mm is increased to 102mA/mm, at which point the device has failed to block the reverse voltage.
The invention provides a semiconductor device which can inhibit a short channel effect existing in a conventional gallium nitride transverse field control rectifier while maintaining and improving forward characteristics. Fig. 1 is a schematic structural diagram of a semiconductor device according to an embodiment of the present invention, which includes a substrate 100, an epitaxial layer 200, a barrier layer 300, a first electrode 400, and a second electrode 500. The epitaxial layer 200 is disposed on the substrate 100. The material of the substrate 100 includes, but is not limited to, silicon carbide, sapphire, diamond, GaN, or the like. The barrier layer 300 is disposed on a layer of the epitaxial layer 200 away from the substrate 100.
The first electrode 400 and the second electrode 500 are respectively disposed at two opposite ends of the barrier layer 300 away from the epitaxial layer 200. The first electrode 400 includes a gate structure 410 and a floating electrode structure 420. The gate structure 410 is formed on the barrier layer 300 and contacts the barrier layer 300, the floating electrode structure 420 is located on a side of the gate structure 410 close to the second electrode 500, and the floating electrode structure 420 contacts the gate structure 410. The gate structure 410 further extends to the surface of the floating electrode structure 420 along the side of the floating electrode structure 420 contacting the gate structure 410, and the gate structure 410 further extends to contact the second electrode 500 along the surface of the floating electrode structure 420.
In the semiconductor device provided by the present invention, the first electrode 400 is an anode of the semiconductor device, and the second electrode 500 is a cathode of the semiconductor device. By introducing a floating clamping electrode embedded in the barrier layer at the edge of the gate of the mixed anode end of the semiconductor device, when the semiconductor device is in an off state, the floating electrode structure 420 is utilized to clamp the potential at the edge of the gate of the anode end of the semiconductor device at a lower potential level, so that the high voltage is prevented from appearing at the edge of the gate of the drain end of the device, the potential barrier in the gate region is prevented from being pulled down, and the short channel effect of the device is suppressed. Fig. 2 is a channel potential distribution diagram of a semiconductor device having a floating electrode according to an embodiment of the present invention, and as can be seen from fig. 2, the potential at the edge of a gate can be clamped at a lower potential level after the floating electrode structure is added to the semiconductor device. When the semiconductor device is in an on state, the floating electrode structure 420 is charged through the enhanced insulated gate structure 410, so that the concentration of two-dimensional electron gas below the floating electrode structure 420 is increased, and the current of the device is prevented from being reduced. Fig. 3 is a current-voltage characteristic diagram of a semiconductor device having a floating electrode structure according to an embodiment of the present invention, and as shown in fig. 3, the floating electrode structure does not cause degradation of the forward characteristics of the device while the short channel effect of the semiconductor device is generated.
Fig. 4 is a schematic structural diagram of a semiconductor device according to another embodiment of the present invention, in which in one embodiment, a first groove and a second groove are formed on the side of the barrier layer 300 away from the epitaxial layer 200 by etching. The gate structure 410 includes a gate metal layer 411 and an insulated gate dielectric layer 412. The insulated gate dielectric layer 412 is formed in the first groove, covers the bottom of the first groove, and contacts one side of the floating electrode structure 420. The insulated gate dielectric layer 412 contacts the epitaxial layer 200 to form a schottky contact. The insulated gate dielectric layer 412 also extends to the upper surface of the floating electrode structure 420 along the side of the floating electrode structure 420 contacting the insulated gate dielectric layer 412 and extends to contact the second electrode 500 along the upper surface of the floating electrode structure 420. A portion of the gate metal layer 411 is formed in the first groove and covers the insulated gate dielectric layer 412 at the bottom of the first groove. Part of the floating electrode structure 420 is formed in the second groove and contacts with the bottom of the second groove to form a schottky contact. Schottky contact is a process in which when a metal is brought into contact with a semiconductor material, the energy band of the semiconductor is bent at the interface to form a schottky barrier, which has a large amount of interface charges and thus causes a large interface resistance. The schottky barrier has a nonlinear impedance characteristic, i.e., a rectifying characteristic, similar to a PN junction, which is a region having a rectifying action formed on a metal-semiconductor boundary, and the semiconductor device is made to have a rectifying action by forming a schottky contact.
In one embodiment, the first electrode 400 further includes a first ohmic contact structure 430 and a field plate structure 440. A portion of the first ohmic contact structure 430 is in contact with the barrier layer 300 to form a first ohmic contact electrode, and the first ohmic contact structure 430 is also in contact with the gate structure 410. The field plate structure is located on the surface of the insulated gate dielectric layer 412 above the floating electrode structure 420, and the position of the field plate structure 440 is opposite to the position of the floating electrode structure 420.
Ohmic contact means that when a metal is in contact with a semiconductor material, the resistance of the contact surface is much lower than the resistance of the semiconductor itself, so that most of the voltage drops in the active region but not at the contact surface when the device is in operation. In order for the device to operate at high frequencies, the on-resistance must be as low as possible. In a high frequency device, the magnitude of the on-resistance is mainly determined by the contact resistance, and therefore, in order to obtain a low on-resistance, it is necessary to ensure that the semiconductor device can operate under high frequency conditions by ohmic contact. In addition, the most common problem in power semiconductor devices is that there is usually a curved surface at the PN junction, where the device is prone to breakdown due to the larger electric field at the curved junction. Therefore, in order to improve the breakdown voltage of the device, the electric field distribution of the device on the surface or the interface can be adjusted and controlled by changing the appearance of the edge surface of the device or finely adjusting the structure of the device. Fine tuning of the device structure can be achieved by adding a field plate structure 440, the field plate structure 440 being disposed on the gate structure 410. The breakdown voltage is generally referred to as the reverse breakdown voltage of the device, and electrons can be pushed away from the surface and the depletion region can be spread out by providing the negative voltage required by the field plate structure 440 with a reverse bias voltage on the P region. When the depletion region is expanded, the curved surface radius of the boundary of the depletion region can be increased, the boundary electric field is reduced, and the breakdown resistance of the depletion region is further improved.
In one embodiment, the second electrode 500 includes a second ohmic contact structure 510, and a portion of the second ohmic contact structure 510 is in contact with the barrier layer to form a second ohmic contact electrode. The second ohmic contact structures 510 and the first ohmic contact structures 430 are axially symmetrically distributed about a central axis perpendicular to the surface of the substrate.
In one embodiment, the epitaxial layer 200 forms a heterojunction with the barrier layer 300. The heterojunction of a semiconductor is a special PN junction and is formed by sequentially depositing two or more different semiconductor material films on the same substrate, wherein the materials respectively have different energy band gaps. The response parameters of the current and the voltage of the diode can be changed by adjusting the thickness and the energy band gap of each material layer of the semiconductor in production. Semiconductor heterostructures have a significant impact on semiconductor technology and are a key component of high frequency transistors and optoelectronic devices. In the present embodiment, the buffer layer 200 and the barrier layer 300 form a heterojunction, and the response parameters of the current and voltage of the semiconductor device can be changed by adjusting the thicknesses and the energy band gaps of the buffer layer 200 and the barrier layer 300 when designing the performance of the semiconductor device.
In addition, a two-dimensional electron gas 600 is formed at the boundary between the epitaxial layer 200 and the barrier layer 300, and since the materials of the epitaxial layer 200 and the barrier layer 300 are two III-nitride semiconductor materials with different lattice constants, a large stress occurs between the epitaxial layer 200 and the barrier layer 300 due to lattice mismatch, thereby causing the generation of a piezoelectric polarization effect. The stronger polarizing electric field changes the band structure of the group III nitride semiconductor heterojunction (e.g., AlGaN/GaN heterojunction), and causes a high concentration of electrons to be bound in the quantum well at the GaN side at the heterojunction interface, which is the two-dimensional electron gas 600. The concentration of the two-dimensional electron gas 600 can be adjusted by changing the depth of the groove, and the deeper the groove in contact with the schottky contact structure is, the lower the concentration of the two-dimensional electron gas therebelow is, and the current of the semiconductor device can reach a saturation state at a lower voltage.
In one embodiment, the material of the epitaxial layer 200 includes, but is not limited to, GaN. Gallium nitride (GaN) is a wide bandgap semiconductor, has the advantages of high breakdown field strength, high electron mobility, high saturated electron drift velocity, large thermal conductivity, small dielectric constant, strong radiation resistance, good chemical stability and the like, and is an ideal semiconductor material in the application occasions of high voltage, high frequency, high temperature, high power density and the like. The GaN power electronic device has the outstanding advantages of wide band gap, high electronic saturation drift velocity, high thermal conductivity, high critical breakdown electric field and the like, greatly improves the voltage withstanding capacity, the working frequency and the current density of the GaN power electronic device, greatly reduces the conduction loss of the device, and enables the device to work under severe conditions of high power, high temperature and the like. The wide-bandgap semiconductor power electronic device has very wide military and civil values, such as the field of power electronic systems of military equipment such as tanks, naval vessels, airplanes and cannons, and the like, and civil power electronic equipment, household appliances, train traction equipment and high-voltage direct-current transmission equipment, and is also applied to systems such as PCs, hybrid vehicles, electric automobiles, solar power generation and the like. Among these new power electronic systems, GaN power electronic devices are one of the most core key technologies, which can greatly reduce the consumption of electrical energy, and thus are also known as "green energy" devices that drive "new energy revolution".
In one embodiment, the epitaxial layer 200 may also be composed of a combination of AlGaN, AlN, and GaN layers, with the uppermost layer being a GaN layer.
In one embodiment, the barrier layer 300 may be gallium aluminum nitride (AlGaN) or other non-GaN group III nitrides.
In one embodiment, the material of the insulated gate dielectric comprises SiO2、Si3N4、AlN、Al2O3、MgO、Sc2O3At least one of (1). The insulated gate dielectric can also be a composite gate dielectric.
In one embodiment, the semiconductor device further comprises a passivation layer 700 disposed on a side of the barrier layer 300 away from the epitaxial layer 200 and between the first electrode 400 and the second electrode 500. The passivation layer 700 is made of SiN, AlN, or SiO2Or Al2O3. Silicon nitride (SiN) is an important structural ceramic material. It is a superhard substance, has lubricity and abrasion resistance, is an atomic crystal, and resists oxidation at high temperature. It can resist cold and hot impact, and can be heated to above 1000 deg.C in air, and can be rapidly cooled and then rapidly heated, and can not be broken. Just because silicon nitride ceramics have such excellent characteristics, in the present embodiment, silicon nitride is used as the material of the passivation layer 700 of the semiconductor device to improve the quality of the semiconductor device and improve the heat resistance.
In one embodiment, the semiconductor device is a lateral field controlled rectifier. A rectifier diode (rectifier diode) is a semiconductor device used to convert alternating current to direct current. The most important characteristic of a diode is one-way conductivity. In the circuit, current can only flow in from the anode and flow out from the cathode of the diode. The semiconductor device includes a PN junction having two terminals, a positive terminal and a negative terminal. In this embodiment, the first electrode 400 is an anode of the semiconductor device, and the second electrode 500 is a cathode of the semiconductor device. The semiconductor device provided by the invention can convert alternating current into direct current, and can be used in application scenes such as power supply devices and radio signal detection.
In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A semiconductor device, comprising:
a substrate;
an epitaxial layer disposed on the substrate;
a barrier layer disposed on a side of the epitaxial layer remote from the substrate;
the first electrode and the second electrode are arranged at two opposite ends of one side, far away from the epitaxial layer, of the barrier layer;
the first electrode comprises a grid structure and a floating electrode structure; the gate structure is in contact with the barrier layer; the floating electrode structure is located between the grid structure and the second electrode and is in contact with the grid structure, and the grid structure further extends to be in contact with the second electrode along one side, away from the barrier layer, of the floating electrode structure.
2. The semiconductor device according to claim 1, wherein the barrier layer comprises a first groove and a second groove formed by etching on a side away from the epitaxial layer;
the grid structure comprises a grid metal layer and an insulated grid dielectric layer; the insulating gate dielectric layer is partially formed in the first groove, covers the bottom of the first groove and extends to be in contact with the second electrode along one side, far away from the barrier layer, of the floating electrode structure; part of the grid metal layer is formed in the first groove and covers the insulated grid dielectric layer at the bottom of the first groove;
part of the floating electrode structure is formed in the second groove and is in contact with the bottom of the second groove to form Schottky contact.
3. The semiconductor device of claim 2, wherein the first electrode further comprises a first ohmic contact structure and a field plate structure, a portion of the first ohmic contact structure in contact with the barrier layer forming a first ohmic contact electrode; the first ohmic contact structure is also in contact with the gate structure; the field plate structure is positioned on the surface of the insulated gate dielectric layer above the floating electrode structure, and the position of the field plate structure is opposite to that of the floating electrode structure.
4. The semiconductor device of claim 2, wherein the second electrode comprises a second ohmic contact structure, a portion of the second ohmic contact structure contacting the barrier layer forming a second ohmic contact electrode; the second ohmic contact structure and the first ohmic contact structure are axially symmetrically distributed by a central axis perpendicular to the surface of the substrate.
5. The semiconductor device according to claim 1, wherein the epitaxial layer and the barrier layer form a heterojunction, and a two-dimensional electron gas is formed at an interface of the epitaxial layer and the barrier layer.
6. The semiconductor device of claim 1, wherein the material of the epitaxial layer comprises GaN.
7. The semiconductor device of claim 1, wherein the barrier layer comprises a material comprising AlGaN or a group III nitride.
8. The semiconductor device of claim 3, wherein the material of the insulated gate dielectric comprises SiO2、Si3N4、AlN、Al2O3、MgO、Sc2O3At least one of (1).
9. The semiconductor device of claim 1, further comprising a passivation layer disposed between the first and second electrodes on a side of the barrier layer remote from the epitaxial layer.
10. The semiconductor device according to any one of claims 1 to 9, wherein the semiconductor device comprises a lateral field-controlled rectifier.
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