CN111938635A - Method for preparing salient point and test board for brain electrode rear end connection and test structure - Google Patents

Method for preparing salient point and test board for brain electrode rear end connection and test structure Download PDF

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Publication number
CN111938635A
CN111938635A CN202010795040.5A CN202010795040A CN111938635A CN 111938635 A CN111938635 A CN 111938635A CN 202010795040 A CN202010795040 A CN 202010795040A CN 111938635 A CN111938635 A CN 111938635A
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layer
bump
test
salient point
metal
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CN202010795040.5A
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Chinese (zh)
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陶虎
王雪迎
周志涛
魏晓玲
郑发明
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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Priority to CN202010795040.5A priority Critical patent/CN111938635A/en
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    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B2562/00Details of sensors; Constructional details of sensor housings or probes; Accessories for sensors
    • A61B2562/16Details of sensor housings or probes; Details of structural supports for sensors
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B2576/00Medical imaging apparatus involving image processing or analysis
    • A61B2576/02Medical imaging apparatus involving image processing or analysis specially adapted for a particular organ or body part
    • A61B2576/026Medical imaging apparatus involving image processing or analysis specially adapted for a particular organ or body part for the brain

Abstract

The application provides a method for preparing a salient point for brain electrode rear end connection, a test board and a test structure, wherein the method for preparing the salient point for brain electrode rear end connection comprises the following steps: preparing a salient point lower metal layer on the electroencephalogram electrode; the lower metal layer of the salient point is a nickel metal layer; spin-coating a layer of positive photoresist on the under-bump metal layer; exposing and developing the positive photoresist to expose a salient point window area; electroplating a copper layer in the bump window area; plating a lead-tin alloy layer on the copper layer, wherein the lead-tin alloy layer can cover the salient point window area; removing the positive photoresist, and performing dry etching treatment on the lower metal layer of the salient point to obtain a mushroom-shaped solder column; and (4) obtaining the spherical salient point by protection backflow. According to the preparation method of the salient points for connecting the rear ends of the brain electrodes, provided according to the characteristics of the material of the bonding pads of the flexible brain electrodes, the brain electrodes can be connected in a hot-pressing mode at a low temperature, and damage to devices is avoided.

Description

Method for preparing salient point and test board for brain electrode rear end connection and test structure
Technical Field
The application relates to the technical field of microelectronic packaging interconnection, in particular to a method for preparing a salient point and a test board for brain electrode rear end connection and a test structure.
Background
The multichannel brain electrode is an important core element of brain science and neuroscience, and completes the research on mental diseases such as motor reconstruction of paralyzed patients, vision reconstruction of blind people, auditory reconstruction of deaf people, treatment of Parkinson's disease for epilepsy, inhibition of chronic pain, treatment of depression and the like, artificial intelligence, study related to learning and memory, research on other neurosciences and the like.
With the development of brain science and technology, the acquisition of high-quality and high-density electroencephalogram signals becomes an indispensable condition for precisely reading brain science. In order to meet the requirement, the number of electroencephalograph channels is developed from single digit to thousands of orders of magnitude at present, and because the electroencephalograph is developed in the early stage and a mouse, a rat or a monkey is generally selected as an experimental object, the back end circuit of the electroencephalograph needs to be miniaturized, so that the requirement on the connection mode of the electroencephalograph and the back end is strict, the high-channel connection is required to be realized, the volume is small, the number of channels is increased, the distance is reduced, the design of the current bonding pads (Pad) reaches the distance and the size of tens of micrometers, the common printed circuit board cannot meet the requirement on signal connection of the front-end electroencephalograph, and other high-density connection modes are urgently needed.
Disclosure of Invention
In order to solve the technical problem, the embodiment of the application discloses a method for preparing a salient point for brain electrode rear end connection, which comprises the following steps:
preparing a salient point lower metal layer on the electroencephalogram electrode; the under bump metal layer is a nickel metal layer;
spin-coating a layer of positive photoresist on the under bump metal layer; exposing and developing the positive photoresist to expose a salient point window area;
electroplating a copper layer in the bump window area;
plating a lead-tin alloy layer on the copper layer, wherein the lead-tin alloy layer can cover the bump window area;
removing the positive photoresist, and performing dry etching treatment on the under bump metal layer to obtain a mushroom-shaped solder column; and (4) obtaining the spherical salient point by protection backflow.
Further, the thickness of the under bump metal layer is 2000-10000 angstrom.
Further, the thickness of the positive photoresist is 12-14 microns.
Further, the thickness of the copper layer is 4-6 microns; the thickness of the lead-tin alloy is 4-6 microns.
The second aspect of the application discloses a method for preparing a test board, wherein the test board is used for detecting the connection effect of the salient points for the connection of the rear ends of the brain electrodes; the method comprises the following steps:
preparing a polymer substrate;
spin-coating photoresist on the polymer substrate, and performing photoetching and exposure to form a metal layer pattern;
sputtering a chromium layer and a gold layer on the metal layer pattern in sequence;
removing the photoresist to form a metal wire layer;
preparing a polymer insulating layer on the metal wire layer and patterning the polymer insulating layer to expose a bump area and a test window area;
preparing a salient point lower metal layer on the patterned polymer insulating layer and the salient point area; the under bump metal layer is a nickel metal layer;
spin-coating a layer of positive photoresist on the under bump metal layer; exposing and developing the positive photoresist to expose a salient point window area;
electroplating a copper layer in the bump window area;
plating a lead-tin alloy layer on the copper layer, wherein the lead-tin alloy layer can cover the bump window area;
removing the positive photoresist, and performing dry etching treatment on the under bump metal layer to obtain a mushroom-shaped solder column; and (4) obtaining the spherical salient point by protection backflow.
Further, the method for preparing the test board further comprises the steps of:
and connecting test leads in the test window area.
Further, the polymer substrate is an SU8 substrate or a polyimide substrate;
the polymer insulating layer is an SU8 insulating layer or a polyimide insulating layer.
Further, the thickness of the chromium layer is 500-600 angstrom; the thickness of the gold layer is 500-2000 angstroms.
A third aspect of the embodiments of the present application discloses a test structure, wherein the test structure is configured to detect a connection effect of a salient point for brain electrode rear end connection;
the test structure comprises a first test board and a second test board;
the first test board comprises a first polymer substrate, a first metal wire layer and a first polymer insulating layer which are sequentially connected in a laminated manner; a plurality of first bump window areas and a plurality of first test window areas are formed on the first polymer insulating layer, and first spherical bumps are arranged on the first bump window areas;
the second test board comprises a second polymer substrate, a second metal wire layer and a second polymer insulating layer which are sequentially connected in a laminated manner; a plurality of second bump window areas and a plurality of second test window areas are formed on the second polymer insulating layer, and second spherical bumps are arranged on the second bump window areas;
the first spherical convex point is connected with the second spherical convex point in a bonding way;
the conducting wire circuit pattern of the first metal conducting wire layer adopts a first circuit pattern; and the conducting wire circuit pattern of the second metal conducting wire layer adopts a second circuit pattern, and the second circuit pattern corresponds to the position of the conducting wire on the first circuit pattern, which is disconnected.
Further, test leads are connected to the first test window area.
Further, the first polymer substrate and the second polymer substrate are both SU8 substrates or polyimide substrates;
the first polymer insulating layer and the second polymer insulating layer are both SU8 insulating layers or polyimide insulating layers.
Further, the first spherical salient point and the second spherical salient point are bonded in a hot pressing mode.
By adopting the technical scheme, the application has the following beneficial effects:
according to the preparation method of the salient point for brain electrode rear end connection, nickel is selected as metal of the metal layer under the salient point according to the characteristics of the material of the pad of the flexible brain electrode, and the metal layer can serve as a metal adhesion layer and can also serve as a barrier layer and a wetting layer; in addition, the bump metal is copper and lead-tin alloy, the copper is used as metal in contact with nickel of a metal layer under the bump, the height of the bump can be increased, the lead-tin alloy is used as low-temperature solder, the welding temperature can be reduced to be below 200 ℃, and the front-end brain electrode device can be effectively prevented from being damaged while hot-pressing interconnection is completed.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a flowchart illustrating a method for manufacturing bumps for connecting the rear ends of brain electrodes according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating a process for preparing a bump for connecting the rear ends of brain electrodes according to an embodiment of the present invention;
FIG. 3 is a flow chart of a method for manufacturing a test board according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram illustrating a process for preparing a test board according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram illustrating a first test board in a test structure according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of a second test board in a test structure according to an embodiment of the present disclosure.
The following is a supplementary description of the drawings:
1-a polymeric substrate; 2-a polymer insulating layer; 3-a metal pad; 4-under bump metallurgy layer; 5-photoresist; 6-a copper layer; a 7-lead-tin alloy layer; 8-metal conductor layer.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the present application. In the description of the embodiments of the present application, it is to be understood that the terms "upper", "lower", "top", "bottom", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. Moreover, the terms "first," "second," and the like are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein.
Referring to fig. 1 in combination with fig. 2, fig. 1 is a flowchart illustrating a method for manufacturing a bump for connecting the rear end of an electroencephalogram according to an embodiment of the present application, and fig. 2 is a schematic diagram illustrating a process for manufacturing a bump for connecting the rear end of an electroencephalogram according to an embodiment of the present application, including the following steps:
s101, preparing a salient point lower metal layer 4 on the electroencephalogram electrode; as shown in fig. 2(a), the brain electrode includes a polymer substrate 1, a polymer insulating layer 2, and a metal pad 3; the salient points are prepared on the metal bonding pads 3; the polymer substrate 1 is an SU8 substrate or a polyimide substrate; the polymer insulating layer 2 is an SU8 or polyimide insulating layer; the metal bonding pad 3 is made of gold;
wherein, the under bump metal layer 4 is a nickel metal layer; the under bump metal layer 4 has a thickness of 2000 to 10000 angstroms.
The selection of the under bump metallurgy layer 4 in the present application is based on three factors: adhesion to the underlying metal, barrier to interdiffusion of the solder and underlying metal film, and provide wetting of the solder. The Pad metal of the existing flexible brain electrode is generally selected from gold or platinum, so the embodiment of the present application particularly selects nickel as the metal of the under bump metal layer 4, which can serve as a metal adhesion layer and also can serve as a barrier layer and a wetting layer.
S102, as shown in the figure 2(b), a layer of positive photoresist 5 is spin-coated on the under bump metal layer 4; then, as shown in fig. 2(c), the positive photoresist 5 is exposed and developed to expose the bump window region; the thickness of the positive photoresist 5 is 12-14 microns, for example, the thickness of the positive photoresist 5 can be selected to be 13 microns;
s103, as shown in the figure 2(d), electroplating a copper layer 5 in the bump window area; the thickness of the copper layer 5 is 4-6 microns; for example, the thickness of the copper layer 5 may be chosen to be 5 micrometers.
S104, as shown in figure 2(e), plating a lead-tin alloy layer 6 on the copper layer 5, wherein the lead-tin alloy layer 6 can cover the bump window area; the thickness of the lead-tin alloy is 4-6 microns. For example, the thickness of the lead-tin alloy may be selected to be 5 microns.
In the embodiment of the application, the bump metal is copper and lead-tin alloy, wherein the copper is used as metal in contact with 4 nickel of the under bump metal layer, so that the height of the bump can be increased, the lead-tin alloy is used as low-temperature solder, the welding temperature can be reduced to below 200 ℃, and the front-end brain electrode device cannot be damaged while hot-pressing interconnection is completed.
S105, as shown in the figure 2(f), removing the positive photoresist 5, and carrying out dry etching treatment on the under bump metal layer 4 to obtain a mushroom-shaped solder column; as shown in fig. 2(g), by the protective reflow, a ball bump is obtained.
The preparation method of the salient point for brain electrode rear end connection provided by the embodiment of the application mainly comprises the following technical processes: optical exposure, under bump metallization layer 4 deposition and solder bump preparation. The feature size of the optical exposure technology applied to the semiconductor plane process is generally in the micrometer scale, so that the method is suitable for interconnection of high-density brain electrodes in the dozens of micrometers scale; the under bump metal layer 4 is prepared to prevent metal and contaminant ions from diffusing or corroding to the metal layer on the surface of the brain electrode to form a hard and brittle metal part compound, thereby reducing the reliability of the interconnection system. In the embodiment of the application, the preparation method of the solder bump comprises a mask evaporation method, a solder printing method, a solder electroplating method and the like, and because the solder electroplating process has low requirements on equipment, and has the advantages of better solder distribution uniformity and convenience for accurately controlling the thickness of the solder, the method for electroplating the solder is preferably used for electroplating copper and lead-tin alloy. The bump preparation method is applied to a flexible brain electrode device, and can meet the requirement of the brain electrode on the number of channels which is gradually increased, and in addition, as the flexible brain electrode device generally adopts the polymer substrate 1 and the insulating layer, such as SU8 or polyimide, which cannot bear higher bonding temperature, nickel is particularly selected as the material of the metal layer 4 under the bump, which can be used as a metal adhesion layer and can also play the roles of a barrier layer and a wetting layer. Copper is additionally selected as metal in contact with nickel of a metal layer under the salient points, so that the height of the salient points can be increased, and the lead-tin alloy is used as low-temperature solder, so that the welding temperature can be reduced to be below 200 ℃, the brain electrode can realize hot-pressing interconnection at a lower temperature, the damage to a device is avoided, and the special requirement of the flexible brain electrode is met.
The preparation method of the salient point for connecting the rear end of the brain electrode provided by the embodiment of the application has the following beneficial effects:
firstly, in order to solve the problem of interconnection of high-density brain electrodes, the present application proposes a solution of flip-chip connection by using bump preparation, and designs a specific bump growth method for the metal, substrate, and insulating layer materials of the flexible brain-computer interface. Copper is additionally selected as metal in contact with the under bump metal layer 4, so that the height of the bumps can be increased, and the lead-tin alloy is used as low-temperature solder, so that the welding temperature can be reduced to be below 200 ℃, the brain electrode can realize hot-pressing interconnection at a lower temperature, and the damage to the device is avoided.
In addition, the method for preparing the salient point for brain electrode rear end connection can provide a new mode for high-density flexible brain electrode rear end connection, and the mode can be used for connecting a front-end brain electrode device and a rear end by preparing the salient point; the method can realize interconnection and conduction of thousands of channels and micron-level intervals, greatly reduces the connection area and the volume of the rear end by using the flip-chip process in the preparation of the salient points, and can be used for connecting various long-term nerve signal acquisition equipment of rats and mice. The salient point is designed according to metal gold commonly used by brain electrodes Pad, deposited nickel is adopted as a bottom metal layer material, copper and lead-tin alloy are grown through electroplating to prepare the salient point, and the front-end device and the rear-end acquisition circuit are connected by using a flip-chip welding method. The mode can be used for connecting the front-end device and the rear-end circuit at a lower temperature, the performance of the flexible electrode is better ensured at a lower welding temperature, and the connection of thousands of brain electrode signals can be realized.
Secondly, the front-end device and the rear-end acquisition circuit are connected by using a flip-chip welding method, so that the front-end device of the brain electrode is directly interconnected with the rear-end acquisition circuit, the length of an interconnection line is greatly shortened, and the generated interconnection resistance, inductance and stray capacitance are very small; for the collection of high-density electroencephalogram level signals, the action potential amplitude detected by the electrode is generally in the mu level, and the reduction of the resistance value is beneficial to reducing noise; meanwhile, the packaging structure is directly welded on the Pad, and the Pad is small in size and small in interval, so that the packaging structure is suitable for the current thousand-channel electroencephalograms and the packaging interconnection of the ten thousand-channel electroencephalograms in the subsequent development.
Because of the high-density connection of Pad of the flexible brain electrode front-end device, the size and the spacing of welding points are in the order of tens of micrometers, and the welding strength and the connection rate are easily reduced due to the smaller welding points and spacing, so that the test board for detecting the connection effect of the salient points is provided in the second aspect of the application. The preparation method of the test board is based on the preparation method of the salient point for connecting the rear end of the brain electrode; because the test board is used for detecting whether the prepared salient points are successfully connected or not after being subjected to hot-press welding, the material selection is consistent with that of the brain electrode front-end device, the polymer substrate 1 adopted by the flexible brain electrode, such as SU8 or polyimide, is used as the substrate and the insulating layer, and gold is used as the wire layer and the test pad; and then preparing the salient points on the test board by adopting the preparation method of the salient points for connecting the rear ends of the brain electrodes. In testing, two test boards are required to be mated for testing.
A second aspect of the present application discloses a method for manufacturing a test board, comprising the steps of:
s301, as shown in FIG. 4(a), preparing a polymer substrate 1; the polymer substrate 1 is an SU8 substrate or a polyimide substrate;
s302, as shown in FIG. 4(b), a photoresist 5 is spin-coated on the polymer substrate 1, and photoetching and exposure are carried out to form a metal layer pattern; the polymer insulating layer 2 is an SU8 insulating layer or a polyimide insulating layer.
S303, as shown in the figure 4(c), a chromium layer and a gold layer are sputtered on the metal layer pattern in sequence; the thickness of the chromium layer is 500-600 angstrom; the thickness of the gold layer is 500-2000 angstroms.
S304, as shown in the figure 4(d), removing the photoresist 5 to form a metal wire layer 8;
s305, as shown in figure 4(e), preparing the polymer insulating layer 2 on the metal wire layer 8 and patterning to expose the bump area and the test window area; the subsequent steps are to prepare the spherical salient point to be tested in the salient point area according to the preparation method of the salient point, and the specific steps are as follows:
s306, preparing a lower metal bump layer 4 on the patterned polymer insulating layer 2 and the bump area; the under bump metal layer 4 is a nickel metal layer;
s307, a layer of positive photoresist 5 is coated on the under bump metal layer 4 in a spinning mode; exposing and developing the positive photoresist 5 to expose a bump window area;
s308, electroplating a copper layer 5 in the bump window area;
s309, plating a lead-tin alloy layer 6 on the copper layer 5, wherein the lead-tin alloy layer 6 can cover the bump window area;
s310, removing the positive photoresist 5, and performing dry etching treatment on the under bump metal layer 4 to obtain a mushroom-shaped solder column; and (4) obtaining the spherical salient point by protection backflow.
In the embodiment of the application, the preparation method of the test board further comprises the following steps:
test leads are connected in the area of the test window.
The third aspect of the embodiment of the application discloses a test structure, which is composed of two test boards, wherein the two test boards are both prepared by the preparation method of the test boards, the test structure is used for detecting the connection effect of the salient points for the connection of the rear ends of the brain electrodes, the reliability of the detection process and the applicability of the salient point connection scheme can be detected before practical application, the trial and error cost is reduced, and a feasible solution is provided for the connection of the high-density flexible brain electrodes.
The test structure comprises a first test board and a second test board;
the first test board comprises a first polymer substrate 1, a first metal wire layer 8 and a first polymer insulating layer 2 which are sequentially connected in a laminated manner; a plurality of first bump window areas and a plurality of first test window areas are formed on the first polymer insulating layer 2, first spherical bumps are arranged on the first bump window areas, and the first test window areas are connected with test leads;
the second test board comprises a second polymer substrate 1, a second metal wire layer 8 and a second polymer insulating layer 2 which are sequentially connected in a laminated manner; a plurality of second bump window areas and a plurality of second test window areas are formed on the second polymer insulating layer 2, and second spherical bumps are arranged on the second bump window areas;
the first spherical convex point is connected with the second spherical convex point in a bonding way;
the conductor line pattern of the first metal conductor layer 8 adopts a first line pattern; the conductive line pattern of the second metal conductive line layer 8 adopts a second line pattern corresponding to the position of the conductive line break on the first line pattern. The first metal wire layer 8 and the second metal wire layer 8 are made of chromium and gold.
The test structure is divided into a first test board and a second test board, when testing, the patterns of the two boards are only bonded and conducted at the salient points, and signals between the two boards can be conducted. The first test board is provided with a plurality of test pads, and only all salient points between every two pads are bonded to be conducted, so that whether the resistance value between the two pads is reasonable or not is tested after bonding, and the bonding condition between the salient points can be judged. The second test board is designed to complement the first test board, and the metal pattern on the second test board corresponds to the broken part of the conducting wire on the first test board. That is, when all Pad bumps are bonded, the metal pattern on the second test board serves as a lead between the metal wire intervals of the first test board, and signal conduction between pads is realized.
In the present example, the first polymer substrate 1 and the second polymer substrate 1 are both SU8 substrates or polyimide substrates;
the first polymer insulation layer 2 and the second polymer insulation layer 2 are both SU8 insulation layers or polyimide insulation layers.
In the embodiment of the present application, the first spherical bump and the second spherical bump are bonded by thermocompression, for example, thermocompression bonding may be performed at 183 ℃.
Based on the above, one embodiment is detailed below by way of example:
example 1:
referring to fig. 1 in combination with fig. 2, a method for preparing a bump for connecting the rear end of an electroencephalogram provided in embodiment 1 of the present application includes the following steps:
s101, preparing a salient point lower metal layer 4 on the electroencephalogram electrode; as shown in fig. 2(a), the brain electrode includes a polymer substrate 1, a polymer insulating layer 2, and a metal pad 3; the salient points are prepared on the metal bonding pads 3; the polymer substrate 1 is a polyimide substrate; the polymer insulating layer 2 is an SU8 insulating layer; the metal bonding pad 3 is made of gold;
wherein, the under bump metal layer 4 is a nickel metal layer; the under bump metallization layer 4 has a thickness of 2000 angstroms.
In the present application, the selection of the under bump metallurgy layer 4 in the embodiment 1 is based on three factors: adhesion to the underlying metal, barrier to interdiffusion of the solder and underlying metal film, and provide wetting of the solder. The Pad metal of the existing flexible brain electrode is generally selected from gold or platinum, so the embodiment of the present application particularly selects nickel as the metal of the under bump metal layer 4, which can serve as a metal adhesion layer and also can serve as a barrier layer and a wetting layer.
S102, as shown in the figure 2(b), a layer of positive photoresist 5 is spin-coated on the under bump metal layer 4; then, as shown in fig. 2(c), the positive photoresist 5 is exposed and developed to expose the bump window region; the thickness of the positive photoresist 5 was 13 μm.
S103, as shown in the figure 2(d), electroplating a copper layer 5 in the bump window area; the thickness of the copper layer 5 is 5 micrometers.
S104, as shown in figure 2(e), plating a lead-tin alloy layer 6 on the copper layer 5, wherein the lead-tin alloy layer 6 can cover the bump window area; the thickness of the lead-tin alloy was 5 microns.
In embodiment 1 of the present application, the bump metal is selected from copper and a lead-tin alloy, where copper is used as a metal in contact with 4 nickel of the under bump metal layer, which can increase the height of the bump, and the lead-tin alloy is used as a low temperature solder, which can reduce the soldering temperature to below 200 ℃, and thus, the front-end brain electrode device is not damaged while completing the hot-press interconnection.
S105, as shown in the figure 2(f), removing the positive photoresist 5, and carrying out dry etching treatment on the under bump metal layer 4 to obtain a mushroom-shaped solder column; as shown in fig. 2(g), by the protective reflow, a ball bump is obtained.
Referring to fig. 3 and 4, a method for preparing a first test board provided in embodiment 1 of the present application includes the following steps:
s301, as shown in FIG. 4(a), preparing a polymer substrate 1; the polymer substrate 1 is a polyimide substrate;
s302, as shown in FIG. 4(b), a photoresist 5 is spin-coated on the polymer substrate 1, and photoetching and exposure are carried out to form a metal layer pattern; the polymer insulation layer 2 is an SU8 insulation layer.
S303, as shown in the figure 4(c), a chromium layer and a gold layer are sputtered on the metal layer pattern in sequence; the thickness of the chromium layer is 500 angstrom; the gold layer had a thickness of 500 angstroms.
S304, as shown in the figure 4(d), removing the photoresist 5 to form a metal wire layer 8;
s305, as shown in figure 4(e), preparing the polymer insulating layer 2 on the metal wire layer 8 and patterning to expose the bump area and the test window area; the subsequent steps are to prepare the spherical salient point to be tested in the salient point area according to the preparation method of the salient point in the embodiment 1 of the application, and the specific steps are as follows:
s306, preparing a lower metal bump layer 4 on the patterned polymer insulating layer 2 and the bump area; the under bump metal layer 4 is a nickel metal layer;
s307, a layer of positive photoresist 5 is coated on the under bump metal layer 4 in a spinning mode; exposing and developing the positive photoresist 5 to expose a bump window area;
s308, electroplating a copper layer 5 in the bump window area;
s309, plating a lead-tin alloy layer 6 on the copper layer 5, wherein the lead-tin alloy layer 6 can cover the bump window area;
s310, removing the positive photoresist 5, and performing dry etching treatment on the under bump metal layer 4 to obtain a mushroom-shaped solder column; and (4) obtaining the spherical salient point by protection backflow.
In embodiment 1 of the present application, the method for manufacturing a first test board further includes connecting a test lead to the test window region.
In embodiment 1 of the present application, a second test board is prepared in a similar manner to the first test board, except that the first circuit pattern shown in fig. 5 is used as the conductive line pattern of the metal conductive layer in the first test board; the second circuit pattern of the metal wire layer 8 in the second test board is the second circuit pattern as shown in fig. 6, and the second circuit pattern corresponds to the position of the first circuit pattern where the wire is disconnected. And the test window area of the first test board is connected with the leads, and the test window area of the second test board is not connected with the test leads. In addition, in embodiment 1 of the present application, in order to perform a test on solder joints with a diameter of 32.5 micrometers and a pitch of 80 micrometers, in the test board preparation, the sizes of the bump regions of the first test board and the second test board are both 32.5 micrometers, and the pitch is 80 micrometers, the test conditions of the test structure provided in embodiment 1 of the present application are as follows: all the spherical bumps on the first test board and the second test board are correspondingly bonded, and the first circuit pattern on the second test board serves as a lead between the metal wire intervals of the first test board, so that signal conduction between the pads is realized.
The test structure provided in embodiment 1 of the present application includes the first test board and the second test board prepared by the above preparation method;
the first test board comprises a first polymer substrate 1, a first metal wire layer 8 and a first polymer insulating layer 2 which are sequentially connected in a laminated manner; a plurality of first bump window areas and a plurality of first test window areas are formed on the first polymer insulating layer 2, first spherical bumps are arranged on the first bump window areas, and the first test window areas are connected with test leads;
the second test board comprises a second polymer substrate 1, a second metal wire layer 8 and a second polymer insulating layer 2 which are sequentially connected in a laminated manner; a plurality of second bump window areas and a plurality of second test window areas are formed on the second polymer insulating layer 2, and second spherical bumps are arranged on the second bump window areas;
the first spherical convex point and the second spherical convex point are connected in a hot-pressing bonding mode at 183 ℃;
the conductor line pattern of the first metal conductor layer 8 adopts the first line pattern as shown in fig. 5; the conductive line pattern of the second metal conductive line layer 8 adopts a second line pattern as shown in fig. 6, and the second line pattern corresponds to the position of the conductive line break on the first line pattern. The first metal wire layer 8 and the second metal wire layer 8 are made of chromium and gold.
The present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features herein disclosed.

Claims (12)

1. A method for preparing a salient point for connecting the rear end of a brain electrode is characterized by comprising the following steps of:
preparing a salient point lower metal layer on the electroencephalogram electrode; the under bump metal layer is a nickel metal layer;
spin-coating a layer of positive photoresist on the under bump metal layer; exposing and developing the positive photoresist to expose a salient point window area;
electroplating a copper layer in the bump window area;
plating a lead-tin alloy layer on the copper layer, wherein the lead-tin alloy layer can cover the bump window area;
removing the positive photoresist, and performing dry etching treatment on the under bump metal layer to obtain a mushroom-shaped solder column; and (4) obtaining the spherical salient point by protection backflow.
2. The method for preparing a bump for brain electrode back end connection according to claim 1, wherein the under-bump metal layer has a thickness of 2000 to 10000 angstrom.
3. The method for preparing bumps for brain electrode back end connection according to claim 1, wherein the thickness of the positive photoresist is 12 to 14 μm.
4. The method for preparing a bump for brain electrode rear end connection according to claim 1, wherein the copper layer has a thickness of 4-6 μm; the thickness of the lead-tin alloy is 4-6 microns.
5. The preparation method of a test board, characterized by that, the said test board is used for detecting the connection effect of the salient point for connection of the back end of brain electrode; the method comprises the following steps:
preparing a polymer substrate;
spin-coating photoresist on the polymer substrate, and performing photoetching and exposure to form a metal layer pattern;
sputtering a chromium layer and a gold layer on the metal layer pattern in sequence;
removing the photoresist to form a metal wire layer;
preparing a polymer insulating layer on the metal wire layer and patterning the polymer insulating layer to expose a bump area and a test window area;
preparing a salient point lower metal layer on the patterned polymer insulating layer and the salient point area; the under bump metal layer is a nickel metal layer;
spin-coating a layer of positive photoresist on the under bump metal layer; exposing and developing the positive photoresist to expose a salient point window area;
electroplating a copper layer in the bump window area;
plating a lead-tin alloy layer on the copper layer, wherein the lead-tin alloy layer can cover the bump window area;
removing the positive photoresist, and performing dry etching treatment on the under bump metal layer to obtain a mushroom-shaped solder column; and (4) obtaining the spherical salient point by protection backflow.
6. The method for preparing a test plate according to claim 5, further comprising the steps of:
and connecting test leads in the test window area.
7. The method of making a test plate according to claim 5, wherein the polymer substrate is a SU8 substrate or a polyimide substrate;
the polymer insulating layer is an SU8 insulating layer or a polyimide insulating layer.
8. The method of preparing a test plate according to claim 5, wherein the chromium layer has a thickness of 500-600 angstroms; the thickness of the gold layer is 500-2000 angstroms.
9. A test structure is characterized in that the test structure is used for detecting the connection effect of salient points for brain electrode rear end connection;
the test structure comprises a first test board and a second test board;
the first test board comprises a first polymer substrate, a first metal wire layer and a first polymer insulating layer which are sequentially connected in a laminated manner; a plurality of first bump window areas and a plurality of first test window areas are formed on the first polymer insulating layer, and first spherical bumps are arranged on the first bump window areas;
the second test board comprises a second polymer substrate, a second metal wire layer and a second polymer insulating layer which are sequentially connected in a laminated manner; a plurality of second bump window areas and a plurality of second test window areas are formed on the second polymer insulating layer, and second spherical bumps are arranged on the second bump window areas;
the first spherical convex point is connected with the second spherical convex point in a bonding way;
the conducting wire circuit pattern of the first metal conducting wire layer adopts a first circuit pattern; and the conducting wire circuit pattern of the second metal conducting wire layer adopts a second circuit pattern, and the second circuit pattern corresponds to the position of the conducting wire on the first circuit pattern, which is disconnected.
10. The test structure of claim 9, wherein test leads are connected to the first test window region.
11. The test structure of claim 9, wherein the first and second polymeric substrates are both SU8 substrates or polyimide substrates;
the first polymer insulating layer and the second polymer insulating layer are both SU8 insulating layers or polyimide insulating layers.
12. The test structure of claim 9, wherein the first ball bump and the second ball bump are bonded by thermocompression.
CN202010795040.5A 2020-08-10 2020-08-10 Method for preparing salient point and test board for brain electrode rear end connection and test structure Pending CN111938635A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH088257A (en) * 1994-06-17 1996-01-12 Sumitomo Metal Ind Ltd Bump electrode testing part
JPH0829451A (en) * 1994-07-05 1996-02-02 Motorola Inc Bump semiconductor device and probe inspection method thereof
CN1189691A (en) * 1997-01-20 1998-08-05 夏普公司 Semiconductor device and manufacturing method and testing method of same
US6413851B1 (en) * 2001-06-12 2002-07-02 Advanced Interconnect Technology, Ltd. Method of fabrication of barrier cap for under bump metal
JP2005127961A (en) * 2003-10-27 2005-05-19 Shinko Electric Ind Co Ltd Substrate for tests and test equipment with its use
CN101123196A (en) * 2006-08-10 2008-02-13 中芯国际集成电路制造(上海)有限公司 Method for making lead and tin alloy protruding point
CN101170089A (en) * 2006-10-23 2008-04-30 台湾薄膜电晶体液晶显示器产业协会 A contact structure with flexible protruding block and testing area and its making method
CN101207046A (en) * 2006-12-18 2008-06-25 中芯国际集成电路制造(上海)有限公司 Bump formation method
CN101030548A (en) * 2007-03-27 2007-09-05 中国科学院上海微系统与信息技术研究所 Micro-mechanical wafer chip test detecting card and its production
CN102496585A (en) * 2011-12-19 2012-06-13 南通富士通微电子股份有限公司 Novel wafer level packaging method
KR101535179B1 (en) * 2014-12-03 2015-07-08 재단법인 서울테크노파크 Contactor of test socket for semiconductor device and method of manufacturing the same
CN105448755A (en) * 2016-01-15 2016-03-30 中芯长电半导体(江阴)有限公司 A packaging method for copper column salient points and a packaging structure
CN108878296A (en) * 2018-06-27 2018-11-23 华中科技大学 A kind of preparation method of three-dimensional micro convex point

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