CN111934633A - High-power gain high-back-off efficiency power amplifier - Google Patents

High-power gain high-back-off efficiency power amplifier Download PDF

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Publication number
CN111934633A
CN111934633A CN202011033148.7A CN202011033148A CN111934633A CN 111934633 A CN111934633 A CN 111934633A CN 202011033148 A CN202011033148 A CN 202011033148A CN 111934633 A CN111934633 A CN 111934633A
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microstrip line
matching network
capacitor
input
output
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羊洪轮
王测天
邬海峰
滑育楠
吕继平
胡柳林
童伟
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Chengdu Ganide Technology Co ltd
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Chengdu Ganide Technology Co ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microwave Amplifiers (AREA)

Abstract

The invention discloses a high-power gain high-back-off efficiency power amplifier which comprises a power distribution network, an input matching network, three amplifier tube cores, an inter-stage matching network, three final-stage tube cores, an output matching network, a grid power supply bias network and a drain power supply bias network. The invention adopts a 3-way Doherty structure that the main-circuit boost amplifier and the final-stage grid voltage are biased in class AB, and the two-circuit auxiliary-circuit boost amplifier and the final-stage grid voltage are biased in class C, which effectively utilizes the low power consumption characteristic of the auxiliary-circuit two-stage amplifier when the grid voltage is biased in class C, improves the power gain of the whole Doherty amplifier, improves the back-off efficiency of the amplifier, and has quite high back-off efficiency in quite large back-off range. The power amplifier chip circuit with high power gain and high back-off efficiency, which is realized by the invention, has the advantages of high power gain, high back-off efficiency of 9.5dB and high saturation output power.

Description

High-power gain high-back-off efficiency power amplifier
Technical Field
The invention belongs to the technical field of field effect transistor microwave radio frequency power amplifiers and integrated circuits, and particularly relates to a design of a high-power gain high-back-off efficiency power amplifier.
Background
With the rapid development of 5G communication and the early arrangement of each communication operator, signals in a communication system are often non-constant envelope radio frequency signals, which prompts the development of a Doherty power amplifier chip with high power gain, high back-off efficiency and low cost to become a current hotspot. However, in the design of an integrated Doherty power amplifier chip, there are many circuit structures of a common high-gain, high-back-off efficiency, high-power rf Doherty power amplifier, but three indexes are rarely realized at the same time, which is mainly reflected in that:
(1) the difficulty of high power and high efficiency is great: driven by the 5G communication market, the application of the high-power and high-efficiency Doherty amplifier in the radio frequency front-end transmitter is urgent, but the existing chip technology is basically a semiconductor technology transistor with small gate length and high characteristic frequency, the voltage swing of the power amplifier is influenced by the low breakdown voltage of the transistor, and the power capacity of the power amplifier is greatly reduced. In order to obtain a high power amplifier, a plurality of transistors are often connected in parallel, and at the same time, the back-off efficiency is unacceptable, which results in a difficult compatibility between high power and high efficiency indexes.
(2) The difficulty of high gain and high back-off efficiency is high: the power gain of a single-stage Doherty circuit often cannot meet application requirements, and in order to obtain a high gain index, a common practice is to add a multi-stage AB class driver amplifier in front of the Doherty circuit, and since the back-off efficiency of the AB class driver amplifier is low, the back-off efficiency of the whole circuit is reduced. Therefore, the high gain and high back-off efficiency indexes are difficult to be compatible.
Disclosure of Invention
The invention aims to provide a high-power-gain high-back-off efficiency power amplifier which has the advantages of high power gain, high 9.5dB back-off efficiency and high saturation output power.
The technical scheme of the invention is as follows: a high-power gain high-back-off efficiency power amplifier comprises a power distribution network, an input matching network, three amplifier tube cores, an inter-stage matching network, three final-stage tube cores, an output matching network, a grid supply bias network and a drain supply bias network; the input end of the power distribution network is used as the radio frequency input end of the high-power gain high-backspacing efficiency power amplifier, and the first output end, the second output end and the third output end of the power distribution network are respectively connected with the first input end, the second input end and the third input end of the input matching network in a one-to-one correspondence manner; the first output end, the second output end and the third output end of the input matching network are respectively connected with the first input end, the second input end and the third input end of the three-way amplifying tube core in a one-to-one correspondence manner; the first output end, the second output end and the third output end of the three-way amplifying tube core are respectively connected with the first input end, the second input end and the third input end of the interstage matching network in a one-to-one correspondence manner; the first output end, the second output end and the third output end of the inter-stage matching network are respectively connected with the first input end, the second input end and the third input end of the three final-stage tube cores in a one-to-one correspondence manner; the first output end, the second output end and the third output end of the three paths of final-stage tube cores are respectively connected with the first input end, the second input end and the third input end of the output matching network in a one-to-one correspondence manner; the output end of the output matching network is used as the radio frequency output end of the high-power gain high-backspacing efficiency power amplifier; the grid power supply bias network is respectively connected with the input matching network and the interstage matching network, and the drain power supply bias network is respectively connected with the interstage matching network and the output matching network.
The invention has the beneficial effects that: the invention adopts a 3-way Doherty structure that the main-circuit boost amplifier and the final-stage grid voltage are biased in class AB, and the two-circuit auxiliary-circuit boost amplifier and the final-stage grid voltage are biased in class C, which effectively utilizes the low power consumption characteristic of the auxiliary-circuit two-stage amplifier when the grid voltage is biased in class C, improves the power gain of the whole Doherty amplifier, improves the back-off efficiency of the amplifier, and has quite high back-off efficiency in quite large back-off range. The power amplifier chip circuit with high power gain and high back-off efficiency, which is realized by the invention, has the advantages of high power gain, high back-off efficiency of 9.5dB and high saturation output power.
Further, the power distribution network comprises a microstrip line TL1Microstrip line TL2Resistance R1Microstrip line TL3Microstrip line TL4And a resistance R2(ii) a Microstrip line TL1And microstrip line TL2Is connected with one end and serves as an input end of the power distribution network, and the other end of the power distribution network is connected with the resistor R1And as a first output of the power distribution network, a microstrip line TL2The other end of each of the resistors R and R is connected with1Another end of (1), microstrip line TL3And microstrip line TL4Is connected to microstrip line TL3Another terminal of (1) and a resistor R2And as a second output of the power distribution network, a microstrip line TL4Another terminal of (1) and a resistor R2And the other end of the network is connected and serves as a third output terminal of the power distribution network.
The beneficial effects of the further scheme are as follows: the power distribution network is used for dividing the radio frequency input signal into three paths which respectively enter the input matching network.
Further, the input matching network comprises a microstrip line TL5Microstrip line TL6Microstrip line TL7Microstrip line TL8Microstrip line TL9Capacitor C1And a grounding capacitor C2Capacitor C3And a grounding capacitor C4Capacitor C5And a ground capacitor C6(ii) a Microstrip line TL5One end of the first input matching network is used as a first input end of the input matching network, and the other end of the first input matching network passes through a capacitor C1Respectively connected with a grounding capacitor C2And microstrip line TL6Is connected to microstrip line TL6The other end of the input matching network is used as a first output end of the input matching network; capacitor C3As an input matchA second input terminal of the distribution network, the other terminal of which is connected with a grounding capacitor C4And microstrip line TL7Is connected to microstrip line TL7The other end of the input matching network is used as a second output end of the input matching network; microstrip line TL8One end of the second input terminal is used as a third input end of the input matching network, and the other end of the second input terminal passes through a capacitor C5Respectively connected with a grounding capacitor C6And microstrip line TL9Is connected to microstrip line TL9And the other end of the input matching network is used as a third output end of the input matching network.
The beneficial effects of the further scheme are as follows: the input matching network respectively matches the input of the main road and the two auxiliary push-amplifying tube cores, and meanwhile, in order to meet phase matching, quarter-wavelength phase compensation lines are added to the main road and the second auxiliary road.
Further, the three-way dump die includes a drive main circuit transistor DRMDriving the first auxiliary peak transistor DRP1And driving a second auxiliary peak transistor DRP2(ii) a Drive main circuit transistor DRMThe source of the three-way amplifying die is grounded, the grid of the three-way amplifying die is used as a first input end of the three-way amplifying die, and the drain of the three-way amplifying die is used as a first output end of the three-way amplifying die; driving a first auxiliary peak transistor DRP1The source of the three-way amplifying tube core is grounded, the grid of the three-way amplifying tube core is used as a second input end of the three-way amplifying tube core, and the drain of the three-way amplifying tube core is used as a second output end of the three-way amplifying tube core; driving a second auxiliary peak transistor DRP2The source of (a) is grounded, the gate of the (b) is used as the third input end of the three-way dump die, and the drain of the (b) is used as the third output end of the three-way dump die.
The beneficial effects of the further scheme are as follows: the main path and the two auxiliary path push-release tube cores directly drive the final-stage tube core, and meanwhile, the push-release grid voltage is biased in different working states, so that the 3-path Doherty integral rollback efficiency can be improved.
Further, the interstage matching network comprises a microstrip line TL10Grounded microstrip line TL11Microstrip line TL12Grounded microstrip line TL13Microstrip line TL14Grounded microstrip line TL15Capacitor C7Capacitor C8Capacitor C9Capacitor C10Capacitor C11Capacitor C12Capacitor C13Capacitor C14Capacitor C15Resistance R3Resistance R4Resistance R5Resistance R6Resistance R7And a resistance R8(ii) a Microstrip line TL10One terminal of the second switch is used as a first input terminal of the interstage matching network, and the other terminal of the second switch is connected with the capacitor C7Respectively associated with a resistor R3One terminal of and a capacitor C8Is connected to a resistor R3The other end of (a) and the ground microstrip line TL11Connection, capacitance C8The other end of each of the first and second capacitors is connected to a capacitor C9And a resistor R4Is connected to a capacitor C9Another terminal of (1) and a resistor R4Is connected with the other end of the inter-stage matching network and is used as a first output end of the inter-stage matching network; microstrip line TL12One terminal of the second input terminal is used as the second input terminal of the interstage matching network, and the other terminal of the second input terminal is connected with the capacitor C10Respectively associated with a resistor R5One terminal of and a capacitor C11Is connected to a resistor R5The other end of (a) and the ground microstrip line TL13Connection, capacitance C11The other end of each of the first and second capacitors is connected to a capacitor C12And a resistor R6Is connected to a capacitor C12Another terminal of (1) and a resistor R6And as a second output of the interstage matching network; microstrip line TL14One terminal of the second input terminal is used as a third input terminal of the interstage matching network, and the other terminal of the second input terminal is connected with the capacitor C13Respectively associated with a resistor R7One terminal of and a capacitor C14Is connected to a resistor R7The other end of (a) and the ground microstrip line TL15Connection, capacitance C14The other end of each of the first and second capacitors is connected to a capacitor C15And a resistor R8Is connected to a capacitor C15Another terminal of (1) and a resistor R8And the other end of the second stage matching network is connected and used as a third output end of the interstage matching network.
The beneficial effects of the further scheme are as follows: the interstage matching network is used for low insertion loss matching of output of the forward stage push-amplifying tube core and input of the final stage tube core, the efficiency and power gain of the overall Doherty circuit are improved, and the interstage matching network circuit is added with a structure that a resistor and a microstrip line are connected in series to the ground, so that stable compensation of the overall circuit and optimization of the flatness of the gain of the link can be realized.
Further, the three-way final stage die includes a final stage main circuit transistor PAMThe final stage first auxiliary peak transistor PAP1And final stage second auxiliary peak transistor PAP2(ii) a Final main circuit transistor PAMThe source of (a) is grounded, the gate of the three-way final stage die is used as a first input end of the three-way final stage die, and the drain of the three-way final stage die is used as a first output end of the three-way final stage die; final-stage first auxiliary peak transistor PAP1The source of (a) is grounded, the gate of the three-way final stage die is used as a second input end of the three-way final stage die, and the drain of the three-way final stage die is used as a second output end of the three-way final stage die; final-stage second auxiliary peak transistor PAP2Has its gate as a third input terminal of the three-way final die, and has its drain as a third output terminal of the three-way final die.
The beneficial effects of the further scheme are as follows: the three paths of final-stage tube cores are composed of three paths of final-stage Doherty tube cores, the main path and the two paths of auxiliary-path final-stage tube cores work in class AB and class C respectively, and the auxiliary-path tube cores are started at different moments according to an active load traction principle, so that 9.5dB high-efficiency backspacing is realized.
Further, the output matching network comprises a capacitor C16And a grounding capacitor C17Capacitor C18And a grounding capacitor C19Capacitor C20Microstrip line TL16Microstrip line TL17And microstrip line TL18(ii) a Capacitor C16One end of the microstrip line is used as a first input end of the output matching network, and the other end of the microstrip line passes through the microstrip line TL16Respectively connected with a grounding capacitor C17Microstrip line TL18One terminal of and a capacitor C20Is connected to microstrip line TL18The other end of the first and second electrodes is respectively connected with a microstrip line TL17One terminal of and a grounding capacitor C19A microstrip line TL connected as a third input of the output matching network17Another terminal of (1) and a capacitor C18Is connected to a capacitor C18The other end of the first capacitor is used as a second input end of the output matching network, and a capacitor C20And the other end of the input matching network is used as the output end of the output matching network.
The beneficial effects of the further scheme are as follows: the output matching network simultaneously performs impedance matching of a power back-off point and a saturation power point on the three-path final-stage tube core output, a quarter-wavelength phase compensation line is added into the first auxiliary-path output to balance the whole phase, and the high back-off efficiency, the high back-off gain and the high saturation power output of the 3-path Doherty are integrally realized.
Further, the gate supply bias network includes a resistor R9Resistance R10Resistance R11Resistance R12Resistance R13Resistance R14Microstrip line TL19Microstrip line TL20Microstrip line TL21Microstrip line TL22Microstrip line TL23Microstrip line TL24And a grounding capacitor C21And a grounding capacitor C22And a grounding capacitor C23And a grounding capacitor C24And a grounding capacitor C25And a ground capacitor C26(ii) a Resistance R9Is connected with the third output end of the input matching network, and the other end thereof is connected with the third output end of the input matching network through a microstrip line TL19Respectively connected with a grounding capacitor C21And a low voltage bias supply VG1 connection; resistance R10One end of which is connected with the second output end of the input matching network and the other end of which is connected with the second output end of the input matching network through a microstrip line TL20Respectively connected with a grounding capacitor C22And a low voltage bias supply VG2 connection; resistance R11One end of the input matching network is connected with the first output end of the input matching network, and the other end of the input matching network is connected with the first output end of the input matching network through a microstrip line TL21Respectively connected with a grounding capacitor C23And a low voltage bias supply VG3 connection; resistance R12Is connected with the third output end of the interstage matching network, and the other end of the interstage matching network is connected with the third output end of the interstage matching network through a microstrip line TL22Respectively connected with a grounding capacitor C24And a low voltage bias supply VG4 connection; resistance R13One end of the second microstrip line is connected with the second output end of the interstage matching network, and the other end of the second microstrip line passes through the microstrip line TL23Respectively connected with a grounding capacitor C25And a low voltage bias supply VG5 connection; resistance R14One end of the first microstrip line is connected with the first output end of the interstage matching network, and the other end of the first microstrip line is connected with the first output end of the interstage matching network through a microstrip line TL24Respectively connected with a grounding capacitor C26And a low voltage bias supply VG 6.
The beneficial effects of the further scheme are as follows: the grid power supply bias network provides bias voltage for grid voltage of the main circuit, the two auxiliary circuit boost tube cores and the final-stage tube core respectively, so that the main circuit boost tube core and the final-stage tube core are biased in an AB type state, the two auxiliary circuits are biased in a C type state, the two auxiliary circuits are started at different time intervals by controlling the grid voltage of the auxiliary circuits, and the two auxiliary circuits still have quite high rollback efficiency in a quite large rollback range.
Further, the drain supply bias network comprises a microstrip line TL25Microstrip line TL26Microstrip line TL27Microstrip line TL28Microstrip line TL29Microstrip line TL30And a grounding capacitor C27And a grounding capacitor C28And a grounding capacitor C29And a grounding capacitor C30And a grounding capacitor C31And a ground capacitor C32(ii) a Microstrip line TL25One end of the second capacitor is connected with the third input end of the interstage matching network, and the other end of the second capacitor is respectively connected with the grounding capacitor C27And a high-voltage bias power supply VD connection; microstrip line TL26One end of the second input end of the interstage matching network is connected with the second input end of the interstage matching network, and the other end of the second input end of the interstage matching network is respectively connected with the grounding capacitor C28And a high-voltage bias power supply VD connection; microstrip line TL27One end of the second capacitor is connected with the first input end of the interstage matching network, and the other end of the second capacitor is respectively connected with the grounding capacitor C29And a high-voltage bias power supply VD connection; microstrip line TL28One end of the output matching network is connected with the third input end of the output matching network, and the other end of the output matching network is respectively connected with the grounding capacitor C30And a high-voltage bias power supply VD connection; microstrip line TL29One end of the output matching network is connected with the second input end of the output matching network, and the other end of the output matching network is respectively connected with the grounding capacitor C31And a high-voltage bias power supply VD connection; microstrip line TL30One end of the output matching network is connected with the first input end of the output matching network, and the other end of the output matching network is respectively connected with the grounding capacitor C32And a high voltage bias power supply VD.
The beneficial effects of the further scheme are as follows: and the drain supply bias network is used for supplying power to the drains of the three dies so as to enable the three dies to work normally.
Drawings
Fig. 1 is a schematic block diagram of a power amplifier with high power gain and high back-off efficiency according to an embodiment of the present invention.
Fig. 2 is a circuit diagram of a power amplifier with high power gain and high back-off efficiency according to an embodiment of the invention.
Detailed Description
Exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It is to be understood that the embodiments shown and described in the drawings are merely exemplary and are intended to illustrate the principles and spirit of the invention, not to limit the scope of the invention.
An embodiment of the present invention provides a high power gain high back-off efficiency power amplifier, as shown in fig. 1, which includes a power distribution network, an input matching network, three paths of cascode dice, an inter-stage matching network, three paths of final-stage dice, an output matching network, a gate supply bias network, and a drain supply bias network.
The input end of the power distribution network is used as the radio frequency input end of the high-power gain high-backspacing efficiency power amplifier, and the first output end, the second output end and the third output end of the power distribution network are respectively connected with the first input end, the second input end and the third input end of the input matching network in a one-to-one correspondence mode.
The first output end, the second output end and the third output end of the input matching network are respectively connected with the first input end, the second input end and the third input end of the three-way amplifying tube core in a one-to-one correspondence mode.
And the first output end, the second output end and the third output end of the three-way amplifying tube core are respectively connected with the first input end, the second input end and the third input end of the interstage matching network in a one-to-one correspondence manner.
And the first output end, the second output end and the third output end of the interstage matching network are respectively connected with the first input end, the second input end and the third input end of the three final-stage die in a one-to-one correspondence mode.
And the first output end, the second output end and the third output end of the three paths of final-stage tube cores are respectively connected with the first input end, the second input end and the third input end of the output matching network in a one-to-one correspondence manner.
And the output end of the output matching network is used as the radio frequency output end of the high-power gain high-backspacing efficiency power amplifier.
The grid power supply bias network is respectively connected with the input matching network and the interstage matching network, and the drain power supply bias network is respectively connected with the interstage matching network and the output matching network.
As shown in fig. 2, the power distribution network comprises a microstrip line TL1Microstrip line TL2Resistance R1Microstrip line TL3Microstrip line TL4And a resistance R2。
Microstrip line TL1And microstrip line TL2Is connected with one end and serves as an input end of the power distribution network, and the other end of the power distribution network is connected with the resistor R1And as a first output of the power distribution network, a microstrip line TL2The other end of each of the resistors R and R is connected with1Another end of (1), microstrip line TL3And microstrip line TL4Is connected to microstrip line TL3Another terminal of (1) and a resistor R2And as a second output of the power distribution network, a microstrip line TL4Another terminal of (1) and a resistor R2And the other end of the network is connected and serves as a third output terminal of the power distribution network.
As shown in fig. 2, the input matching network comprises a microstrip line TL5Microstrip line TL6Microstrip line TL7Microstrip line TL8Microstrip line TL9Capacitor C1And a grounding capacitor C2Capacitor C3And a grounding capacitor C4Capacitor C5And a ground capacitor C6。
Microstrip line TL5One end of the first input matching network is used as a first input end of the input matching network, and the other end of the first input matching network passes through a capacitor C1Respectively connected with a grounding capacitor C2And microstrip line TL6Is connected to microstrip line TL6And the other end of the input matching network is used as a first output end of the input matching network.
Capacitor C3One end of the first input end is used as a second input end of the input matching network, and the other end of the first input end is respectively connected with a grounding capacitor C4And a microstripLine TL7Is connected to microstrip line TL7And the other end of the input matching network is used as a second output end of the input matching network.
Microstrip line TL8One end of the second input terminal is used as a third input end of the input matching network, and the other end of the second input terminal passes through a capacitor C5Respectively connected with a grounding capacitor C6And microstrip line TL9Is connected to microstrip line TL9And the other end of the input matching network is used as a third output end of the input matching network.
As shown in fig. 2, the three-way dump die includes a drive main circuit transistor DRMDriving the first auxiliary peak transistor DRP1And driving a second auxiliary peak transistor DRP2。
Drive main circuit transistor DRMThe source of (a) is grounded, the gate of the three-way dump die is used as a first input end of the three-way dump die, and the drain of the three-way dump die is used as a first output end of the three-way dump die.
Driving a first auxiliary peak transistor DRP1The source of (a) is grounded, the gate of the (b) is used as the second input end of the three-way dump die, and the drain of the (b) is used as the second output end of the three-way dump die.
Driving a second auxiliary peak transistor DRP2The source of (a) is grounded, the gate of the (b) is used as the third input end of the three-way dump die, and the drain of the (b) is used as the third output end of the three-way dump die.
As shown in fig. 2, the inter-stage matching network includes a microstrip line TL10Grounded microstrip line TL11Microstrip line TL12Grounded microstrip line TL13Microstrip line TL14Grounded microstrip line TL15Capacitor C7Capacitor C8Capacitor C9Capacitor C10Capacitor C11Capacitor C12Capacitor C13Capacitor C14Capacitor C15Resistance R3Resistance R4Resistance R5Resistance R6Resistance R7And a resistance R8。
Microstrip line TL10One terminal of the second switch is used as a first input terminal of the interstage matching network, and the other terminal of the second switch is connected with the capacitor C7Respectively associated with a resistor R3And a terminal of and electricityContainer C8Is connected to a resistor R3The other end of (a) and the ground microstrip line TL11Connection, capacitance C8The other end of each of the first and second capacitors is connected to a capacitor C9And a resistor R4Is connected to a capacitor C9Another terminal of (1) and a resistor R4And the other end of the second stage matching network is connected and used as a first output end of the interstage matching network.
Microstrip line TL12One terminal of the second input terminal is used as the second input terminal of the interstage matching network, and the other terminal of the second input terminal is connected with the capacitor C10Respectively associated with a resistor R5One terminal of and a capacitor C11Is connected to a resistor R5The other end of (a) and the ground microstrip line TL13Connection, capacitance C11The other end of each of the first and second capacitors is connected to a capacitor C12And a resistor R6Is connected to a capacitor C12Another terminal of (1) and a resistor R6And the other end of the second stage matching network is connected and used as a second output end of the interstage matching network.
Microstrip line TL14One terminal of the second input terminal is used as a third input terminal of the interstage matching network, and the other terminal of the second input terminal is connected with the capacitor C13Respectively associated with a resistor R7One terminal of and a capacitor C14Is connected to a resistor R7The other end of (a) and the ground microstrip line TL15Connection, capacitance C14The other end of each of the first and second capacitors is connected to a capacitor C15And a resistor R8Is connected to a capacitor C15Another terminal of (1) and a resistor R8And the other end of the second stage matching network is connected and used as a third output end of the interstage matching network.
As shown in FIG. 2, the three-way final stage die includes a final stage main circuit transistor PAMThe final stage first auxiliary peak transistor PAP1And final stage second auxiliary peak transistor PAP2。
Final main circuit transistor PAMHas its gate as a first input of the three-way final die and has its drain as a first output of the three-way final die.
Final-stage first auxiliary peak transistor PAP1Has its gate as a second input of the three-way final die and has its drain as a second output of the three-way final die.
Final-stage second auxiliary peak transistor PAP2Has its gate as a third input terminal of the three-way final die, and has its drain as a third output terminal of the three-way final die.
As shown in FIG. 2, the output matching network includes a capacitor C16And a grounding capacitor C17Capacitor C18And a grounding capacitor C19Capacitor C20Microstrip line TL16Microstrip line TL17And microstrip line TL18。
Capacitor C16One end of the microstrip line is used as a first input end of the output matching network, and the other end of the microstrip line passes through the microstrip line TL16Respectively connected with a grounding capacitor C17Microstrip line TL18One terminal of and a capacitor C20Is connected to microstrip line TL18The other end of the first and second electrodes is respectively connected with a microstrip line TL17One terminal of and a grounding capacitor C19A microstrip line TL connected as a third input of the output matching network17Another terminal of (1) and a capacitor C18Is connected to a capacitor C18The other end of the first capacitor is used as a second input end of the output matching network, and a capacitor C20And the other end of the input matching network is used as the output end of the output matching network.
As shown in FIG. 2, the gate supply bias network includes a resistor R9Resistance R10Resistance R11Resistance R12Resistance R13Resistance R14Microstrip line TL19Microstrip line TL20Microstrip line TL21Microstrip line TL22Microstrip line TL23Microstrip line TL24And a grounding capacitor C21And a grounding capacitor C22And a grounding capacitor C23And a grounding capacitor C24And a grounding capacitor C25And a ground capacitor C26。
Resistance R9Is connected with the third output end of the input matching network, and the other end thereof is connected with the third output end of the input matching network through a microstrip line TL19Respectively connected with a grounding capacitor C21And a low voltage bias supply VG 1.
Resistance R10Is connected to a second output of the input matching network, whichThe other end passes through a microstrip line TL20Respectively connected with a grounding capacitor C22And a low voltage bias supply VG 2.
Resistance R11One end of the input matching network is connected with the first output end of the input matching network, and the other end of the input matching network is connected with the first output end of the input matching network through a microstrip line TL21Respectively connected with a grounding capacitor C23And a low voltage bias supply VG 3.
Resistance R12Is connected with the third output end of the interstage matching network, and the other end of the interstage matching network is connected with the third output end of the interstage matching network through a microstrip line TL22Respectively connected with a grounding capacitor C24And a low voltage bias supply VG 4.
Resistance R13One end of the second microstrip line is connected with the second output end of the interstage matching network, and the other end of the second microstrip line passes through the microstrip line TL23Respectively connected with a grounding capacitor C25And a low voltage bias supply VG 5.
Resistance R14One end of the first microstrip line is connected with the first output end of the interstage matching network, and the other end of the first microstrip line is connected with the first output end of the interstage matching network through a microstrip line TL24Respectively connected with a grounding capacitor C26And a low voltage bias supply VG 6.
As shown in fig. 2, the drain supply bias network includes a microstrip line TL25Microstrip line TL26Microstrip line TL27Microstrip line TL28Microstrip line TL29Microstrip line TL30And a grounding capacitor C27And a grounding capacitor C28And a grounding capacitor C29And a grounding capacitor C30And a grounding capacitor C31And a ground capacitor C32。
Microstrip line TL25One end of the second capacitor is connected with the third input end of the interstage matching network, and the other end of the second capacitor is respectively connected with the grounding capacitor C27And a high voltage bias power supply VD.
Microstrip line TL26One end of the second input end of the interstage matching network is connected with the second input end of the interstage matching network, and the other end of the second input end of the interstage matching network is respectively connected with the grounding capacitor C28And a high voltage bias power supply VD.
Microstrip line TL27One end of the second capacitor is connected with the first input end of the interstage matching network, and the other end of the second capacitor is respectively connected with the grounding capacitor C29And a high voltage bias power supply VD.
Microstrip line TL28One end of the output matching network is connected with the third input end of the output matching network, and the other end of the output matching network is respectively connected with the grounding capacitor C30And a high voltage bias power supply VD.
Microstrip line TL29One end of the output matching network is connected with the second input end of the output matching network, and the other end of the output matching network is respectively connected with the grounding capacitor C31And a high voltage bias power supply VD.
Microstrip line TL30One end of the output matching network is connected with the first input end of the output matching network, and the other end of the output matching network is respectively connected with the grounding capacitor C32And a high voltage bias power supply VD.
The specific working principle and process of the present invention are described below with reference to fig. 2:
the radio frequency input signal enters a power distribution network of the power amplifier through an input end IN, and is divided into a main input signal and two auxiliary input signals after being subjected to power distribution through the power distribution network, and the main input signal and the two auxiliary input signals enter an input matching network. When the two-way auxiliary circuit input signals are lower than the saturated input power points of the two-way auxiliary circuit amplifying die in the three-way amplifying die, only the main circuit amplifying die in the three-way amplifying die works at the moment. Output signals of the main circuit and the two auxiliary circuit push-up amplifier tube cores enter the three paths of final-stage tube cores through the inter-stage matching network to respectively drive the main circuit final-stage tube cores and the two paths of auxiliary circuit final-stage tube cores, and when the output signals of the two paths of auxiliary circuit push-up amplifier tube cores are lower than saturated input power points of the two paths of auxiliary circuit final-stage tube cores in the three paths of final-stage tube cores, only the main circuit final-stage tube core works. With the gradual increase of the input power, the push-amplifier die and the final-stage die of the first auxiliary circuit are sequentially started to work, and the first Doherty synthesis is carried out in the output matching network together with the main circuit. When the input power continues to increase, the synthesized Doherty link and the second auxiliary link perform Doherty synthesis again in the output matching network, and finally a radio frequency output signal is formed at the output end OUT.
The power distribution network divides an input signal into two parts, namely a main path signal and an auxiliary path signal, and then divides the auxiliary path signal into two paths. The three distribution ports all adopt a microstrip line + resistance structure, which is beneficial to the isolation between links.
The input matching network, the interstage matching network and the output matching network jointly realize good matching of the 3-way amplification die and the final-stage die, phase compensation lines (TL 5 and TL8 in the input matching network and TL18 in the output matching network) are added into the input matching network and the output matching network, phase balance of a main circuit and a secondary circuit is kept, and high-performance output of the whole circuit is realized.
The three push amplifier dies and the three final-stage dies form a 3-way Doherty radio-frequency amplifying part. The main circuit push-off and the final stage are biased in class AB, and the two-way auxiliary circuit push-off and the final stage are biased in class C. And when the high peak-to-average ratio signal is backed off, the grid voltages of the amplifying tube cores and the final tube cores of the two auxiliary circuits are biased to be in a low power consumption mode, so that the high back-off efficiency, the high back-off gain and the high power output of the whole link are realized.
The grid bias supply network and the drain bias supply network provide bias voltage for normal operation of the main circuit and the auxiliary circuit tube cores, so that the main circuit push-amplifier and the final stage operate in class AB, and the two auxiliary circuit push-amplifiers and the final stage operate in class C.
In the embodiment of the invention, the size of the transistor and the sizes of other direct current feed resistors and capacitors are determined by comprehensively considering various indexes such as gain, efficiency and output power of the whole circuit, and the required indexes can be better realized through layout design and reasonable layout at the later stage, so that in-band high efficiency, high gain and high power output capability are realized.
It will be appreciated by those of ordinary skill in the art that the embodiments described herein are intended to assist the reader in understanding the principles of the invention and are to be construed as being without limitation to such specifically recited embodiments and examples. Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.

Claims (8)

1. A high-power gain high-back-off efficiency power amplifier is characterized by comprising a power distribution network, an input matching network, three amplifier tube cores, an inter-stage matching network, three final-stage tube cores, an output matching network, a grid supply bias network and a drain supply bias network;
the input end of the power distribution network is used as the radio frequency input end of the high-power gain high-backspacing efficiency power amplifier, and the first output end, the second output end and the third output end of the power distribution network are respectively connected with the first input end, the second input end and the third input end of the input matching network in a one-to-one correspondence manner;
the first output end, the second output end and the third output end of the input matching network are respectively connected with the first input end, the second input end and the third input end of the three-way amplifying tube core in a one-to-one correspondence manner;
the first output end, the second output end and the third output end of the three-way amplifying tube core are respectively connected with the first input end, the second input end and the third input end of the interstage matching network in a one-to-one correspondence manner;
the first output end, the second output end and the third output end of the interstage matching network are respectively connected with the first input end, the second input end and the third input end of the three paths of final-stage tube cores in a one-to-one correspondence mode;
the first output end, the second output end and the third output end of the three paths of final-stage tube cores are respectively connected with the first input end, the second input end and the third input end of the output matching network in a one-to-one correspondence manner;
the output end of the output matching network is used as the radio frequency output end of the high-power gain high-backspacing efficiency power amplifier;
the grid supply bias network is respectively connected with the input matching network and the interstage matching network, and the drain supply bias network is respectively connected with the interstage matching network and the output matching network.
2. The power amplifier of claim 1, wherein the power distribution network comprises a microstrip line TL1Microstrip line TL2Resistance R1Microstrip line TL3Microstrip line TL4And a resistance R2；
The microstrip line TL1And microstrip line TL2Is connected with one end and serves as an input end of the power distribution network, and the other end of the power distribution network is connected with the resistor R1And as a first output of the power distribution network, the microstrip line TL2The other end of each of the resistors R and R is connected with1Another end of (1), microstrip line TL3And microstrip line TL4Is connected to the microstrip line TL3Another terminal of (1) and a resistor R2And as a second output of the power distribution network, said microstrip line TL4Another terminal of (1) and a resistor R2And the other end of the network is connected and serves as a third output terminal of the power distribution network.
3. The power amplifier of claim 1, wherein the input matching network comprises a microstrip line TL5Microstrip line TL6Microstrip line TL7Microstrip line TL8Microstrip line TL9Capacitor C1And a grounding capacitor C2Capacitor C3And a grounding capacitor C4Capacitor C5And a ground capacitor C6；
The microstrip line TL5One end of the first input matching network is used as a first input end of the input matching network, and the other end of the first input matching network passes through a capacitor C1Respectively connected with a grounding capacitor C2And microstrip line TL6Is connected to the microstrip line TL6The other end of the input matching network is used as a first output end of the input matching network;
the capacitor C3One end of the first input end is used as a second input end of the input matching network, and the other end of the first input end is respectively connected with a grounding capacitor C4And microstrip line TL7Is connected to the microstrip line TL7The other end of the input matching network is used as a second output end of the input matching network;
the microstrip line TL8One end of the second input terminal is used as a third input end of the input matching network, and the other end of the second input terminal passes through a capacitor C5Respectively connected with a grounding capacitor C6And microstrip line TL9Is connected to the microstrip line TL9And the other end of the input matching network is used as a third output end of the input matching network.
4. The high power gain high back-off efficiency power amplifier of claim 1, wherein the three-way dump die comprises a driving main circuit transistor (DR)MDriving the first auxiliary peak transistor DRP1And driving a second auxiliary peak transistor DRP2；
The driving main circuit transistor DRMThe source of the three-way amplifying die is grounded, the grid of the three-way amplifying die is used as a first input end of the three-way amplifying die, and the drain of the three-way amplifying die is used as a first output end of the three-way amplifying die;
the driving first auxiliary peak transistor DRP1The source of the three-way amplifying tube core is grounded, the grid of the three-way amplifying tube core is used as a second input end of the three-way amplifying tube core, and the drain of the three-way amplifying tube core is used as a second output end of the three-way amplifying tube core;
the driving second auxiliary peak transistor DRP2The source of (a) is grounded, the gate of the (b) is used as the third input end of the three-way dump die, and the drain of the (b) is used as the third output end of the three-way dump die.
5. The high power gain high back-off efficiency power amplifier according to claim 1, wherein the inter-stage matching network comprises microstrip line TL10Grounded microstrip line TL11Microstrip line TL12Grounded microstrip line TL13Microstrip line TL14Grounded microstrip line TL15Capacitor C7Capacitor C8Capacitor C9Capacitor C10Capacitor C11Capacitor C12Capacitor C13Capacitor C14Capacitor C15Resistance R3Resistance R4Resistance R5Resistance R6Resistance R7And a resistance R8；
The microstrip line TL10One terminal of the second switch is used as a first input terminal of the interstage matching network, and the other terminal of the second switch is connected with the capacitor C7Respectively associated with a resistor R3One terminal and capacitorC8Is connected to one end of the resistor R3The other end of (a) and the ground microstrip line TL11Connected, the capacitor C8The other end of each of the first and second capacitors is connected to a capacitor C9And a resistor R4Is connected to the capacitor C9Another terminal of (1) and a resistor R4Is connected with the other end of the inter-stage matching network and is used as a first output end of the inter-stage matching network;
the microstrip line TL12One terminal of the second input terminal is used as the second input terminal of the interstage matching network, and the other terminal of the second input terminal is connected with the capacitor C10Respectively associated with a resistor R5One terminal of and a capacitor C11Is connected to one end of the resistor R5The other end of (a) and the ground microstrip line TL13Connected, the capacitor C11The other end of each of the first and second capacitors is connected to a capacitor C12And a resistor R6Is connected to the capacitor C12Another terminal of (1) and a resistor R6And as a second output of the interstage matching network;
the microstrip line TL14One terminal of the second input terminal is used as a third input terminal of the interstage matching network, and the other terminal of the second input terminal is connected with the capacitor C13Respectively associated with a resistor R7One terminal of and a capacitor C14Is connected to one end of the resistor R7The other end of (a) and the ground microstrip line TL15Connected, the capacitor C14The other end of each of the first and second capacitors is connected to a capacitor C15And a resistor R8Is connected to the capacitor C15Another terminal of (1) and a resistor R8And the other end of the second stage matching network is connected and used as a third output end of the interstage matching network.
6. The high power gain high back-off efficiency power amplifier of claim 1, wherein the three-way final stage die comprises a final stage main circuit transistor (PA)MThe final stage first auxiliary peak transistor PAP1And final stage second auxiliary peak transistor PAP2；
The final main circuit transistor PAMThe source of (a) is grounded, the gate of the three-way final stage die is used as a first input end of the three-way final stage die, and the drain of the three-way final stage die is used as a first output end of the three-way final stage die;
the final stage first auxiliary peak transistor PAP1The source of (a) is grounded, the gate of the three-way final stage die is used as a second input end of the three-way final stage die, and the drain of the three-way final stage die is used as a second output end of the three-way final stage die;
the final stage second auxiliary peak transistor PAP2Has its gate as a third input terminal of the three-way final die, and has its drain as a third output terminal of the three-way final die.
7. The power amplifier of claim 1, wherein the output matching network comprises a capacitor C16And a grounding capacitor C17Capacitor C18And a grounding capacitor C19Capacitor C20Microstrip line TL16Microstrip line TL17And microstrip line TL18；
The capacitor C16One end of the microstrip line is used as a first input end of the output matching network, and the other end of the microstrip line passes through the microstrip line TL16Respectively connected with a grounding capacitor C17Microstrip line TL18One terminal of and a capacitor C20Is connected to the microstrip line TL18The other end of the first and second electrodes is respectively connected with a microstrip line TL17One terminal of and a grounding capacitor C19Connected as a third input of the output matching network, the microstrip line TL17Another terminal of (1) and a capacitor C18Is connected to the capacitor C18As a second input terminal of the output matching network, said capacitor C20And the other end of the input matching network is used as the output end of the output matching network.
8. The high power gain high back-off efficiency power amplifier of claim 1, wherein the gate supply bias network comprises a resistor R9Resistance R10Resistance R11Resistance R12Resistance R13Resistance R14Microstrip line TL19Microstrip line TL20Microstrip line TL21Microstrip line TL22Microstrip line TL23Microstrip line TL24Grounded electrodeContainer C21And a grounding capacitor C22And a grounding capacitor C23And a grounding capacitor C24And a grounding capacitor C25And a ground capacitor C26；
The resistor R9Is connected with the third output end of the input matching network, and the other end thereof is connected with the third output end of the input matching network through a microstrip line TL19Respectively connected with a grounding capacitor C21And a low voltage bias supply VG1 connection;
the resistor R10One end of which is connected with the second output end of the input matching network and the other end of which is connected with the second output end of the input matching network through a microstrip line TL20Respectively connected with a grounding capacitor C22And a low voltage bias supply VG2 connection;
the resistor R11One end of the input matching network is connected with the first output end of the input matching network, and the other end of the input matching network is connected with the first output end of the input matching network through a microstrip line TL21Respectively connected with a grounding capacitor C23And a low voltage bias supply VG3 connection;
the resistor R12Is connected with the third output end of the interstage matching network, and the other end of the interstage matching network is connected with the third output end of the interstage matching network through a microstrip line TL22Respectively connected with a grounding capacitor C24And a low voltage bias supply VG4 connection;
the resistor R13One end of the second microstrip line is connected with the second output end of the interstage matching network, and the other end of the second microstrip line passes through the microstrip line TL23Respectively connected with a grounding capacitor C25And a low voltage bias supply VG5 connection;
the resistor R14One end of the first microstrip line is connected with the first output end of the interstage matching network, and the other end of the first microstrip line is connected with the first output end of the interstage matching network through a microstrip line TL24Respectively connected with a grounding capacitor C26And a low voltage bias supply VG 6.
CN202011033148.7A 2020-09-27 2020-09-27 High-power gain high-back-off efficiency power amplifier Pending CN111934633A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117559925A (en) * 2024-01-12 2024-02-13 电子科技大学 Multimode high-efficiency power amplifier

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1501578A (en) * 2002-11-18 2004-06-02 ѧУ��������ƴ�ѧУ Signal amplifier employing DOHERTY amplifier
US20080111630A1 (en) * 2006-10-05 2008-05-15 Nec Electronics Corporation Small size power amplifier with amplifiers switched
CN101904089A (en) * 2007-12-21 2010-12-01 Nxp股份有限公司 3-way doherty amplifier with minimum output network
CN102270966A (en) * 2010-06-02 2011-12-07 Nxp股份有限公司 Two stage doherty amplifier
WO2012076924A1 (en) * 2010-12-09 2012-06-14 Freescale Semiconductors, Inc. Rf amplifier circuit and electronic system comprising such a circuit
CN106301238A (en) * 2016-07-25 2017-01-04 杭州电子科技大学 A kind of high-power high-efficiency Doherty power amplifier
CN109660214A (en) * 2018-12-20 2019-04-19 佛山臻智微芯科技有限公司 One kind being applied to the 5th third-generation mobile communication base station Doherty power amplifier

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1501578A (en) * 2002-11-18 2004-06-02 ѧУ��������ƴ�ѧУ Signal amplifier employing DOHERTY amplifier
US20080111630A1 (en) * 2006-10-05 2008-05-15 Nec Electronics Corporation Small size power amplifier with amplifiers switched
CN101904089A (en) * 2007-12-21 2010-12-01 Nxp股份有限公司 3-way doherty amplifier with minimum output network
CN102270966A (en) * 2010-06-02 2011-12-07 Nxp股份有限公司 Two stage doherty amplifier
WO2012076924A1 (en) * 2010-12-09 2012-06-14 Freescale Semiconductors, Inc. Rf amplifier circuit and electronic system comprising such a circuit
CN106301238A (en) * 2016-07-25 2017-01-04 杭州电子科技大学 A kind of high-power high-efficiency Doherty power amplifier
CN109660214A (en) * 2018-12-20 2019-04-19 佛山臻智微芯科技有限公司 One kind being applied to the 5th third-generation mobile communication base station Doherty power amplifier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117559925A (en) * 2024-01-12 2024-02-13 电子科技大学 Multimode high-efficiency power amplifier
CN117559925B (en) * 2024-01-12 2024-03-29 电子科技大学 Multimode high-efficiency power amplifier

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